MTDK5S6R

Spec. No. : C800S6R
Issued Date : 2010.03.29
Revised Date : 2013.03.28
Page No. : 1/7
CYStech Electronics Corp.
ESD protected Dual N-CHANNEL MOSFET
MTDK5S6R
BVDSS
30V
ID
VGS=4V, ID=10mA
250mA
1.3Ω
VGS=2.5V, ID=1mA
2.7Ω
RDSON(TYP)
Description
• Low voltage drive(2.5V drive) makes this device ideal for portable equipment.
• The MOSFET elements are independent, eliminating mutual interference.
• Mounting cost and area can be cut in half.
• High speed switching
• ESD protected device
• Pb-free lead plating & halogen-free package
Symbol
Outline
MTDK5S6R
Tr1
SOT-363
Tr 2
The following characteristics apply to both Tr1 and Tr2
Absolute Maximum Ratings (Ta=25°C)
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Current (Ta=25°C)
Total Power Dissipation
ESD susceptibility
Operating Junction and Storage Temperature Range
Thermal Resistance, Junction-to-Ambient
Symbol
BVDSS
VGS
ID
IDM
PD
Tj ; Tstg
Rth,ja
Limits
30
±20
±250
±800
*1
200
*2
1550
*3
-55~+150
625
Unit
V
V
mA
mA
mW
V
°C
°C/W
Note : *1. Pulse Width ≤ 10μs, Duty cycle ≤1%
*2. With each pin mounted on the recommended lands.
*3. Human body model, 1.5kΩ in series with 100pF
MTDK5S6R
CYStek Product Specification
Spec. No. : C800S6R
Issued Date : 2010.03.29
Revised Date : 2013.03.28
Page No. : 2/7
CYStech Electronics Corp.
Thermal Data
Parameter
Symbol
Thermal Resistance, Channel-to-ambient, max
*Rth,ch-a
Value
625 (total)
800 (per element)
Unit
°C/W
Note : With each pin mounted on the recommended lands.
Electrical Characteristics (Ta=25°C)
Symbol
Static
BVDSS
VGS(th)
IGSS
IDSS
RDS(ON)
Min.
Typ.
Max.
Unit
30
0.8
20
1.2
1.3
2.7
70
1.5
±5
100
3
5
-
V
V
μA
nA
31.5
7.3
5.5
11
6
42
16
0.66
0.05
0.25
-
0.8
1.2
GFS
Dynamic
Ciss
Coss
Crss
td(on)
tr
td(off)
tf
Qg
Qgs
Qgd
Source-Drain Diode
*VSD
-
Test Conditions
mS
VGS=0, ID=100μA
VDS=3V, ID=100μA
VGS=±20V, VDS=0
VDS=30V, VGS=0
VGS=4V, ID=10mA
VGS=2.5V, ID=1mA
VDS=3V, ID=10mA
pF
VDS=5V, VGS=0, f=1MHz
ns
VDD≒5V, ID=10mA, VGS=5V, RL=500Ω,
RG=10Ω
nC
ID=10mA, VDS=15V, VGS=4V
V
VGS=0V, IS=100mA
Ω
*Pulse Test : Pulse Width ≤300μs, Duty Cycle≤2%
Ordering Information
Device
MTDK5S6R-0-T1-G
MTDK5S6R
Package
SOT-363
(Pb-free lead plating & halogen-free package)
Shipping
3000 pcs / Tape & Reel
CYStek Product Specification
Spec. No. : C800S6R
Issued Date : 2010.03.29
Revised Date : 2013.03.28
Page No. : 3/7
CYStech Electronics Corp.
Typical Characteristics
Typical Output Characteristics
Typical Transfer Characteristics
1.2
1.2
VDS=5V
4V
1
ID, Drain Current(A)
ID, Drain Current(A)
1.0
0.8
3.5V
0.6
3V
0.4
0.2
0.8
0.6
0.4
0.2
2.5V
VGS=2V
0
0.0
0
1
2
3
4
VDS , Drain-Source Voltage(V)
5
0
6
1
Static Drain-Source On-State resistance vs Drain Current
1.2
VSD, Source-Drain Voltage(V)
R DS(on), Static Drain-Source On-State
Resistance(Ω)
5
Reverse Drain Current vs Source-Drain Voltage
1000
100
VGS=1.8V
10
VGS=2.5V
VGS=4.5V
1
0.001
Tj=25°C
1
0.8
Tj=125°C
0.6
0.4
0.2
0.01
0.1
ID, Drain Current(A)
0
1
0.2
0.4
0.6
0.8
IDR , Reverse Drain Current(A)
1
Drain-Source On-State Resistance vs Junction Tempearture
Static Drain-Source On-State Resistance vs Gate-Source
Voltage
7
2
R DS(ON), Normalized Static DrainSource On-State Resistance
R DS(ON), Static Drain-Source OnState Resistance(Ω)
2
3
4
VGS , Gate-Source Voltage(V)
ID=10mA
6
5
4
3
2
1
VGS=4V, ID=10mA
1.6
1.2
0.8
0.4
0
0
MTDK5S6R
1
2
3
VGS, Gate-Source Voltage(V)
4
-60
-20
20
60
100
140
180
Tj, Junction Temperature(°C)
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C800S6R
Issued Date : 2010.03.29
Revised Date : 2013.03.28
Page No. : 4/7
Typical Characteristics(Cont.)
Threshold Voltage vs Junction Tempearture
Capacitance vs Drain-to-Source Voltage
VGS(th), NormalizedThreshold Voltage
100
Capacitance---(pF)
Ciss
10
C oss
Crss
1.4
ID=250μA
1.2
1
0.8
0.6
0.4
1
0.1
1
10
VDS, Drain-Source Voltage(V)
-60
100
-20
100
140
Brekdown Voltage vs Ambient Temperature
1
1.6
BVDSS, Normalized Drain-Source
Breakdown Voltage
GFS, Forward Transfer Admittance(S)
60
Tj, Junction Temperature(°C)
Forward Transfer Admittance vs Drain Current
0.1
VDS=3V
1.4
1.2
1
0.8
ID=250μA,
VGS=0V
0.6
Pulsed
Ta=25°C
0.01
0.001
0.4
0.01
0.1
ID, Drain Current(A)
-60
1
-20
20
60
100
140
Tj, Junction Temperature(°C)
180
Maximum Drain Current vs Junction Temperature
Power Derating Curve
0.3
ID, Maximum Drain Current(A)
250
PD, Power Dissipation(mW)
20
200
150
100
50
0.25
0.2
0.15
0.1
0.05
TA=25°C, VGS=4V, RθJA=800°C/W
0
0
0
MTDK5S6R
50
100
150
TA, Ambient Temperature(℃)
200
25
50
75
100
125
150
Tj, Junction Temperature(°C)
175
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C800S6R
Issued Date : 2010.03.29
Revised Date : 2013.03.28
Page No. : 5/7
Reel Dimension
Carrier Tape Dimension
MTDK5S6R
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C800S6R
Issued Date : 2010.03.29
Revised Date : 2013.03.28
Page No. : 6/7
Recommended wave soldering condition
Product
Pb-free devices
Peak Temperature
260 +0/-5 °C
Soldering Time
5 +1/-1 seconds
Recommended temperature profile for IR reflow
Profile feature
Average ramp-up rate
(Tsmax to Tp)
Preheat
−Temperature Min(TS min)
−Temperature Max(TS max)
−Time(ts min to ts max)
Time maintained above:
−Temperature (TL)
− Time (tL)
Peak Temperature(TP)
Time within 5°C of actual peak
temperature(tp)
Ramp down rate
Time 25 °C to peak temperature
Sn-Pb eutectic Assembly
Pb-free Assembly
3°C/second max.
3°C/second max.
100°C
150°C
60-120 seconds
150°C
200°C
60-180 seconds
183°C
60-150 seconds
240 +0/-5 °C
217°C
60-150 seconds
260 +0/-5 °C
10-30 seconds
20-40 seconds
6°C/second max.
6 minutes max.
6°C/second max.
8 minutes max.
Note : All temperatures refer to topside of the package, measured on the package body surface.
MTDK5S6R
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C800S6R
Issued Date : 2010.03.29
Revised Date : 2013.03.28
Page No. : 7/7
SOT-363 Dimension
Marking:
Date Code:
Year + Month
Year : 6→2006,
7→2007,…, etc
Month : 1→Jan
2→Feb, …, 9→
Sep, A→Oct, B
→Nov, C→Dec
K5
Device
Code
6-Lead SOT-363R Plastic
Surface Mounted Package
CYStek Package Code: S6R
Style:
Pin 1. Source1 (S1)
Pin 2. Gate1 (G1)
Pin 3. Drain2 (D2)
Pin 4. Source2 (S2)
Pin 5. Gate2 (G2)
Pin 6. Drain1 (D1)
Millimeters
Min.
Max.
0.900
1.100
0.000
0.100
0.900
1.000
0.150
0.350
0.080
0.150
2.000
2.200
1.150
1.350
DIM
A
A1
A2
b
c
D
E
Inches
Min.
Max.
0.035
0.043
0.000
0.004
0.035
0.039
0.006
0.014
0.003
0.006
0.079
0.087
0.045
0.053
DIM
E1
e
e1
L
L1
θ
Millimeters
Min.
Max.
2.150
2.450
0.650 TYP
1.200
1.400
0.525 REF
0.260
0.460
0°
8°
Inches
Min.
Max.
0.085
0.096
0.026 TYP
0.047
0.055
0.021 REF
0.010
0.018
0°
8°
Notes : 1.Controlling dimension : millimeters.
2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material.
3.If there is any question with packing specification or packing method, please contact your local CYStek sales office.
Material :
• Lead : Pure tin plated.
• Mold Compound : Epoxy resin family, flammability solid burning class:UL94V-0.
Important Notice:
• All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek.
• CYStek reserves the right to make changes to its products without notice.
• CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.
• CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.
MTDK5S6R
CYStek Product Specification