MTE130N20KE3

CYStech Electronics Corp.
Spec. No. : C952E3
Issued Date : 2013.12.27
Revised Date : 2014.03.05
Page No. : 1/8
N-Channel Enhancement Mode Power MOSFET
MTE130N20KE3
BVDSS
200V
ID
18A
143mΩ
RDSON(TYP) @ VGS=10V, ID=9A
Features
• Low Gate Charge
• Simple Drive Requirement
• ESD Diode Protected Gate
• Fast Switching Characteristic
• RoHS compliant package
Symbol
Outline
TO-220
MTE130N20KE3
G：Gate D：Drain S：Source
G D S
Ordering Information
Device
MTE130N20KE3-0-UB-S
Package
TO-220
(RoHS compliant package)
Shipping
50 pcs/tube, 20 tubes/box, 4 boxes / carton
Environment friendly grade : S for RoHS compliant products, G for RoHS compliant and
green compound products
Packing spec, UB : 50 pcs / tube, 20 tubes/box
Product rank, zero for no rank products
Product name
MTE130N20KE3
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C952E3
Issued Date : 2013.12.27
Revised Date : 2014.03.05
Page No. : 2/8
Absolute Maximum Ratings (TC=25°C, unless otherwise noted)
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current @ TC=25°C(silicon limit)
Continuous Drain Current @ TC=100°C(silicon limit)
Pulsed Drain Current
Continuous Drain Current @ TA=25°C
Continuous Drain Current @ TA=70°C
Avalanche Current
Avalanche Energy @ L=100μH, ID=10A, VDD=50V
TC=25°C
Power Dissipation
TC=100°C
TA=25°C
Power Dissipation
TA=70°C
Operating Junction and Storage Temperature
Symbol
Limits
VDS
VGS
200
±20
18
13
34
2.4
1.9
10
5
125
62.5
2
1.3
-55~+175
ID
(Note 3)
(Note 2)
(Note 2)
(Note 3)
(Note 2)
(Note 1)
(Note 1)
(Note 2)
(Note 2)
IDM
IDSM
IAS
EAS
PD
PDSM
Tj, Tstg
Unit
V
A
mJ
W
W
°C
Thermal Data
Parameter
Thermal Resistance, Junction-to-case, max
Thermal Resistance, Junction-to-ambient, max, t≤10s
Thermal Resistance, Junction-to-ambient, max
Symbol
Rth,j-c
(Note 2)
(Note 2)
Rth,j-a
Value
1.2
15
62.5
Unit
°C/W
°C/W
°C/W
Note : 1.The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful
in setting the upper dissipation limit for cases where additional heatsinking is used.
2. The value of RθJA is measured with the device mounted on 1 in²FR-4 board with 2 oz. copper, in a still air
environment with TA=25°C. The power dissipation PDSM is based on RθJA and the maximum allowed junction
temperature of 150°C. The value in any given application depends on the user’s specific board design, and the
maximum temperature of 175°C may be used if the PCB allows it.
3. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C. Ratings are based on low frequency
and low duty cycles to keep initial TJ=25°C.
4. The maximum current limited by package is 60A.
5. The static characteristics are obtained using <300μs pulses, duty cycle 0.5% maximum.
6. The RθJA is the sum of thermal resistance from junction to case RθJC and case to ambient.
MTE130N20KE3
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C952E3
Issued Date : 2013.12.27
Revised Date : 2014.03.05
Page No. : 3/8
Characteristics (TC=25°C, unless otherwise specified)
Symbol
Static
BVDSS
∆BVDSS/∆Tj
VGS(th)
GFS
IGSS
IDSS
Min.
Typ.
Max.
Unit
Test Conditions
200
2.0
-
0.2
3.2
15
143
4.0
±10
1
10
185
V
V/°C
V
S
mΩ
VGS=0V, ID=250μA
Reference to 25°C, ID=250μA
VDS = VGS, ID=250μA
VDS =10V, ID=9A
VGS=±20V
VDS =180V, VGS =0V
VDS =180V, VGS =0V, Tj=125°C
VGS =10V, ID=9A
22
5.5
9.4
21
32
40
30
972
85
37
-
nC
VDS=160V, ID=18A, VGS=10V
ns
VDS=100V, ID=18A, VGS=10V, RG=6Ω
pF
VGS=0V, VDS=25V, f=1MHz
0.87
90
260
18
34
1.2
-
*RDS(ON)
Dynamic
*Qg
*Qgs
*Qgd
*td(ON)
*tr
*td(OFF)
*tf
Ciss
Coss
Crss
Source-Drain Diode
*IS
*ISM
*VSD
*trr
*Qrr
-
μA
A
V
ns
nC
IS=18A, VGS=0V
IF=18A, VGS=0, dIF/dt=100A/μs
*Pulse Test : Pulse Width ≤300μs, Duty Cycle≤2%
MTE130N20KE3
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C952E3
Issued Date : 2013.12.27
Revised Date : 2014.03.05
Page No. : 4/8
Typical Characteristics
Brekdown Voltage vs Ambient Temperature
Typical Output Characteristics
1.4
BVDSS, Normalized Drain-Source
Breakdown Voltage
35
ID, Drain Current (A)
30
10V,9V,8V,7V,6V
25
20
5V
15
10
1.2
1
0.8
0.6
ID=250μA,
VGS=0V
5
VGS=4V
0.4
0
0
2
4
6
8
VDS, Drain-Source Voltage(V)
-75 -50 -25
10
Static Drain-Source On-State resistance vs Drain Current
Reverse Drain Current vs Source-Drain Voltage
1.2
VSD, Source-Drain Voltage(V)
R DS(on), Static Drain-Source On-State
Resistance(mΩ)
1000
VGS=4.5V
100
VGS=6V
VGS=10V
VGS=0V
1
Tj=25°C
0.8
0.6
Tj=150°C
0.4
0.2
10
0.01
0.1
1
10
ID, Drain Current(A)
0
100
2
4
6
8
IDR , Reverse Drain Current(A)
10
Drain-Source On-State Resistance vs Junction Tempearture
Static Drain-Source On-State Resistance vs Gate-Source
Voltage
1000
2.8
ID=9A
900
R DS(on), Normalized Static DrainSource On-State Resistance
R DS(on), Static Drain-Source OnState Resistance(mΩ)
0 25 50 75 100 125 150 175
Tj, Junction Temperature(°C)
800
700
600
500
400
300
200
100
2.4
VGS=10V, ID=9A
2
1.6
1.2
0.8
RDS(ON) @Tj=25°C : 143mΩtyp.
0.4
0
0
0
MTE130N20KE3
2
4
6
8
VGS, Gate-Source Voltage(V)
10
-75 -50 -25
0 25 50 75 100 125 150 175
Tj, Junction Temperature(°C)
CYStek Product Specification
Spec. No. : C952E3
Issued Date : 2013.12.27
Revised Date : 2014.03.05
Page No. : 5/8
CYStech Electronics Corp.
Typical Characteristics(Cont.)
Threshold Voltage vs Junction Tempearture
Capacitance vs Drain-to-Source Voltage
VGS(th), Normalized Threshold Voltage
Capacitance---(pF)
10000
Ciss
1000
C oss
100
Crss
1.4
1.2
ID=1mA
1
0.8
0.6
ID=250μA
0.4
0.2
10
0.1
1
10
VDS, Drain-Source Voltage(V)
-75 -50 -25
100
50
75 100 125 150 175
Gate Charge Characteristics
100
10
VDS=100V
VGS, Gate-Source Voltage(V)
GFS, Forward Transfer Admittance(S)
25
Tj, Junction Temperature(°C)
Forward Transfer Admittance vs Drain Current
10
1
VDS=10V
0.1
Ta=25°C
Pulsed
0.01
0.001
8
VDS=40V
6
VDS=160V
4
2
ID=18A
0
0.01
0.1
1
ID, Drain Current(A)
10
0
100
4
8
12
16
Qg, Total Gate Charge(nC)
20
24
Maximum Drain Current vs Case Temperature
Maximum Safe Operating Area
25
100
ID, Maximum Drain Current(A)
10μs
100μs
RDSON
Limited
ID, Drain Current(A)
0
10
1ms
10ms
1
DC
TC=25°C, Tj=175°C
VGS=10V, θJC=1.2°C/W
Single Pulse
0.1
20
15
10
5
VGS=10V, RθJC=1.2°C/W
0
0.01
0.1
MTE130N20KE3
1
10
100
VDS, Drain-Source Voltage(V)
1000
25
50
75
100
125
TC , Case Temperature(°C)
150
175
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C952E3
Issued Date : 2013.12.27
Revised Date : 2014.03.05
Page No. : 6/8
Typical Characteristics(Cont.)
Single Pulse Power Rating, Junction to Case
Typical Transfer Characteristics
2000
35
TJ(MAX) =175°C
TC=25°C
θJC=1.2°C/W
1600
1400
25
Power (W)
ID, Drain Current(A)
1800
VDS=10V
30
20
15
1200
1000
800
600
10
400
5
200
0
0
2
4
6
8
VGS, Gate-Source Voltage(V)
10
0
0.0001
0.001
0.01
0.1
Pulse Width(s)
1
10
Transient Thermal Response Curves
1
r(t), Normalized Effective Transient
Thermal Resistance
D=0.5
0.2
1.RθJC(t)=r(t)*RθJC
2.Duty Factor, D=t1/t2
3.TJM-TC=PDM*RθJC(t)
4.RθJC=1.2°C/W
0.1
0.1
0.05
0.02
0.01
Single Pulse
0.01
1.E-04
MTE130N20KE3
1.E-03
1.E-02
1.E-01
t1, Square Wave Pulse Duration(s)
1.E+00
1.E+01
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C952E3
Issued Date : 2013.12.27
Revised Date : 2014.03.05
Page No. : 7/8
Recommended wave soldering condition
Product
Peak Temperature
Soldering Time
Pb-free devices
260 +0/-5 °C
5 +1/-1 seconds
Recommended temperature profile for IR reflow
Profile feature
Sn-Pb eutectic Assembly
Average ramp-up rate
3°C/second max.
(Tsmax to Tp)
Preheat
100°C
−Temperature Min(TS min)
−Temperature Max(TS max)
150°C
−Time(ts min to ts max)
60-120 seconds
Time maintained above:
−Temperature (TL)
183°C
− Time (tL)
60-150 seconds
Peak Temperature(TP)
240 +0/-5 °C
Time within 5°C of actual peak
10-30 seconds
temperature(tp)
Ramp down rate
6°C/second max.
6 minutes max.
Time 25 °C to peak temperature
Pb-free Assembly
3°C/second max.
150°C
200°C
60-180 seconds
217°C
60-150 seconds
260 +0/-5 °C
20-40 seconds
6°C/second max.
8 minutes max.
Note : All temperatures refer to topside of the package, measured on the package body surface.
MTE130N20KE3
CYStek Product Specification
Spec. No. : C952E3
Issued Date : 2013.12.27
Revised Date : 2014.03.05
Page No. : 8/8
CYStech Electronics Corp.
TO-220 Dimension
Marking:
E130
N20K
Device Name
□□□□
Date Code
1
3-Lead TO-220 Plastic Package
CYStek Package Code: E3
2
3
Style: Pin 1.Gate 2.Drain 3.Source
4.Drain
*: Typical
Millimeters
Min.
Max.
4.470
4.670
2.520
2.820
0.710
0.910
1.170
1.370
0.310
0.530
1.170
1.370
10.010 10.310
8.900
8.500
DIM
A
A1
b
b1
c
c1
D
E
Inches
Min.
Max.
0.176
0.184
0.099
0.111
0.028
0.036
0.046
0.054
0.012
0.021
0.046
0.054
0.406
0.394
0.350
0.335
DIM
E1
e
e1
F
h
L
L1
Φ
Millimeters
Min.
Max.
12.060 12.460
2.540*
4.980
5.180
2.890
2.590
0.000
0.300
13.400 13.800
3.560
3.960
3.735
3.935
Inches
Min.
Max.
0.475
0.491
0.100*
0.196
0.204
0.114
0.102
0.000
0.012
0.528
0.543
0.140
0.156
0.147
0.155
Notes: 1.Controlling dimension: millimeters.
2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material.
3.If there is any question with packing specification or packing method, please contact your local CYStek sales office.
Material:
• Lead: Pure tin plated.
• Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0.
Important Notice:
• All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek.
• CYStek reserves the right to make changes to its products without notice.
• CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.
• CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.
MTE130N20KE3
CYStek Product Specification