FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 Document No.: FT_000877 Clearance No.: FTDI#420 Future Technology Devices International Ltd. FT51A (Advanced Microcontroller with 8051 Compatible Core) Supports DMA operation I2C Master & Slave functionality SPI Master & Slave functionality 245 FIFO module provides a simple FIFO interface to transmit and receive data Timer and Watchdog Up to 16 dedicated digital IO pins Up to 16 multiplexed analogue / digital IO pins USB 2.0 Full Speed hub controller allowing cascading of multiple FT51A devices Support ADC or DAC functions on analogue IO pins USB 2.0 Full Speed device controller compatible to FT12 series IO Mux control for maximum flexibility in pin selection Supports up to 8 bi-directional endpoints with 2 x 1 KB USB endpoint buffers Configurable IO pin output drive strength; 4 mA (min) and 16 mA (max) +5V Single Supply Operation Max packet size is 504 bytes for USB isochronous endpoint and 64 bytes for control / bulk / interrupt endpoint Internal 3.3V/1.8V LDO regulators Integrated power-on-reset circuit Double buffer scheme for any endpoint increases data transfer throughput Low operating and suspend current; 20 mA (active) and 150 uA (suspend) Fully integrated clock generation with no external crystal required Extended operating temperature range; -40 to 85⁰C Data transfer rates from 300 baud to 3M baud (RS422, RS485, and RS232) at TTL levels Available in compact Pb-free, RoHS compliant packages: PWM Controller • 48-pin WQFN UART interface support for 7 or 8 data bits, 1 or 2 stop bits and odd / even / mark / space / no parity • 44-pin LQFP • 32-pin WQFN USB Battery Charger Detection allowing optimized charging profile • 28-pin SSOP The FT51A is a multi-featured device that can be targeted at a wide range of functions or applications: Industry compatible 8051 core running at a maximum frequency of 48MHz. 8 KB of data memory 16 KB of multi-time programmable (MTP) memory 16 KB of shadow memory for fast read access by the core. Neither the whole nor any part of the information contained in, or the product described in this manual, may be adapted or reproduced in any material or electronic form without the prior written consent of the copyright holder. This product and its documentation are supplied on an as-is basis and no warranty as to their suitability for any particular purpose is either made or implied. Future Technology Devices International Ltd will not accept any claim for damages howsoever arising as a result of use or failure of this product. Your statutory rights are not affected. This product or any variant of it is not intended for use in any medical appliance, device or system in which the failure of the product might reasonably be expected to result in personal injury. This document provides preliminary information that may be subject to change without notice. No freedom to use patents or other intellectual property rights is implied by the publication of this document. Future Technology Devices International Ltd, Unit 1, 2 Seaward Place, Centurion Business Park, Glasgow G41 1HH United Kingdom. Scotland Registered Company Number: SC136640 Copyright © 2014 Future Technology Devices International Limited 1 FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 Document No.: FT_000877 Clearance No.: FTDI#420 1 Typical Applications USB Data Acquisition General Purpose Microcontroller Sensor and Monitoring control Mass storage data transfers across all segments, including medical, industrial datalogger, power-metering, and test instrumentation USB to RS232/RS422/RS485 Converters Incorporate USB interface to enable PC transfers for development system development Interfacing MCU/PLD/FPGA based designs to add USB connectivity Industrial equipment control systems POS systems USB Bar Code Readers Internet of things application Home automation control systems 1.1 Part Numbers Part Number Package FT51AQ-x 48 Pin QFN FT51AL-x 44 Pin LQFP FT51BQ-x 32 Pin QFN FT51CS-x 28 Pin SSOP Table 1-1 – Part Numbers Note: Packing codes for x is: R: Taped and Reel U: Tube packing T: Tray packing 1.2 Package Quantities Package Type Package Dimension Packing qty per Reel/Tube/Tr ay FT51CS-R FT51CS-U FT51BQ-R FT51BQ-T FT51AL-R FT51AL-T FT51AQR FT51AQ-T SSOP28 SSOP28 QFN 32 QFN 32 LQFP 44 LQFP 44 QFN 48 QFN 48 10.2*7.8*2.0 10.2*7.8*2 .0 6*6*0.75 6*6*0.7 5 10*10*1 .4 10*10*1 .4 7*7*0.7 5 7*7*0.7 5 2000 47 3000 490 1000 160 3000 490 Table 1-2 – Package Quantities Copyright © 2014 Future Technology Devices International Limited 2 FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 Table of Contents 1 2 3 Document No.: FT_000877 Clearance No.: FTDI#420 Typical Applications ....................................................................... 2 1.1 Part Numbers...................................................................................... 2 1.2 Package Quantities ............................................................................. 2 Device Pin Out and Signal Description ........................................... 5 2.1 Pin Out - 28 pin SSOP ........................................................................ 5 2.2 Pin Out - 32 pin WQFN ....................................................................... 6 2.3 Pin Out - 44-Pin LQFP ........................................................................ 7 2.4 Pin Out - 48-Pin WQFN ....................................................................... 8 2.5 Pin Configuration Description ............................................................. 9 Functional Description ................................................................. 11 3.1 Key Features ..................................................................................... 11 3.1.1 Functional Integration ................................................................................................ 11 3.1.2 8051 Core................................................................................................................. 11 3.1.2.1 On-chip Debugger ............................................................................................... 12 3.1.2.2 UART / FTDI UART .............................................................................................. 12 3.2 Functional Block Descriptions ........................................................... 12 3.2.1 8051 Ports 0 - 3 ........................................................................................................ 12 3.2.2 Timers and Watchdog ................................................................................................. 12 3.2.3 PLL Control ............................................................................................................... 12 3.2.4 16KB Multi-Time Programmable (MTP) memory ............................................................. 13 3.2.5 8KB Data RAM ........................................................................................................... 13 3.2.6 16KB Shadow RAM..................................................................................................... 13 3.2.7 Special Function Register ............................................................................................ 13 3.2.8 IO Registers .............................................................................................................. 13 3.2.9 LDO Regulators ......................................................................................................... 13 3.2.10 BCD Detect ............................................................................................................ 13 3.2.11 USB XCVR ............................................................................................................. 13 3.2.12 IO Multiplexer ........................................................................................................ 14 3.2.13 I2C Master ............................................................................................................. 14 3.2.14 I2C Slave ............................................................................................................... 14 3.2.15 SPI Slave .............................................................................................................. 14 3.2.16 SPI Master............................................................................................................. 15 3.2.17 Debugger .............................................................................................................. 15 3.2.18 245 FIFO ............................................................................................................... 15 3.2.19 PWM ..................................................................................................................... 16 3.2.20 Digital IO pins ........................................................................................................ 16 3.2.21 Analogue IO pins .................................................................................................... 16 3.2.22 ADC ...................................................................................................................... 16 Copyright © 2014 Future Technology Devices International Limited 3 FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 3.2.23 4 5 Device Characteristics and Ratings .............................................. 18 4.1 Absolute Maximum Ratings............................................................... 18 4.2 DC Characteristics............................................................................. 19 4.3 MTP Memory Reliability Characteristics ............................................ 23 4.4 Internal Clock Characteristics ........................................................... 23 4.5 Digital IO AC Characteristics ............................................................. 24 4.6 Analogue IO Characteristics ............................................................. 25 USB Power Configurations ........................................................... 26 5.1 6 7 8 Document No.: FT_000877 Clearance No.: FTDI#420 DAC ...................................................................................................................... 16 USB Bus Powered Configuration ....................................................... 26 Connection Examples ................................................................... 27 6.1 USB Upstream and downstream port connections (48pin package) .. 27 6.2 USB Upstream and downstream port connections (44pin package) .. 28 6.3 USB Upstream port connections (32pin package) ............................. 28 6.4 USB Upstream port connections (28pin package) ............................. 29 Package Parameters .................................................................... 30 7.1 48-Pin WQFN Package Outline .......................................................... 30 7.2 44-Pin LQFP Package Outline ............................................................ 31 7.3 32-Pin WQFN Package Outline .......................................................... 32 7.4 28-Pin SSOP Package Outline ........................................................... 33 7.5 Solder Reflow Profile ........................................................................ 34 Contact Information .................................................................... 35 Appendix A – References ........................................................................... 36 Appendix B - List of Figures and Tables ..................................................... 37 Appendix C – List of IO registers ............................................................... 39 Appendix D - Revision History ................................................................... 44 Copyright © 2014 Future Technology Devices International Limited 4 FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 Document No.: FT_000877 Clearance No.: FTDI#420 2 Device Pin Out and Signal Description FT51A is available in 4 packages: 28 pin SSOP, 32 pin WQFN, 44 pin LQFP and 48 pin WQFN. DEBUGGER 15 GND AIO10 AIO11 AIO14 AIO15 UP_DP UP_DM AIO7 AIO6 AIO5 AIO4 VCC5V 28 VOUT3V3 2.1 Pin Out - 28 pin SSOP DIO15 DIO14 DIO13 DIO12 DIO11 DIO10 DIO9 GND DIO8 RST DIO3 DIO2 DIO1 DIO0 1 14 FTDI XXXXXXXXXXXX FT51CS YYWW-X Figure 2-1 - 28 Pin SSOP Package Copyright © 2014 Future Technology Devices International Limited 5 FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 Document No.: FT_000877 Clearance No.: FTDI#420 DIO8 5 DIO9 6 DIO10 DIO11 DIO3 DIO2 DIO1 DIO0 VOUT3V3 VCC5V AIO4 25 4 26 RST 27 3 28 DIO7 29 2 30 DIO6 31 1 32 DIO5 DIO4 2.2 Pin Out - 32 pin WQFN 24 AIO5 23 AIO6 22 AIO7 21 UP_DM 20 UP_DP 19 AIO15 7 18 AIO14 8 17 AIO11 FTDI 9 10 11 12 13 14 15 16 DIO12 DIO13 DIO14 DIO15 DEBUGGER GND GND AIO10 XXXXXXXXXX FT51BQ YYWW-X Figure 2-2 - 32 Pin WQFN Package Copyright © 2014 Future Technology Devices International Limited 6 FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 Document No.: FT_000877 Clearance No.: FTDI#420 DIO3 DIO2 DIO1 DIO0 VOUT3V3 VCC5V AIO0 AIO1 AIO2 AIO3 20 21 22 AIO12 16 19 15 17 14 18 12 13 AIO11 11 AIO10 DIO13 AIO9 10 AIO8 DIO12 GND 9 GND DIO11 GND 8 DEBUGGER DIO10 XXXXXXXXXX FT51AL YYWW-X DIO15 7 FTDI DIO14 DIO9 34 6 35 VCCIO 36 5 37 DIO8 38 4 39 RST 40 3 41 DIO7 42 2 43 1 DIO6 44 DIO5 DIO4 2.3 Pin Out - 44-Pin LQFP 33 AIO4 32 AIO5 31 AIO6 30 AIO7 29 UP_DM 28 UP_DP 27 DW_DM 26 DW_DP 25 AIO15 24 AIO14 23 AIO13 Figure 2-3 - 44 Pin LQFP Package Copyright © 2014 Future Technology Devices International Limited 7 FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 VCC5V AIO3 VOUT3V3 AIO1 VREF AIO2 DIO0 AIO0 DIO1 DIO3 37 DIO2 38 42 39 43 41 44 40 46 47 45 48 GND Document No.: FT_000877 Clearance No.: FTDI#420 2.4 Pin Out - 48-Pin WQFN DIO4 1 36 DIO5 2 FTDI DIO6 3 DIO7 4 XXXXXXXXXX FT51AQ YYWW-X RST 5 DIO8 6 VCCIO 7 GND 8 AIO4 35 AIO5 34 AIO6 33 AIO7 32 UP_DM 31 UP_DP 30 DW_DM 29 DW_DP AIO9 AIO10 AIO11 AIO12 GND DIO13 23 19 24 18 22 17 20 16 21 14 15 13 AIO8 25 AIO13 GND 26 AIO14 DIO12 12 GND DIO11 11 DIO15 AIO15 DEBUGGER GND 27 DIO14 28 DIO10 10 DIO9 9 Figure 2-4 - 48 Pin WQFN Package Copyright © 2014 Future Technology Devices International Limited 8 FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 Document No.: FT_000877 Clearance No.: FTDI#420 2.5 Pin Configuration Description Pin Nos. Name 48 pin 44 pin 32 pin 28 pin 42 38 26 27 7 6 - - 43 39 27 28 8, 17, 18, 19, 28, 41, 49* 15,16, 17 14,15, 33* 7, 16 ** VCC5V VCCIO ** VOUT3V3 GND Type POWER Input POWER Input POWER Output POWER Input Description 5 V (or 3.3 V) supply to IC 1.8V – 3.3V supply for the IO pins . This option is ONLY available on the 44 & 48 pin packages. A fixed 3.3V supply from the internal regulator is supplied to the IO pins for the 28 and 32 pin packages 3.3V regulator output. May be used to power VCCIO pin. Note that a 100nF capacitor should be connected to VOUT3V3 for proper operation. This output can also be used to power external circuitry up to a maximum current rating of 50mA (typ). Ground Table 2-1 – Power and Ground * Pin 49 of WQFN48 or pin 33 of WQFN32 is the exposed centre pad under the packaged IC. Connect to GND. ** If VCC5V is supplied by 3.3V then VOUT3V3 must also be driven by the same 3.3V source. Copyright © 2014 Future Technology Devices International Limited 9 FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 Document No.: FT_000877 Clearance No.: FTDI#420 Pin Nos. Name 48 pin 44 pin 32 pin 28 pin 30 27 - - DW_DM 29 26 - - DW_DP 32 29 21 22 UP_DM 31 28 20 21 UP_DP 5 4 4 5 44 - - 16 14 13 Type Description INPUT/ Downstream USB Data Signal Minus. OUTPUT INPUT/ OUTPUT INPUT/ OUTPUT INPUT/ Downstream USB Data Signal Plus. Upstream USB Data Signal Minus. OUTPUT Upstream USB Data Signal Plus. RST INPUT Device Reset. Active HIGH - VREF INPUT Reference voltage for DACs – ONLY available on 48-pin package 15 DEBUGG ER INPUT/ P1.0_ P1.7 OUTPUT Chip Debug Port 1,2,3 1,2,3,4 1,2,3,7,8 5,6,7 9,10,11,1 2 1,2,3,4 9,10,11 8,9,10 13,14,15 45,46,47, 48 12,13, 11,12, 8,9,10, 11 40,41,42 28,29,3 0 12,13,1 4 43,44 P3.0_ P3.7 (DIO0_D IO15) INPUT/ OUTPUT General Purpose digital IO pins. Weak internal pull up enabled on exit from POR or hardware reset. 31,32 20,21,22, 23 24,25,26, 27 33,34,35, 36 37,38,39, 40 18,19,20, 21 22,23,24, 25 30,31,32, 33 34,35,36, 37 16,17,1 819,22, 23 24,25,2 6 17,18,1 9 20,23,2 4 25,26 P0.0_ P0.7 P2.0_ P2.7 (AIO0_A IO15) INPUT/ OUTPUT DAC and ADC analogue IO pins. Can also be used as digital IO pins. AIO0 – AIO7 have no pull ups when using 44 or 48 pin packages. Table 2-2 – Common Function pins Copyright © 2014 Future Technology Devices International Limited 10 FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 Document No.: FT_000877 Clearance No.: FTDI#420 3 Functional Description Figure 3-1 – FT51A Block Diagram The FT51A acts as a USB hub supporting two downstream ports; the internal 8051 core and other peripherals (SPI, UART, etc.) and an external downstream port (typical devices can be a mouse, keyboard, mass storage device, etc.). The hub can optionally be disabled (under register control) resulting in the 8051 core appearing at the upstream port. 3.1 Key Features 3.1.1 Functional Integration Fully integrated MTP memory with built in shadow RAM for fast memory access, internally generated clock, Power-On-Reset (POR) and LDO regulators. 3.1.2 8051 Core The FT51A is based around the industry standard 8051 microcontroller capable of running at a maximum frequency of 48MHz. The core is an ultra-high performance, speed optimized single-chip 8-bit embedded controller dedicated for operation with fast on-chip memories. Copyright © 2014 Future Technology Devices International Limited 11 FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 Document No.: FT_000877 Clearance No.: FTDI#420 3.1.2.1 On-chip Debugger The 8051 works with a high‐performance “Hardware Assisted Debugger” which manages the communication between the core and the software. 3.1.2.2 UART / FTDI UART There are two UARTs in the system – one designed by FTDI and the second incorporated within the 8051 core. The 8051 UART has a maximum baud rate of up to 60kbps. The FTDI UART gives speeds up to 3Mbps. When the data and control bus are configured in UART mode, the interface implements a standard asynchronous serial UART port with full modem control. The UART can support baud rates from 183 baud to 3 Mbaud. The maximum UART speed is limited by the CPU clock. The following maximum UART speed apply: CPU Frequecy Maximum UART Speed 48 Mhz 3 Mbaud 24 Mhz 3 Mbaud 12 Mhz 1.5 Mbaud 3.2 Functional Block Descriptions The following paragraphs detail each function within the FT51A. Please refer to the block diagram shown in Figure 3.1 3.2.1 8051 Ports 0 - 3 The 8051 core has four 8‐bit bi‐directional ports: P0, P1, P2 and P3. These ports can be fully or partially mapped to external pins on the AIO and DIO bus. Firmware can change the pin mapping through IOMUX programming. Table 3-1 shows the default pin mapping for all the 4 ports on the LQFP44 and WQFN48 packages. PIN TYPE DESCRIPTION AIO7 - AIO0 Input / output P0.7 – P0.0 AIO15 - AIO8 Input / output P2.7 – P2.0 DIO7 - DIO0 Input / output P1.7 – P1.0 DIO15 - DIO8 Input / output P3.7 – P3.0 Table 3-1 – 8051 Ports 3.2.2 Timers and Watchdog Apart from standard 8051 timers the FT51A has four general purpose 16-bit timers A, B, C and D. A 32bit watchdog timer is also provided. 3.2.3 PLL Control The block provides an internally generated 48MHz clock to the system without the need of an external reference clock. This block is trimmed at factory test to 48MHz. During USB transactions the PLL will provide an accurate clock, locked to the incoming USB data rate. Copyright © 2014 Future Technology Devices International Limited 12 FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 Document No.: FT_000877 Clearance No.: FTDI#420 3.2.4 16KB Multi-Time Programmable (MTP) memory 16K bytes of MTP memory is available for firmware programming. Code stored with the MTP memory is copied to the Shadow RAM on power up or an external reset. See section 3.2.6 3.2.5 8KB Data RAM 8K bytes of data RAM are provided. 3.2.6 16KB Shadow RAM To facilitate fast program memory access, limit any bottlenecks and to allow fast programming times in a debug environment, a shadow RAM exists that the CPU will run from. The Shadow RAM has the following features: The contents of the MTP are copied to the shadow RAM after a system reset – i.e. a POR reset or a pin reset. A single command (register write access) initiates a hard copy of the program memory – i.e. the contents of the shadow ram are copied to the MTP. 3.2.7 Special Function Register The 8051 core has a special function register area (SFR) and is limited to 128 locations. This area facilitates access to IO registers and FT120 command/data through in-direct addressing method. 3.2.8 IO Registers The FT51A contains approximately 300 IO registers. See Appendix C for a full list of the IO registers. 3.2.9 LDO Regulators The +3.3V LDO regulator generates the +3.3V reference voltage for driving the USB transceiver cell output buffers. It requires an external decoupling capacitor to be attached to the regulator output pin. The main function of the LDO is to power the USB Transceiver and the Reset Generator Cells rather than to power external logic. However, it can be used to supply external circuitry requiring a +3.3V nominal supply with a maximum current of 50mA. The +1.8V LDO regulator generates the +1.8V supply voltage for internal digital circuits. 3.2.10 BCD Detect Special circuitry inside the FT51A detects when the USB upstream port is connected to a dedicated charging port. When it detects that it is connected to a dedicated charging port, the FT51A can use DIO or AIO pin to notify a microcontroller or logic on the application board which in turn controls the battery charging circuits. 3.2.11 USB XCVR The USB Transceiver Cell provides the USB 1.1 full-speed physical interface to the USB cable. The output drivers provide +3.3V level slew rate control signalling, whilst a differential input receiver and two single ended input receivers provide USB data in, Single-Ended-0 (SE0) and USB reset detection conditions respectfully. This function also incorporates a 1.5kΩ pull up resistor on the USBUPDP pin. Copyright © 2014 Future Technology Devices International Limited 13 FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 3.2.12 IO Multiplexer Document No.: FT_000877 Clearance No.: FTDI#420 With the addition of the IO multiplexer any function can be configured to any DIO pin, excluding the analogue DAC/ADC functions which are constrained to the AIO pins. All other digital functionality are recommended to map to DIO pins. The IO multiplexer allows the designer to select which peripherals are connected to which IO pins. In order to assign a signal to a particular pin, two register writes are required, one to select the signal and the other to select the IO pin. The FT51A Programmer’s Guide details the pins and signals which can be connected. The selectable peripheral interfaces are only limited by the number of IO pins available. The number of IOs available is dependent on the package type. Table 3-2 lists the peripherals which can be multiplexed to IO and the typical number of pins required for each one. The designer can choose any mix of peripheral configurations as long as they are within the specific package IO pin count. Peripherals Number of pins required (typical) UART (FTDI) 4 UART (DCD) 2 ADC/DAC 16 8051 Port 0-3 32 SPI Master 4 SPI Slave 4 245 FIFO 12 I2C Master 2 I2C Slave 2 PWM 8 Table 3-2 – Peripheral Pin Requirements 3.2.13 I2C Master The FT51A provides an interface between the core and an I2C bus. It can be programmed to operate with arbitration and clock synchronization allowing it to operate in multi‐master systems. I2C Master supports transmission speeds up to 3.4 Mb/s including Normal, Fast and High Speed modes. 3.2.14 I2C Slave The FT51A provides an interface between the core and an I2C bus. It can work as a slave receiver or transmitter depending on the working mode determined by the core. The core incorporates all features required by the I2C specification. The Slave supports all the transmission modes: Standard, Fast, Fast‐ plus and High Speed. Clock stretching is supported. 3.2.15 SPI Slave The Serial Peripheral Interface Bus is an industry standard communications interface. Devices communicate in Master / Slave mode, with the Master initiating the data transfer. Copyright © 2014 Future Technology Devices International Limited 14 FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 Document No.: FT_000877 Clearance No.: FTDI#420 SPI slave module has four signals – clock, slave select, MOSI (master out – slave in) and MISO (master in – slave out). 3.2.16 SPI Master CLK SS# SPI Master MOSI External - SPI Slave MISO Figure 3-2 – SPI Master The SPI Master interface is used to interface to applications such as SD Cards. The main purpose of the SPI Master block is to transfer data between an external SPI interface and the FT51A. It does this under the control of the CPU and DMA engine via the on-chip IO bus. SPI master module has seven signals – clock, slave select 0..3, MOSI (master out – slave in) and MISO (master in – slave out). The SPI Master protocol by default does not support any form of handshaking and the only available mode is unmanaged. The SPI Master clock can operate up to half of the CPU system clock: CPU running at 48 Mhz would set the SPI maximum clock to 24 Mhz CPU running at 24 Mhz would set the SPI maximum clock to 12 Mhz CPU running at 12 Mhz would set the SPI maximum clock to 6 Mhz 3.2.17 Debugger The purpose of the debugger interface is to provide the Integrated Development Environment (IDE) with the following capabilities: MTP Erase, Write and Program. Application debug - application code can have breakpoints, be single stepped and can be halted. Detailed internal debug - memory read/write access. The single wire interface has the following features: Half Duplex Operation 1Mbps speed 1 start bit 1 stop bit 8 data bits Pull up 3.2.18 245 FIFO The 245 FIFO interface operating in asynchronous mode has an eight bit data bus, individual read and write strobes with two hardware flow control signals. Copyright © 2014 Future Technology Devices International Limited 15 FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 3.2.19 Document No.: FT_000877 Clearance No.: FTDI#420 PWM The Pulse Width Modulation (PWM) block can generate a signal in which parameters such as period and duty cycle are controlled by the 8051 core. It provides 8 outputs and can generate a core interrupt if set. The main purpose is to generate PWM signals which can be used to control motors, DC/DC converters, AC/DC supplies, etc. 3.2.20 Digital IO pins Up to 16 General Purpose digital IO pins are available depending on package type. 3.2.21 Analogue IO pins Up to 16 AIO pins are available depending on package type. The pin can function in either analogue or digital mode, but not both modes at the same time. When in analogue mode all 16 AIO pins can be configured to the following modes : ADC, DAC or Analogue Event Mode. AIO_mode_1 AIO_mode_0 Configuration 0 0 Analogue off. Pin configured for digital mode, can be controlled similar to digital IO pins. 0 1 DAC mode. Output analogue signal from DAC convertor. 1 0 ADC mode. Input analogue signal for the internal ADC convertor. 1 1 Analogue Event mode. Trig an interrupt when the input voltage is higher than a reference voltage. Table 3-3 – AIO Modes To configure these modes specific registers of the AIOs must be configured. On top of these modes sits a global mode which allows multiple control of AIO pins. All 16 pins can be configured depending on package type. 3.2.22 ADC The ADC block can convert the analogue input signal to a digital value and store the value in the registers. The ADC block can be configured to work in single-ended mode and differential mode. In single-ended mode, an input signal from any of the AIO pins can be the input to the ADC block, with the reference voltage connected to VOUT3V3. In differential mode, two AIO pins are used together to form a pair of differential inputs. The voltage difference between these two pins will be converted to digital values. The ADC supports single sample and global sample. In single sample mode only one selected AIO input will be sampled at a time. In global sample mode, all the selected AIO inputs will be sampled at the same time. The sample and hold settling time of the ADC is programmable. Once conversion is done, the respective interrupt bit will be set, and an interrupt can be generated if enabled. The accuracy of the ADC convertor is 8-bit. 3.2.23 DAC The FT51A includes four Digital to Analogue converters (DAC). Each DAC is shared among four AIO pins. DAC_0 can output analogue signal to AIO0 – AIO3 pins, DAC_1 can output analogue signal to AIO4 – Copyright © 2014 Future Technology Devices International Limited 16 FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 Document No.: FT_000877 Clearance No.: FTDI#420 AIO7 pins, DAC_2 can output analogue signal to AIO8 – AIO11 pins, and DAC_3 can output analogue signal to AIO12 – AIO15 pins. The reference voltage of the DAC block is VREF pin for the WQFN48 package. For other packet the reference voltage is from VOUT3V3 pin. The DAC supports single sample and global sample. In single sample mode only one digital data will be converted to the selected AIO pin at a time. In global sample mode, all the selected DACs will convert and output voltage to selected AIO pins at the same time. The conversion settling time of the ADC is programmable. Once conversion is done, the respective interrupt bit will be set, and an interrupt can be generated if enabled. The accuracy of the DAC convertor is 8-bit. Copyright © 2014 Future Technology Devices International Limited 17 FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 4 Document No.: FT_000877 Clearance No.: FTDI#420 Device Characteristics and Ratings 4.1 Absolute Maximum Ratings The absolute maximum ratings for the FT51A devices are as follows. These are in accordance with the Absolute Maximum Rating System (IEC 60134). Exceeding these may cause permanent damage to the device. Parameter Value Unit Storage Temperature -65°C to 150°C Degrees C Conditions 168 Hours Floor Life (Out of Bag) At Factory Ambient (30°C / 60% Relative Humidity) (IPC/JEDEC JSTD-033A MSL Level 3 Compliant)* Ambient Operating Temperature (Power Applied) -40°C to 85°C Degrees C VCC5V Supply Voltage -0.3 to +6.0 V VCCIO IO Voltage -0.3 to +3.8 V DC Input Voltage – USB DP/DM pins -0.5 to +3.8 V Hours -0.3 to DC Input Voltage – digital pins (powered from VCCIO) + (VCCIO DC Output Current – Outputs 22 V +0.5) mA Table 4-1 – Absolute Maximum Ratings * If devices are stored out of the packaging beyond this time limit the devices should be baked before use. The devices should be ramped up to a temperature of +125°C and baked for up to 17 hours. Copyright © 2014 Future Technology Devices International Limited 18 FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 Document No.: FT_000877 Clearance No.: FTDI#420 4.2 DC Characteristics DC Characteristics (Ambient Temperature = -40°C to +85°C) Parameter Description Minimum Typical Maximum Units Conditions Vcc1 VCC5V Operating Supply Voltage 4.0 5 5.5 V Normal Operation VCC5V and VOUT3V3 pins must connect to the same 3V3 power source Vcc2 VCC5V Operating Supply Voltage 3.0 3.3 3.6 V Vio1 VCCIO Operating Supply Voltage 3.0 3.3 3.6 V Vio2 VCCIO Operating Supply Voltage 2.3 2.5 2.7 V Vio3 VCCIO Operating Supply Voltage 1.65 1.8 1.95 V Icc1 Operating Supply Current 6.5 20 28.3 mA Normal Operation at 48MHz Icc2 Operating Supply Current μA USB Suspend, internal clock stops VOUT3V3 3.3v regulator output V VCC5V=4.0-5.5V 150 3.0 3.3 3.6 Table 4-2 – Operating Voltage and Current Copyright © 2014 Future Technology Devices International Limited 19 FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 Parameter Description Minimum Document No.: FT_000877 Clearance No.: FTDI#420 Typical Maximum Units Conditions Ioh = +/-2mA 2.9 2.9 Voh Output Voltage High 2.9 2.9 VCCIO VCCIO V VCCIO VCCIO V IO Drive strength = 8mA VCCIO VCCIO V IO Drive strength = 12mA VCCIO VCCIO V IO Drive strength = 16mA IO Drive strength = 4mA Iol = +/-2mA Vol Output Voltage Low 0 0.4 V 0 0.4 V IO Drive strength = 8mA 0 0.4 V IO Drive strength = 12mA 0 0.4 V IO Drive strength*= 16mA 0.8 V LVTTL V LVTTL IO Drive strength = 4mA Vil Input low Switching Threshold Vih Input High Switching Threshold Vt Switching Threshold 1.49 V Vt- Schmitt trigger negative going threshold voltage 1.15 V Vt+ Schmitt trigger positive going threshold voltage 1.64 V Rpu Input pull-up resistance 40 75 190 KΩ Vin = 0 Rpd Input pull-down resistance 40 75 190 KΩ Vin =VCCIO Iin Input Leakage Current -10 +/-1 10 μA Vin = 0 2.0 Table 4-3 – IO Characteristics VCCIO = +3V3 Copyright © 2014 Future Technology Devices International Limited 20 FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 Parameter Description Minimum Document No.: FT_000877 Clearance No.: FTDI#420 Typical Maximum Units Conditions Ioh = +/-2mA Voh Output Voltage High 2.25 VCCIO VCCIO V 2.25 VCCIO VCCIO V IO Drive strength* = 8mA 2.25 VCCIO VCCIO V IO Drive strength = 12mA 2.25 VCCIO VCCIO V IO Drive strength = 16mA IO Drive strength* = 4mA Iol = +/-2mA Vol Output Voltage Low 0 0.4 V 0 0.4 V IO Drive strength = 8mA 0 0.4 V IO Drive strength = 12mA 0 0.4 V IO Drive strength = 16mA 0.8 V LVTTL V LVTTL IO Drive strength = 4mA Vil Input low Switching Threshold Vih Input High Switching Threshold Vt Switching Threshold 1.1 V Vt- Schmitt trigger negative going threshold voltage 0.8 V Vt+ Schmitt trigger positive going threshold voltage 1.2 V Rpu Input pull-up resistance 40 75 190 KΩ Vin = 0 Rpd Input pull-down resistance 40 75 190 KΩ Vin =VCCIO Iin Input Leakage Current -10 +/-1 10 μA Vin = 0 1.7 Table 4-4 – IO Characteristics VCCIO = +2V5 Copyright © 2014 Future Technology Devices International Limited 21 FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 Parameter Description Minimum Document No.: FT_000877 Clearance No.: FTDI#420 Typical Maximum Units Conditions Ioh = +/-2mA Voh Output Voltage High 1.62 VCCIO VCCIO V 1.62 VCCIO VCCIO V IO Drive strength* = 8mA 1.62 VCCIO VCCIO V IO Drive strength* = 12mA 1.62 VCCIO VCCIO V IO Drive strength* = 16mA IO Drive strength* = 4mA Iol = +/-2mA Vol Output Voltage Low 0 0.4 V 0 0.4 V IO Drive strength* = 8mA 0 0.4 V IO Drive strength* = 12mA 0 0.4 V IO Drive strength* = 16mA 0.63 V LVTTL V LVTTL IO Drive strength* = 4mA Vil Input low Switching Threshold Vih Input High Switching Threshold Vt Switching Threshold 0.77 V Vt- Schmitt trigger negative going threshold voltage 0.557 V Vt+ Schmitt trigger positive going threshold voltage 0.893 V Rpu Input pull-up resistance 40 75 190 KΩ Vin = 0 Rpd Input pull-down resistance 40 75 190 KΩ Vin =VCCIO Iin Input Leakage Current -10 +/-1 10 μA Vin = 0 1.17 Table 4-5 – IO Characteristics VCCIO = +1V8 * The IO drive strength and slow slew-rate are configurable in the IO registers. Copyright © 2014 Future Technology Devices International Limited 22 FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 Parameter Description Minimum Document No.: FT_000877 Clearance No.: FTDI#420 Typical Maximum Units Conditions Voh Output Voltage High 2.8 V Vol Output Voltage Low 0.2 V Vil Input low Switching Threshold 0.8 V Vih Input High Switching Threshold 2.0 V Table 4-6 – USB DP/DM Pin Characteristics 4.3 MTP Memory Reliability Characteristics The internal 16K Byte MTP memory has the following reliability characteristics: Parameter Value Unit Data Retention 10 Years Write Cycle 2,000 Cycles Read Cycle Unlimited Cycles Table 4-7 – MTP Memory Characteristics 4.4 Internal Clock Characteristics The internal Clock Oscillator has the following characteristics: Value Parameter Unit Minimum Typical Maximum Frequency of Operation (see Note 1) 47.98 48.00 48.02 MHz Duty Cycle 45 50 55 % Table 4-8 – Internal Clock Characteristics Note 1: Equivalent to +/-1667ppm Copyright © 2014 Future Technology Devices International Limited 23 FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 Document No.: FT_000877 Clearance No.: FTDI#420 4.5 Digital IO AC Characteristics Please refer to the DIO section of the FT51A Programmer’s Guide on how to enable / disable the Schmitt trigger, control the slew rate and determine drive strength. Parameter Value Input load load 0.004pF 1.32pF Timings tplh tphl tplh tphl 0 1.25 0.98 2.48 2.13 1 1.27 1.08 2.51 2.24 (ns) Schmitt Trigger Output Timings (ns) 6pF Slew Rate = Normal tplh 120pF tphl tplh tphl 00 3.33 2.37 13.34 11.13 01 3.13 2.21 8.22 6.78 10 3.02 2.15 6.46 5.32 11 2.95 2.10 5.57 4.59 Drive Strength Output Timings (ns) 6pF Slew Rate 120pF = Slow tplh tphl 00 3.33 2.37 13.34 01 3.33 2.37 9.24 7.81 2.4 7.80 6.61 2.39 7.05 5.97 tplh tphl 1.13 Drive Strength 10 11 3.33 3.32 Table 4-9 – Digital IO AC Characteristics Copyright © 2014 Future Technology Devices International Limited 24 FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 Document No.: FT_000877 Clearance No.: FTDI#420 4.6 Analogue IO Characteristics Parameter Description Minimu Maxim m um 3.6 Units Operating voltage VOUT3V3 3.0 Open loop gain Both op amp inputs at 0.1 V from rail 240 V/V Open loop gain Both op amp inputs > 0.3 V from rail 2300 V/V Input offset voltage Difference between input and output in unity Gain mode Output Short Circuit DAC mode; Drive DAC in high (low) and current measure source (sink) current at bond pin Slew Rate Load of 10 kohm + 100pF. measure at midrail Settling time Load of 10 kohm + 100pF; time until output is within 3 mV of input GainBandwidth DAC mode; dacin = VOUT3V3 x 0.9, small signal, product measure amplitude at bond pin Power Supply Rejection Ratio (PSRR) DAC mode (unity gain); 1 kHz on VOUT3V3; load of 10 kohm + 100pF Total Harmonic Distortion, 10 kHz DAC mode, VOUT3V3/2 + 1V (rms) 10 kHz sine wave at dacin, measure THD at bond pin with load of 10 kohm + 100pF 0.11 % Total Harmonic Distortion, 10 kHz, -1dB Common Mode Rejection ratio (CMRR) DAC mode, VOUT3V3/2 + 0.891V (rms) 10 kHz sine wave at dacin, measure THD at bond pin with load of 10 kohm + 100pF 0.09 % Compare output when both op amp inputs are 0.1V, to output when both inputs are 3.2V 2.7 V mV 6.1 mA 1.9 V/uS 2.3 uS 1.9 MHz 61 dB 70 Conditions dB Table 4-10 – Analogue IO Characteristics Copyright © 2014 Future Technology Devices International Limited 25 FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 Document No.: FT_000877 Clearance No.: FTDI#420 5 USB Power Configurations The following sections illustrate a possible USB power configuration for the FT51A. The illustrations have omitted pin numbers for ease of understanding since the pins differ between the various package options. 5.1 USB Bus Powered Configuration VCC Ferrite Bead 1 VCC5V 2 27R 3 27R USBDM USBDP 4 47pF 47pF FT51A 5 SHIELD 10nF GND VCC3V3 GND VCC 100nF + 4.7uF 100nF GND GND Figure 5-1 Bus Powered Configuration Figure 5-1 Illustrates the FT51A in a typical USB bus powered design configuration. A USB bus powered device gets its power from the USB bus. Basic rules for USB bus powered devices are as follows – i) ii) iii) iv) On plug-in to USB, the device should draw no more current than 50mA. In USB Suspend mode the device should draw no more than 500uA. A device that consumes more than 100mA cannot be plugged into a USB bus powered hub. No device can draw more than 500mA from the USB bus. The power descriptors in the internal MTP memory of the FT51A should be programmed to match the current drawn by the device. A ferrite bead is connected in series with the USB power supply to reduce EMI noise from the FT51A and associated circuitry being radiated down the USB cable to the USB host. The value of the Ferrite Bead depends on the total current drawn by the application. A suitable range of Ferrite Beads is available from Laird Technologies (http://www.lairdtech.com) for example Laird Technologies Part # MI0805K601R-10. Copyright © 2014 Future Technology Devices International Limited 26 FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 6 Connection Examples Document No.: FT_000877 Clearance No.: FTDI#420 The following sections illustrate possible connections of the FT51A. 6.1 USB Upstream and downstream port connections (48pin package) Figure 6-1 Application Example showing USB upstream and downstream connection(48pin package) Shown above are the necessary connections to connect the upstream & downstream USB ports. The debugger module is also included for added information should it be required. VREF can be supplied in the 48 pin package only as a reference voltage for the DAC and can be either an externally supplied voltage or connected to the VOUT3V3 supplied from the chip as shown above. Copyright © 2014 Future Technology Devices International Limited 27 FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 Document No.: FT_000877 Clearance No.: FTDI#420 6.2 USB Upstream and downstream port connections (44pin package) Figure 6-2 Application Example showing USB upstream and downstream connection (44pin package) 6.3 USB Upstream port connections (32pin package) Figure 6-3 Application Example showing USB upstream connection (32pin package) Copyright © 2014 Future Technology Devices International Limited 28 FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 Document No.: FT_000877 Clearance No.: FTDI#420 6.4 USB Upstream port connections (28pin package) Figure 6-4 Application Example showing USB upstream connection (28pin package) Copyright © 2014 Future Technology Devices International Limited 29 FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 7 Package Parameters Document No.: FT_000877 Clearance No.: FTDI#420 The FT51A is available in 4 package types. The package is lead (Pb) free, RoHS compliant, and uses a ‘green’ compound. The package is fully compliant with European Union directive 2002/95/EC. 7.1 48-Pin WQFN Package Outline 48 1 FTDI XXXXXXXXXX FT51AQ YYWW-C Line 1 – FTDI Logo Line 2 – Wafer Lot Number Line 3 – FTDI Part Number Line 4 – Date Code, Revision Figure 7-1 48 pin WQFN Package Marking Note: The centre pad on the base of the FT51A is internally connected to ground. Dimensions are in mm. Figure 7-2 48 pin WQFN Package Dimensions Copyright © 2014 Future Technology Devices International Limited 30 FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 7.2 44-Pin LQFP Package Outline Document No.: FT_000877 Clearance No.: FTDI#420 44 1 FTDI XXXXXXXXXX FT51AL YYWW-C Line 1 – FTDI Logo Line 2 – Wafer Lot Number Line 3 – FTDI Part Number Line 4 – Date Code, Revision Figure 7-3 44 pin LQFP Package Marking Figure 7-4 44 pin LQFP Package Dimensions Copyright © 2014 Future Technology Devices International Limited 31 FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 7.3 32-Pin WQFN Package Outline Document No.: FT_000877 Clearance No.: FTDI#420 32 1 FTDI XXXXXXXXXX FT51BQ YYWW-C Line 1 – FTDI Logo Line 2 – Wafer Lot Number Line 3 – FTDI Part Number Line 4 – Date Code, Revision Figure 7-5 32 pin WQFN Package Marking Note: The centre pad on the base of the FT51A is internally connected to ground. Dimensions are in mm. Figure 7-6 32 pin WQFN Package Dimensions Copyright © 2014 Future Technology Devices International Limited 32 FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 7.4 28-Pin SSOP Package Outline FTDI XXXXXXXXXX FT51CS YYWW-C Document No.: FT_000877 Clearance No.: FTDI#420 Line 1 – FTDI Logo Line 2 – Wafer Lot Number Line 3 – FTDI Part Number Line 4 – Date Code, Revision Figure 7-7 28 pin SSOP Package Marking Figure 7-8 28 pin SSOP Package Dimensions Copyright © 2014 Future Technology Devices International Limited 33 FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 Document No.: FT_000877 Clearance No.: FTDI#420 7.5 Solder Reflow Profile The FT51A is supplied in a Pb free package. The recommended solder reflow profile is shown in Error! Reference source not found.. Temperature, T (Degrees C) tp Tp Critical Zone: when T is in the range TL to Tp Ramp Up TL tL TS Max Ramp Down TS Min tS Preheat 25 T = 25º C to TP Time, t (seconds) Figure 7-9 FT51A Solder Reflow Profile The recommended values for the solder reflow profile are detailed in Error! Reference source not found.. Values are shown for both a completely Pb free solder process (i.e. the FT51A is used with Pb free solder), and for a non-Pb free solder process (i.e. the FT51A is used with non-Pb free solder). Profile Feature Pb Free Solder Process Non-Pb Free Solder Process Average Ramp Up Rate (Ts to Tp) 3°C / second Max. 3°C / Second Max. 150°C 100°C Preheat - Temperature Min (Ts Min.) - Temperature Max (Ts Max.) 200°C 150°C - Time (ts Min to ts Max) 60 to 120 seconds 60 to 120 seconds 217°C 183°C 60 to 150 seconds 60 to 150 seconds 260°C 240°C 20 to 40 seconds 20 to 40 seconds Ramp Down Rate 6°C / second Max. 6°C / second Max. Time for T= 25°C to Peak Temperature, Tp 8 minutes Max. 6 minutes Max. Time Maintained Above Critical Temperature TL: - Temperature (TL) - Time (tL) Peak Temperature (Tp) Time within 5°C of actual Peak Temperature (tp) Table 7-1 – Reflow Profile Parameters Copyright © 2014 Future Technology Devices International Limited 34 FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 Document No.: FT_000877 Clearance No.: FTDI#420 8 Contact Information Head Office – Glasgow, UK Unit 1, 2 Seaward Place, Centurion Business Park Glasgow G41 1HH United Kingdom Tel: +44 (0) 141 429 2777 Fax: +44 (0) 141 429 2758 E-mail (Sales) E-mail (Support) E-mail (General Enquiries) [email protected] [email protected] [email protected] Branch Office – Tigard, Oregon, USA 7130 SW Fir Loop Tigard, OR 97223 USA Tel: +1 (503) 547 0988 Fax: +1 (503) 547 0987 E-Mail (Sales) E-Mail (Support) E-Mail (General Enquiries) [email protected] [email protected] [email protected] Branch Office – Shanghai, China Branch Office – Taipei, Taiwan 2F, No. 516, Sec. 1, NeiHu Road Taipei 114 Taiwan, R.O.C. Tel: +886 (0) 2 8797 1330 Fax: +886 (0) 2 8751 9737 E-mail (Sales) E-mail (Support) E-mail (General Enquiries) [email protected] [email protected] [email protected] Room 1103, No. 666 West Huaihai Road, Changning District Shanghai, 200052 China Tel: +86 21 62351596 Fax: +86 21 62351595 E-mail (Sales) E-mail (Support) E-mail (General Enquiries) [email protected] [email protected] [email protected] Web Site http://www.ftdichip.com System and equipment manufacturers and designers are responsible to ensure that their systems, and any Future Technology Devices International Ltd (FTDI) devices incorporated in their systems, meet all applicable safety, regulatory and system-level performance requirements. All application-related information in this document (including application descriptions, suggested FTDI devices and other materials) is provided for reference only. While FTDI has taken care to assure it is accurate, this information is subject to customer confirmation, and FTDI disclaims all liability for system designs and for any applications assistance provided by FTDI. Use of FTDI devices in life support and/or safety applications is entirely at the user’s risk, and the user agrees to defend, indemnify and hold harmless FTDI from any and all damages, claims, suits or expense resulting from such use. This document is subject to change without notice. No freedom to use patents or other intellectual property rights is implied by the publication of this document. Neither the whole nor any part of the information contained in, or the product described in this document, may be adapted or reproduced in any material or electronic form without the prior written consent of the copyright holder. Future Technology Devices International Ltd, Unit 1, 2 Seaward Place, Centurion Business Park, Glasgow G41 1HH, United Kingdom. Scotland Registered Company Number: SC136640 Copyright © 2014 Future Technology Devices International Limited 35 FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 Appendix A – References Document No.: FT_000877 Clearance No.: FTDI#420 Useful Application Notes http://www.ftdichip.com/Support/Documents/TechnicalNotes/TN_100_USB_VID-PID_Guidelines.pdf Programmer’s Guide http://www.ftdichip.com/Support/Documents/ProgramGuides/AN_289_FT51A_Programming_Guide.pdf Copyright © 2014 Future Technology Devices International Limited 36 FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 Document No.: FT_000877 Clearance No.: FTDI#420 Appendix B - List of Figures and Tables List of Figures Figure 2-1 - 28 Pin SSOP Package................................................................................................... 5 Figure 2-2 - 32 Pin WQFN Package .................................................................................................. 6 Figure 2-3 - 44 Pin LQFP Package ................................................................................................... 7 Figure 2-4 - 48 Pin WQFN Package .................................................................................................. 8 Figure 3-1 – FT51A Block Diagram ................................................................................................ 11 Figure 3-2 – SPI Master ............................................................................................................... 15 Figure 5-1 Bus Powered Configuration ........................................................................................... 26 Figure 6-1 Application Example showing USB upstream and downstream connection(48pin package) .... 27 Figure 6-2 Application Example showing USB upstream and downstream connection (44pin package) ... 28 Figure 6-3 Application Example showing USB upstream connection (32pin package) ........................... 28 Figure 6-4 Application Example showing USB upstream connection (28pin package) ........................... 29 Figure 7-1 48 pin WQFN Package Marking ...................................................................................... 30 Figure 7-2 48 pin WQFN Package Dimensions ................................................................................. 30 Figure 7-3 44 pin LQFP Package Marking ....................................................................................... 31 Figure 7-4 44 pin LQFP Package Dimensions .................................................................................. 31 Figure 7-5 32 pin WQFN Package Marking ...................................................................................... 32 Figure 7-6 32 pin WQFN Package Dimensions ................................................................................. 32 Figure 7-7 28 pin SSOP Package Marking ....................................................................................... 33 Figure 7-8 28 pin SSOP Package Dimensions .................................................................................. 33 Figure 7-9 FT51A Solder Reflow Profile .......................................................................................... 34 List of Tables Table 1-1 – Part Numbers .............................................................................................................. 2 Table 1-2 – Package Quantities ...................................................................................................... 2 Table 2-1 – Power and Ground ....................................................................................................... 9 Table 2-2 – Common Function pins ............................................................................................... 10 Table 3-1 – 8051 Ports ................................................................................................................ 12 Table 3-2 – Peripheral Pin Requirements ....................................................................................... 14 Table 3-3 – AIO Modes ................................................................................................................ 16 Table 4-1 – Absolute Maximum Ratings ......................................................................................... 18 Table 4-2 – Operating Voltage and Current .................................................................................... 19 Table 4-3 – IO Characteristics VCCIO = +3V3 ................................................................................ 20 Table 4-4 – IO Characteristics VCCIO = +2V5 ................................................................................ 21 Table 4-5 – IO Characteristics VCCIO = +1V8 ................................................................................ 22 Table 4-6 – USB DP/DM Pin Characteristics .................................................................................... 23 Table 4-7 – MTP Memory Characteristics........................................................................................ 23 Table 4-8 – Internal Clock Characteristics ...................................................................................... 23 Table 4-9 – Digital IO AC Characteristics ....................................................................................... 24 Table 4-10 – Analogue IO Characteristics ...................................................................................... 25 Table 8-1 – Reflow Profile Parameters ........................................................................................... 34 Copyright © 2014 Future Technology Devices International Limited 37 FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 Document No.: FT_000877 Clearance No.: FTDI#420 Table 9-1 – IO Registers .............................................................................................................. 43 Copyright © 2014 Future Technology Devices International Limited 38 FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 Appendix C – List of IO registers Document No.: FT_000877 Clearance No.: FTDI#420 User should refer to the FT51A Programmer’s Guide for more detail. Register Addr(0x.. ) (0x0) (0x1) (0x2) (0x3) (0x4) (0x5) (0x6) (0x9) (0xA) to (0x19) (0x1A) to (0x29) (0x2A) (0x2B) (0x2C) (0x2D) (0x2E) (0x2F) to (0x35) (0x36) (0x37) (0x38) (0x39) (0x3A) to (0x3D) (0x40) (0x41) (0x42) (0x43) (0x44) (0x48) (0x49) (0x4A) (0x4B) (0x4C) (0x4D) (0x4E) (0x50) (0x51) (0x52) (0x53) (0x54) (0x55) (0x56) (0x57) (0x58) (0x59) (0x5A) Register Name Description DEVICE_REGISTER_CONTROL CLOCK_SYSTEM_DIVIDER USB_CONTROL Interrupt_0 Interrupt_EN_0 Interrupt_1 Interrupt_EN_1 PIN_CONFIG DIGITAL_CONTROL_AIO_0 to DIGITAL_CONTROL_AIO15 DIGITAL_CONTROL_DIO0 to DIGITAL_CONTROL_DIO15 AIO_DIFFERENTIAL_ENABLE MTP_MEMORY MTP_PROG_ADDR_L MTP_PROG_ADDR_U MTP_PROG_DATA TOP Control Register System Clock Divisor USB Enable Interrupt Status Register Interrupt Enable Register Interrupt Status Register 1 Interrupt Enable Register 1 Miscellaneous Pin Configuration AIO Pins 0 to 15 Digital Control DIO Pins 0 to 15 Digital Control AIO Differential Pin Enable MTP Memory Control MTP Prog Addr L MTP Prog Addr H MTP Prog Data RESERVED CRC_CONTROL CRC_RESULT_L CRC_RESULT_U SECURITY_LEVEL CRC Control CRC Lower Byte CRC Upper Byte Security Level RESERVED IOMUX_CONTROL IOMUX_OP_PAD_SEL_1 IOMUX_OP_SRC_SEL_1 IOMUX_IP_SNK_SEL_1 IOMUX_IP_PAD_SEL_1 SPI_SLAVE_CONTROL SPI_SLAVE_ADDRESS_1 SPI_SLAVE_TX_DATA_1 SPI_SLAVE_RX_DATA_1 SPI_SLAVE_STAT_ENA_1 SPI_SLAVE_STAT_1 SPI_SLAVE_SETUP_1 SPI_MASTER_CONTROL SPI_MASTER_DATA_TX_ADDR_1 SPI_MASTER_DATA_RX_ADDR_1 SPI_MASTER_STAT_ENA_1 SPI_MASTER_STAT_1 SPI_MASTER_SETUP_1 SPI_MASTER_CLK_DIV_0_ADDR_1 SPI_MASTER_DATA_DELAY_ADDR_1 SPI_MASTER_SS_SETUP_1 SPI_MASTER_TRANSFER_SIZE_LO_ADD R_1 SPI_MASTER_TRANSFER_SIZE_HI_ADD IOMUX Control Register Select Output Pin Register Select Output Source Register Select Input Sink Register Select Input Pin Register SPI_SLAVE Control Register SPI Slave Address SPI Slave Transmit Data SPI Slave Receive Data SPI Slave Status Interrupt Enables SPI Slave Status Interrupt SPI Slave Setup SPI_MASTER Control Register SPI Transmit Data SPI Receive Data SPI Status Interrupt Enables SPI Status Interrupt SPI Setup SPI Clk Divider 0 SPI Data Delay SPI Slave Select Setup SPI Transfer Size Lower Byte SPI Transfer Size Higher Byte Copyright © 2014 Future Technology Devices International Limited 39 FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 Register Addr(0x.. ) Document No.: FT_000877 Clearance No.: FTDI#420 Register Name (0x60) (0x61) (0x62) (0x63) (0x64) (0x65) (0x66) (0x67) (0x68) (0x69) (0x6A) (0x6B) (0x6C) (0x6D) (0x6E) (0x6F) (0x70) (0x71) to (0x74) (0x75) (0x76) (0x77) (0x78) (0x79) (0x7A) (0x7B) (0x7C) (0x7D) (0x80) (0x81) (0x82) R_1 SPI_MASTER_TRANSFER_PENDING_AD DR_1 UART_CONTROL UART_CTRL_1 UART_DATA_RECEIVE_1 UART_DATA_TRANSMIT_1 UART_TX_STAT_ENA_1 UART_TX_STAT_1 UART_RX_STAT_ENA_1 UART_RX_STAT_1 UART_LINE_CTRL_1 UART_BAUD_0_1 UART_BAUD_1_1 UART_BAUD_2_1 UART_FLOW_CTRL_1 UART_FLOW_STAT_1 UART_XON_CHARACTER_1 UART_XOFF_CHARACTER_1 TIMER_CONTROL TIMER_CONTROL_1_1 to TIMER_CONTROL_4_1 TIMER_INT_1 TIMER_SELECT_1 TIMER_WDG_1 TIMER_WRITE_LS_1 TIMER_WRITE_MS_1 TIMER_PRESC_LS_1 TIMER_PRESC_MS_1 TIMER_READ_LS_1 TIMER_READ_MS_1 PWM_CONTROL PWM_CTRL_1 PWM_PRESCALER_1 (0x83) PWM_CNT16_LSB (0x84) PWM_CNT16_MSB (0x85) to (0x94) (0x95) to (0x9C) (0x9D) (0x9E) (0x9F) (0xA0) (0xA1) (0xA2) (0xA3) (0xA4) (0xA5) (0xB0) (0xB1) (0xB2) PWM_CMP16_0_LSB to PWM_CMP16_7_MSB PWM_OUT_TOGGLE_EN_0 to PWM_OUT_TOGGLE_EN_7 PWM_OUT_CLR_EN_1 PWM_CTRL_BL_CMP8_1 PWM_INIT_1 FIFO_CONTROL FIFO_CTRL_STATUS_1 FIFO_RX_DATA_1 FIFO_TX_DATA_1 FIFO_INTERRUPT_ENA_1 FIFO_INTERRUPT_1 DMAIO_REGS_0_CONTROL DMA_ENABLE_1 DMA_IRQ_ENA_1 (0x5B) Description SPI Transfer Pending UART Control Register UART Control UART Receive Data UART Transmit Data UART Tx Status Interrupt Enables UART Tx Status Interrupt UART Rx Status Interrupt Enables UART Rx Status Interrupt UART Line Control UART Baud Register 0 UART Baud Register 1 UART Baud Register 2 UART Flow Control UART Flow Control Status UART XON Character UART XOFF Character TIMER Control Register Timers Control Register 1 to 4 Timers Interrupt Register Timers A..D Select Register Watchdog Start Value Timer A..D Start Value 7:0 Timer A..D Start Value 15:8 Prescaler Start Value 7:0 Prescaler Start Value 15:8 Timer A..D Current Value 7:0 Timer A..D Current Value 15:8 PWM Control Register PWM Control PWM PRESCALER Comparator value PWM COUNTER16 Comparator LSB value PWM COUNTER16 Comparator MSB value PWM Comparator 0 LSB value to PWM Comparator 7 MSB value PWM Out toggle enable 0 PWM Out clear enable PWM Control CMP8 value PWM Init State register FIFO Control Register FIFO Control Status FIFO Receive Data FIFO Transmit Data FIFO Interrupt Enable FIFO Interrupt DMAIO_REGS_0 Control Register IO DMA ENABLE Register DMA IO Interrupt Enable & Control Copyright © 2014 Future Technology Devices International Limited 40 FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 Document No.: FT_000877 Clearance No.: FTDI#420 Register Addr(0x.. ) Register Name (0xB3) DMA_IRQ_1 (0xB4) DMA_SRC_MEM_ADDR_L_1 (0xB5) DMA_SRC_MEM_ADDR_U_1 (0xB6) DMA_DEST_MEM_ADDR_L_1 (0xB7) DMA_DEST_MEM_ADDR_U_1 (0xB8) (0xB9) DMA_IO_ADDR_L_1 DMA_IO_ADDR_U_1 (0xBA) DMA_TRANS_CNT_L_1 (0xBB) DMA_TRANS_CNT_U_1 (0xBC) DMA_CURR_CNT_L_1 (0xBD) DMA_CURR_CNT_U_1 (0xBE) (0xBF) (0xC0) (0xC1) DMA_FIFO_DATA_1 DMA_AFULL_TRIGGER_1 DMAIO_REGS_1_CONTROL DMA_ENABLE_2 (0xC2) DMA_IRQ_ENA_2 (0xC3) DMA_IRQ_2 (0xC4) DMA_SRC_MEM_ADDR_L_2 (0xC5) DMA_SRC_MEM_ADDR_U_2 (0xC6) DMA_DEST_MEM_ADDR_L_2 (0xC7) DMA_DEST_MEM_ADDR_U_2 (0xC8) (0xC9) DMA_IO_ADDR_L_2 DMA_IO_ADDR_U_2 (0xCA) DMA_TRANS_CNT_L_2 (0xCB) DMA_TRANS_CNT_U_2 (0xCC) DMA_CURR_CNT_L_2 (0xCD) DMA_CURR_CNT_U_2 (0xCE) (0xCF) (0xD0) (0xD1) DMA_FIFO_DATA_2 DMA_AFULL_TRIGGER_2 DMAIO_REGS_2_CONTROL DMA_ENABLE_3 (0xD2) DMA_IRQ_ENA_3 (0xD3) DMA_IRQ_3 (0xD4) DMA_SRC_MEM_ADDR_L_3 (0xD5) DMA_SRC_MEM_ADDR_U_3 (0xD6) DMA_DEST_MEM_ADDR_L_3 Description Register DMA IO Interrupt Register DMA IO Source Mem Addr Register (Lower Bits) DMA IO Source Mem Addr Register (Upper Bits) DMA IO Destination Mem Addr Register (Lower Bits) DMA IO Destination Mem Addr Register (Upper Bits) DMA IO Addr Register (Lower Bits) IO DMA IO Addr Register (Upper Bits) IO DMA Transfer Byte Count Register (Lower Bits) IO DMA Transfer Byte Count Register (Upper Bits) IO DMA Current Byte Count Register (Lower Bits) IO DMA Current Byte Count Register (Upper Bits) IO DMA FIFO DATA IO DMA Almost Full Flag Trigger Value DMAIO_REGS_1 Control Register IO DMA ENABLE Register DMA IO Interrupt Enable & Control Register DMA IO Interrupt Register DMA IO Source Mem Addr Register (Lower Bits) DMA IO Source Mem Addr Register (Upper Bits) DMA IO Destination Mem Addr Register (Lower Bits) DMA IO Destination Mem Addr Register (Upper Bits) DMA IO Addr Register (Lower Bits) IO DMA IO Addr Register (Upper Bits) IO DMA Transfer Byte Count Register (Lower Bits) IO DMA Transfer Byte Count Register (Upper Bits) IO DMA Current Byte Count Register (Lower Bits) IO DMA Current Byte Count Register (Upper Bits) IO DMA FIFO DATA IO DMA Almost Full Flag Trigger Value DMAIO_REGS_2 Control Register IO DMA ENABLE Register DMA IO Interrupt Enable & Control Register DMA IO Interrupt Register DMA IO Source Mem Addr Register (Lower Bits) DMA IO Source Mem Addr Register (Upper Bits) DMA IO Destination Mem Addr Register (Lower Bits) Copyright © 2014 Future Technology Devices International Limited 41 FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 Document No.: FT_000877 Clearance No.: FTDI#420 Register Addr(0x.. ) Register Name (0xD7) DMA_DEST_MEM_ADDR_U_3 (0xD8) (0xD9) DMA_IO_ADDR_L_3 DMA_IO_ADDR_U_3 (0xDA) DMA_TRANS_CNT_L_3 (0xDB) DMA_TRANS_CNT_U_3 (0xDC) DMA_CURR_CNT_L_3 (0xDD) DMA_CURR_CNT_U_3 (0xDE) (0xDF) (0xE0) (0xE1) DMA_FIFO_DATA_3 DMA_AFULL_TRIGGER_3 DMAIO_REGS_3_CONTROL DMA_ENABLE_4 (0xE2) DMA_IRQ_ENA_4 (0xE3) DMA_IRQ_4 (0xE4) DMA_SRC_MEM_ADDR_L_4 (0xE5) DMA_SRC_MEM_ADDR_U_4 (0xE6) DMA_DEST_MEM_ADDR_L_4 (0xE7) DMA_DEST_MEM_ADDR_U_4 (0xE8) (0xE9) DMA_IO_ADDR_L_4 DMA_IO_ADDR_U_4 (0xEA) DMA_TRANS_CNT_L_4 (0xEB) DMA_TRANS_CNT_U_4 (0xEC) DMA_CURR_CNT_L_4 (0xED) DMA_CURR_CNT_U_4 (0xEE) (0xEF) (0x100) (0x101) (0x102) to (0x105) (0x106) (0x107) (0x108) (0x109) (0x10A) DMA_FIFO_DATA_4 DMA_AFULL_TRIGGER_4 IO_CELL_CNTRL_CONTROL IO_CELL_GLOBAL_1 IO_CELL_ANA_MODE_0_1 to IO_CELL_ANA_MODE_3_1 (0x10B) IO_CELL_GLOB_CELLS_0_7_1 (0x10C) IO_CELL_GLOB_CELLS_8_15_1 (0x10D) (0x10E) to (0x12D) (0x12E) RESERVED IO_CELL_0_DAC_DATA_L to IO_CELL_15_DAC_DATA_U RESERVED Description DMA IO Destination Mem Addr Register (Upper Bits) DMA IO Addr Register (Lower Bits) IO DMA IO Addr Register (Upper Bits) IO DMA Transfer Byte Count Register (Lower Bits) IO DMA Transfer Byte Count Register (Upper Bits) IO DMA Current Byte Count Register (Lower Bits) IO DMA Current Byte Count Register (Upper Bits) IO DMA FIFO DATA IO DMA Almost Full Flag Trigger Value DMAIO_REGS_3 Control Register IO DMA ENABLE Register DMA IO Interrupt Enable & Control Register DMA IO Interrupt Register DMA IO Source Mem Addr Register (Lower Bits) DMA IO Source Mem Addr Register (Upper Bits) DMA IO Destination Mem Addr Register (Lower Bits) DMA IO Destination Mem Addr Register (Upper Bits) DMA IO Addr Register (Lower Bits) IO DMA IO Addr Register (Upper Bits) IO DMA Transfer Byte Count Register (Lower Bits) IO DMA Transfer Byte Count Register (Upper Bits) IO DMA Current Byte Count Register (Lower Bits) IO DMA Current Byte Count Register (Upper Bits) IO DMA FIFO DATA IO DMA Almost Full Flag Trigger Value IO_CELL_CNTRL Control Register IO_CELL Global CTRL Register Analogue Mode Select for Cells 0-15. RESERVED IO_CELL_SAMPLE_0_7_1 IO_CELL_SAMPLE_8_15_1 Initiates a SAMPLE of IO_CELL 0 to 7 Initiates a SAMPLE of IO_CELL 8 to 15 Selects the IO_CELLs to be included in a Global function Selects the IO_CELLs to be included in a Global function Input Data to DAC controlling Cell 0 to Input Data to DAC controlling Cell 15 Copyright © 2014 Future Technology Devices International Limited 42 FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 Register Addr(0x.. ) to (0x13D) (0x13E) to (0x15D) (0x15E) to (0x16D) (0x16E) (0x16F) (0x170) (0x171) (0x172) (0x173) (0x174) (0x175) Document No.: FT_000877 Clearance No.: FTDI#420 Register Name Description IO_CELL_0_ADC_DATA_L to IO_CELL_15_ADC_DATA_U Output Data from ADC Cell 0 to Output Data from ADC Cell 15 RESERVED IO_CELL_INT_0_1 IO_CELL_INT_0_EN_1 IO_CELL_INT_1_1 IO_CELL_INT_1_EN_1 Interrupt register Cells 0-7 Enable register Interrupts 0-7 Interrupt register for Cells 8-15 Enable register Interrupts 16-23 RESERVED IO_CELL_DAC_COUNTER_L_1 IO_CELL_DAC_COUNTER_U_1 (0x176) IO_CELL_SH_COUNTER_L_1 (0x177) IO_CELL_SH_COUNTER_U_1 (0x178) (0x179) (0x17A) (0x17B) DAC Settling time counter, lower 8 bits DAC Settling time counter, upper 2 bits Sample&Hold Settling time counter, lower 8 bits Sample&Hold Settling time, upper 2 bits RESERVED IO_CELL_CLK_DIV_1 RESERVED Clock Divider Table 8-1 – IO Registers Copyright © 2014 Future Technology Devices International Limited 43 FT51A Advanced Microcontroller with 8051 Compatible Core IC FT51A Datasheet Version 1.3 Document No.: FT_000877 Clearance No.: FTDI#420 Appendix D - Revision History Document Title: FT51A Advanced Microcontroller with 8051 Compatible Core IC Datasheet Document Reference No.: FT_000877 Clearance No.: FTDI#420 Product Page: http://www.ftdichip.com/Products/ICs/FT51A.html Document Feedback: DS_FT51A Version 1.0 Initial Release 2014-03-17 Version 1.1 2nd Release 2014-11-05 Version 1.2 Updated pin out diagram 2014-12-12 Version 1.3 Updated branding from FT51 to FT51A 2015-03-23 Copyright © 2014 Future Technology Devices International Limited 44