TN_142 FT120 Errata Technical Note

Future Technology Devices International Ltd.
TN_142 FT120 Errata Technical Note
Document Reference No.: FT_000683
Version 2.0
Issue Date: 4 April 2013
The intention of this errata technical note is to give a detailed description of known functional or electrical
issues with the FTDI FT120 device.
The current revision of the FT120 is revision C, released April 2013.
Future Technology Devices International Limited (FTDI)
Unit1, 2 Seaward Place, Centurion Business Park, Glasgow G41 1HH United Kingdom
Tel.: +44 (0) 141 429 2777 Fax: + 44 (0) 141 429 2758
E-Mail (Support): [email protected] Web: http://www.ftdichip.com
Copyright © 2013 Future Technology Devices International Limited
TN_142 FT120 Errata Technical Note
Version 2.0
Document Reference No.: FT_000683
Clearance No.: FTDI# 300
TABLE OF CONTENTS
1
FT120 Revision ................................................................ 2
2
Errata History Table – Functional Errata ......................... 3
2.1 Errata History Table – Electrical and Timing Specification
Deviations. ........................................................................................ 3
3
Functional Errata of FT120 .............................................. 4
3.1
3.1.1
GL_N issue ............................................................................................... 4
3.1.2
SUSPEND pin not asserted while Clock Running bit is ‘1’ ................................. 4
3.1.3
CLKOUT does not output suspend clock ........................................................ 5
3.1.4
Interrupts not generated for endpoint index 4 and 5 ...................................... 6
3.1.5
INT_N and GL_N pins issue ......................................................................... 7
3.2
4
Revision B ................................................................................. 4
Revision C ................................................................................. 7
Electrical and Timing specification deviations of FT120 .. 8
4.1
Revision B ................................................................................. 8
4.2
Revision C ................................................................................. 8
5
FT120 Package Markings ................................................. 9
6
Contact Information ...................................................... 10
Appendix C – Revision History ........................................... 11
Copyright © 2013 Future Technology Devices International Limited
1
TN_142 FT120 Errata Technical Note
Version 2.0
Document Reference No.: FT_000683
Clearance No.: FTDI# 300
1
FT120 Revision
FT120 part numbers are listed in Table 1. The letter at the end of date code identifies the device
revision.
The current revision of the FT120 is revision C, released May 2013. At the time of releasing this
Technical Note there are no known issues with this silicon revision.
Part Number
Package
FT120Q
28 pin QFN
FT120T
28 pin TSSOP
Table 1 FT120 Part Numbers
This errata technical note covers the revisions of FT120 listed in Table 2.
Revision
Notes
A
First device revision. Never sold publicly.
B
Second device revision. Launched May 2012
C
Third device revision. Launched April 2013
Table 2 FT120 Revisions
Copyright © 2013 Future Technology Devices International Limited
2
TN_142 FT120 Errata Technical Note
Version 2.0
Document Reference No.: FT_000683
Clearance No.: FTDI# 300
2
Errata History Table – Functional Errata
Functional
Errata
Short description
Errata occurs in
device revision
GL_N pin
Pin GL_N remains active when FT120 enters suspend state or
issue
USB cable is removed
SUSPEND pin
SUSPEND pin not active when bit Clock Running of Set Mode
issue
command is set to ‘1’ and FT120 enters suspend state
B
B
CLKOUT pin not switch to suspend clock when bit Clock Running
CLKOUT pin
of Set Mode command is set to ‘1’ and bit No Suspend Clock is
issue
B
set to ‘0’ and FT120 enters suspend state
Interrupt for
In non-DMA mode, interrupt will not be generated when bits 6
endpoint
and 7 of DMA Configuration Register (Set Mode command) are
index 4 and 5
B
not set
missing
INT_N and
GL_N pins
The INT_N and GL_N pins are not open drain
B
issue
Table 3 Functional Errata
2.1 Errata History Table – Electrical and Timing Specification
Deviations.
Deviations
Short description
Errata occurs in device revision
-
No known issues
-
Table 4 Electrical and Timing Errata
Copyright © 2013 Future Technology Devices International Limited
3
TN_142 FT120 Errata Technical Note
Version 2.0
Document Reference No.: FT_000683
Clearance No.: FTDI# 300
3
Functional Errata of FT120
3.1 Revision B
3.1.1 GL_N issue
Introduction:
The FT120 has a dedicated GL_N output pin (open-drain). The function of GL_N pin is to indicate the USB
traffic while USB session is on-going. The GL_N can be used to drive a LED which will blink during USB
transactions.
Issue:
When FT120 is configured and then goes to suspend state, the GL_N pin shall become non-active but it
remains active. This may cause suspend current at high level if GL_N is used to drive a LED.
For self-powered application, when FT120 is configured and then the USB cable is un-plugged, the GL_N
pin shall become non-active but it remains active. This may cause confusion to end user if GL_N is used
to drive a LED.
Workaround:
There are a few possible workarounds:
1) Do not use GL_N pin to drive a LED, or choose a small current LED;
2) Use SUSPEND pin to gate the GL_N;
3) Use the Vbus sensing circuit to gate the GL_N (for self-powered application only).
Package specific:
The effected packages are listed in Table 5.
Package
Applicable (Yes/No)
FT120Q
Yes
FT120T
Yes
Table 5
3.1.2 SUSPEND pin not asserted while Clock Running bit is ‘1’
Introduction:
The FT120 has a dedicated SUSPEND output pin (open-drain). When USB bus is suspended (bus idle for
more than 3ms), the SUSPEND pin shall be floating (pull HIGH by external pull-up resistor) to indicate
suspend condition.
Issue:
When the Clock Running bit of the Set Mode command is set to ‘1’ and FT120 enters USB suspend the
SUSPEND pin shall be floating but it remains driving LOW. This may cause issue for systems where the
SUSPEND pin is used for power management circuits and/or indication to the microcontroller that the
USB is in suspend state. For systems where the SUSPEND pin is not used, this issue has no impact.
Copyright © 2013 Future Technology Devices International Limited
4
TN_142 FT120 Errata Technical Note
Version 2.0
Document Reference No.: FT_000683
Clearance No.: FTDI# 300
Workaround:
Firmware workaround solutions exist depending on specific application:
Solution 1: This solution is applicable for applications where the SUSPEND pin is used for indication to the
microcontroller that the USB is in suspend state. When the Clock Running bit is set to ‘1’, FT120 clock
remains active and the parallel bus remains functional in suspend state. FT120 will generate interrupt to
indicate the USB enters suspend state. The microcontroller can use the suspend interrupt rather than use
the SUSPEND pin to detect the suspend event. To resume the USB bus, the microcontroller can issue
Send Resume command to FT120 without driving LOW to the SUSPEND pin.
Solution 2: This solution is applicable for applications where the SUSPEND pin is used to control the
power management circuits. Firmware can be modified to set the Clock Running bit of Set Mode
command to be ‘0’. The SUSPEND pin will function per normal under this configuration.
Package specific:
The effected packages are listed in Table 6.
Package
Applicable (Yes/No)
FT120Q
Yes
FT120T
Yes
Table 6
3.1.3 CLKOUT does not output suspend clock
Introduction:
The FT120 has a dedicated CLKOUT output pin. During USB suspend the CLKOUT pin shall switch to the
30kHz suspend clock when the No Suspend Clock bit of the Set Mode command is set to ‘0’, and the
Clock Running bit of the Set Mode command is set to ‘1’. This will help to reduce the supply current of the
microcontroller if it uses the CLKOUT signal as the clock source.
Issue:
When the No Suspend Clock bit of the Set Mode command is set to ‘0’ and the Clock Running bit of the
Set Mode command is set to ‘1’ and FT120 enters USB suspend, the CLKOUT output will not switch to the
30kHz suspend clock. This may cause the system suspend current to reach a relatively high level. For
systems where the CLKOUT pin is not used, this issue has no impact.
Workaround:
Firmware can be modified to set the Clock Running bit of Set Mode command to be ‘0’. Under this
configuration the CLKOUT will switch to 30 kHz suspend clock upon entering USB suspend state. To
resume the USB bus, the firmware needs to wakeup FT120 by driving the SUSPEND pin to LOW, and then
issue Send Resume command to FT120.
Copyright © 2013 Future Technology Devices International Limited
5
TN_142 FT120 Errata Technical Note
Version 2.0
Document Reference No.: FT_000683
Clearance No.: FTDI# 300
Package specific:
The effected packages are listed in Table 7.
Package
Applicable (Yes/No)
FT120Q
Yes
FT120T
Yes
Table 7
3.1.4 Interrupts not generated for endpoint index 4 and 5
Introduction:
Bit 6 and 7 of the Set DMA command is used to enable/disable the interrupts for endpoint index 4 and 5
when DMA mode is enabled. For non-DMA mode, these two bits shall have no impact on interrupt
generating over endpoint index 4 and 5.
Issue:
For non-DMA mode, FT120 will not generate interrupts for endpoint index 4 and 5 if bit 6 and 7 of the Set
DMA command is set to ‘0’.
Workaround:
Set bit 6(Endpoint Index 4 Interrupt Enable) and bit 7(Endpoint Index 5 Interrupt Enable) of the Set DMA
command to ‘1’ for non-DMA mode, if these endpoints are enabled.
Package specific:
The effected packages are listed in Table 8
Package
Applicable (Yes/No)
FT120Q
Yes
FT120T
Yes
Table 8
Copyright © 2013 Future Technology Devices International Limited
6
TN_142 FT120 Errata Technical Note
Version 2.0
Document Reference No.: FT_000683
Clearance No.: FTDI# 300
3.1.5 INT_N and GL_N pins issue
Introduction:
Pins INT_N and the GL_N are not set as open-drain.
Issue:
Both the INT_N and the GL_N pins are configured as active driver. They should be configured as open-drain as
per specification.
Workaround:
No known workaround.
Package specific:
The effected packages are listed in Table 8
Package
Applicable (Yes/No)
FT120Q
Yes
FT120T
Yes
Table 9
3.2 Revision C
No known issues at revision C
Copyright © 2013 Future Technology Devices International Limited
7
TN_142 FT120 Errata Technical Note
Version 2.0
Document Reference No.: FT_000683
Clearance No.: FTDI# 300
4
Electrical and Timing specification deviations of FT120
4.1 Revision B
No known issues at revision B
4.2 Revision C
No known issues at revision C
Copyright © 2013 Future Technology Devices International Limited
8
TN_142 FT120 Errata Technical Note
Version 2.0
Document Reference No.: FT_000683
Clearance No.: FTDI# 300
5
FT120 Package Markings
FT120 is available in a RoHS Compliant RoHS Compliant package, 28 pin QFN and 28 pin TSSOP. An
example of the markings on the package is shown in Figure 1 and Figure 2.
Line 1 – FTDI Logo
YYWW-B
Line 2 – Date Code, Revision
FT120Q
Line 3 – FTDI Part Number
Figure 1 Package Markings – FT120Q
Line 1 – FTDI Logo
YYWW-B
Line 2 – Date Code, Revision
FT120T
Line 3 – FTDI Part Number
Figure 2 Package Markings – FT120T
The date code format is YYWW where WW = 2 digit week number, YY = 2 digit year number. This is
followed by the revision number.
Copyright © 2013 Future Technology Devices International Limited
9
TN_142 FT120 Errata Technical Note
Version 2.0
Document Reference No.: FT_000683
Clearance No.: FTDI# 300
6
Contact Information
Head Office – Glasgow, UK
Branch Office – Tigard, Oregon, USA
Future Technology Devices International Limited
Unit 1, 2 Seaward Place, Centurion Business Park
Glasgow G41 1HH
United Kingdom
Tel: +44 (0) 141 429 2777
Fax: +44 (0) 141 429 2758
Future Technology Devices International Limited
(USA)
7130 SW Fir Loop
Tigard, OR 97223
USA
Tel: +1 (503) 547 0988
Fax: +1 (503) 547 0987
E-mail (Sales)
E-mail (Support)
E-mail (General Enquiries)
E-Mail (Sales)
E-Mail (Support)
E-Mail (General Enquiries)
[email protected]
[email protected]
[email protected]
Branch Office – Taipei, Taiwan
Future Technology Devices International Limited
(Taiwan)
2F, No. 516, Sec. 1, NeiHu Road
Taipei 114
Taiwan , R.O.C.
Tel: +886 (0) 2 8791 3570
Fax: +886 (0) 2 8791 3576
E-mail (Sales)
E-mail (Support)
E-mail (General Enquiries)
[email protected]
[email protected]
[email protected]
[email protected]
[email protected]
[email protected]
Branch Office – Shanghai, China
Future Technology Devices International Limited
(China)
Room 1103, No.666 West Huaihai Road,
Shanghai, 200052
China
Tel: +86 21 62351596
Fax: +86 21 62351595
E-mail (Sales)
E-mail (Support)
E-mail (General Enquiries)
[email protected]
[email protected]
[email protected]
Branch Office – Singapore
Future Technology Devices International Limited (Singapore)
178 Paya Lebar Road
#07-03/04/05
Singapore 409030
Tel: +65 6841 1174
Fax: +65 6841 6071
E-mail (Support)
E-mail (General Enquiries)
[email protected]
[email protected]
Web Site
http://ftdichip.com
System and equipment manufacturers and designers are responsible to ensure that their systems, and any Future Technology
Devices International Ltd (FTDI) devices incorporated in their systems, meet all applicable safety, regulatory and system-level
performance requirements. All application-related information in this document (including application descriptions, suggested
FTDI devices and other materials) is provided for reference only. While FTDI has taken care to assure it is accurate, this
information is subject to customer confirmation, and FTDI disclaims all liability for system designs and for any applications
assistance provided by FTDI. Use of FTDI devices in life support and/or safety applications is entirely at the user’s risk, and the
user agrees to defend, indemnify and hold harmless FTDI from any and all damages, claims, suits or expense resulting from
such use. This document is subject to change without notice. No freedom to use patents or other intellectual property rights is
implied by the publication of this document. Neither the whole nor any part of the information contained in, or the product
described in this document, may be adapted or reproduced in any material or electronic form without the prior written consent
of the copyright holder. Future Technology Devices International Ltd, Unit 1, 2 Seaward Place, Centurion Business Park,
Glasgow G41 1HH, United Kingdom. Scotland Registered Company Number: SC136640
Copyright © 2013 Future Technology Devices International Limited
10
TN_142 FT120 Errata Technical Note
Version 2.0
Document Reference No.: FT_000683
Clearance No.: FTDI# 300
Appendix C – Revision History
Document Title:
Document Reference No.:
Clearance No.:
Product Page:
Document Feedback:
Version 1.0
Version 2.0
TN_142 FT120 Errata Technical Note
FT_000683
FTDI# 300
http://www.ftdichip.com/FT120.htm
Send Feedback
Initial release
Revision C release
Copyright © 2013 Future Technology Devices International Limited
17/10/2012
28/6/2013
11