STG5678 Low voltage dual SPDT switch with negative rail capability Features ■ Distortion-free negative signal throughput down to VCC - 5.5 V ■ Wide operating voltage range: VCC (opr) = 1.65 to 4.5 V single supply ■ Ultra low power dissipation: ICC = 0.2 µA (max.) at TA = 85 °C ■ Low ON resistance: RON = 0.5 Ω (max. TA = 25 °C) at VCC = 3.6 V ■ 4.3 V tolerant and 1.8 V compatible threshold on digital control input at VCC = 1.65 V to 4.5 V ■ Latch-up performance exceeds 300 mA (JESD 17) ■ ESD performance: – 2000-V human-body model (IEC61340-3-1:2002 level 2) – 200-V machine model (IEC61340-3-2 level M2) – 1000-V charge device model (JESD22-C101-A level III) Flip-chip 12 Description The STG5678 is a high-speed CMOS low voltage dual analog SPDT (single pole dual throw) switch or 2:1 multiplexer/de-multiplexer switch fabricated in silicon gate CMOS technology. It is designed to operate from 1.65 to 4.5 V. The device is capable of handling signals with negative voltages from VCC - 5.5 V to VCC without any distortion. Additional key features are fast switching speed, break-before-make delay time and ultra low power consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them ESD immunity and transient excess voltage. Table 1. June 2010 Device summary Order code Package Packaging STG5678BJR Flip-chip 12 Tape and reel STG5678CJR Flip-chip 12 (with back side coating) Tape and reel Doc ID 14580 Rev 3 1/23 www.st.com 23 Contents STG5678 Contents 1 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 STG5678 device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.1 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 6 Application hint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6.1 Input signal dynamic range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 7 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 2/23 Doc ID 14580 Rev 3 STG5678 Pin settings 1 Pin settings 1.1 Pin connection Figure 1. Pin connection (bump side view) See note 1 A B C D A B C D 1 A1 B1 C1 D1 1 1SEL 1S1 D1 1S2 2 A2 B2 C2 D2 2 NC GND GND VCC 3 A3 B3 C3 D3 3 2SEL 2S1 D2 2S2 1. Note 1: bump A1 is distinguished by a circular dot on the top-side. There is no circular dot on the bumpside. 1.2 Pin description Table 2. Pin assignment Pin number Symbol A1 1SEL A2 NC A3 2SEL B1 1S1 Independent channel for switch 1 B2 GND Ground (0 V) B3 2S1 Independent channel for switch 2 C1 D1 Common channel for switch 1 C2 GND C3 D2 Common channel for switch 2 D1 1S2 Independent channel for switch 1 D2 VCC Positive supply voltage D3 2S2 Independent channel for switch 2 Doc ID 14580 Rev 3 Name and function Selection control for switch 1 No connection Selection control for switch 2 Ground (0 V) 3/23 STG5678 device summary 2 STG5678 STG5678 device summary Figure 2. Functional diagram 2SEL 2SEL 2S1 2S1 D2 D2 2S2 2S2 1S1 1S1 D1 D1 1S2 1S2 1SEL 1SEL Figure 3. Input equivalent circuit S2 D S1 SEL Table 3. 1. 4/23 Truth table SEL Switch S1 Switch S2 H ON OFF (1) L OFF (1) ON High impedance Doc ID 14580 Rev 3 STG5678 3 Maximum rating Maximum rating Stressing the device above the rating listed in the “absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 4. Absolute maximum ratings Symbol VCC Parameter Supply voltage Value Unit -0.5 to 5.5 V - (VCC - 6.0) to VCC + 0.5 V -0.5 to 5.5 V - (VCC - 6.0 V) to VCC + 0.5 V VI DC input voltage VIC DC control input voltage VO DC output voltage IIKC DC input diode current on control pin (VSEL < 0 V) -50 mA IIK DC input diode current (VIN < 0 V) ±50 mA IOK DC output diode current ±20 mA IO DC output current ±150 mA IOP DC output current peak (pulse at 1ms, 10% duty cycle) ±400 mA DC VCC or ground current ±100 mA PD Power dissipation at TA = 70°C (1) 1120 mW Tstg Storage temperature -65 to 150 °C 300 °C ICC or IGND TL Lead temperature (10 sec) 1. Derate above 70 ºC by 18.5 mW/C Doc ID 14580 Rev 3 5/23 Maximum rating 3.1 STG5678 Recommended operating conditions Table 5. Recommended operating conditions Symbol VCC Supply voltage VI Input voltage VIC Control input voltage VO Output voltage Top Operating temperature dt/dv 6/23 Parameter Input rise and fall time control input Value Unit 1.65 to 4.5 V VCC -5.5 to VCC V 0 to 4.5 V VCC -5.5 to VCC V -40 to 85 °C VCC = 1.65 to 2.7 V 0 to 20 VCC = 3.0 to 4.5 V 0 to 10 Doc ID 14580 Rev 3 ns/V STG5678 Electrical characteristics 4 Electrical characteristics Table 6. DC specifications Test conditions Symbol VIH VIL RON ΔRON RFLAT Parameter High level input voltage Low level input voltage Switch ON resistance ON resistance match between channels (1) ON resistance flatness (2) Value TA = 25 °C VCC (V) -40 to 85 °C Unit Min Typ Max Min Max 1.65 − 1.95 0.9 – – 0.9 – 2.25 − 2.7 0.9 – – 0.9 – 3.0 − 4.3 1.0 – – 1.0 – 4.5 1.1 – – 1.1 – 1.65 − 1.95 – – 0.6 – 0.6 2.25 − 2.7 – – 0.6 – 0.6 3.0 − 4.3 – – 0.7 – 0.7 4.5 – – 0.7 – 0.7 1.8 – 3.80 4.60 – 7.0 – 0.77 0.90 – 1.2 – 0.64 0.80 – 1.0 3.6 – 0.51 0.65 – 1.0 1.8 – 50 – – 500 – 20 – – 500 – 15 – – 500 3.6 – 15 – – 500 1.8 – 3.5 – – 6.6 – 0.50 – – 0.8 – 0.40 – – 0.6 – 0.25 – – 0.5 – -0.55 – -2 1 µA – -0.55 – -2 1 µA 2.7 3.0 2.7 3.0 2.7 3.0 V V VS = VCC − 5.5 V to VCC; IS = 100 mA VS at RON max IS = 100 mA VS = VCC − 5.5 V to VCC; IS = 100 mA 3.6 IOFF Sn OFF state leakage current 3.6 VS = -1.2 to 3.6 V VD = 3.6 to -1.2 V ION Sn ON state leakage current 3.6 VS = -1.2 to 3.6 V VD = open Ω mΩ Doc ID 14580 Rev 3 Ω 7/23 Electrical characteristics Table 6. STG5678 DC specifications (continued) Test conditions Symbol Parameter Value TA = 25 °C VCC (V) -40 to 85 °C Min Typ Max Min Max 0.55 – -2 1 µA 0.1 -1 1 µA µA D ON state leakage current 3.6 VS = open VD = -1.2 V to 3.6 V – IIH,IIL SEL leakage current 3.6 VSEL= 3.6 V or GND -0.1 ICCLV Quiescent supply current low voltage driving 3.6 V1SEL, V2SEL = 1.80 V – 7 – – 10 – 5.6 – – 10 ICC Quiescent supply current(3) – 8 – – 16 – 0.05 – – 0.1 ID 2.5 3.6 V1SEL= V2SEL = VCC 1.65 −4.5 V1SEL= V2SEL = GND 1. Note 1: ΔRON = RON(max) - RON (min) 2. Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal ranges. 3. When V1SEL and V2SEL is both low, the ICC consumption will reduce to less than 0.1 µA (max) 8/23 Unit Doc ID 14580 Rev 3 µA STG5678 Table 7. Electrical characteristics AC electrical characteristics (CL = 35 pF, RL = 50 Ω, tr = tf ≤5 ns) Test conditions Symbol tPLH, tPHL Parameter Propagation delay Turn ON time TA = 25°C Vcc (V) Typ Max Min Max 1.65 − 1.95 – 0.45 – – – 2.3 − 2.7 – 0.40 – – – 3.0 − 3.3 – 0.30 – – – 3.6 – 0.25 – – – – 220 265 – – – 140 175 – – – 110 135 – – – 105 130 – – – 120 150 – – – 77 92 – – – 77 92 – – – 77 92 – – – 120 – – – – 66 – – – – 40 – – – 3.6 – 30 – – – 1.65 − 1.95 – 55 – – – – 76 – – – – 94 – – – – 126 – – – VS = 0.8 V 2.3 − 2.7 3.0 − 3.3 1.65 − 1.95 Turn OFF time ns VS = 1.5 V VS = 0.8 2.3 − 2.7 3.0 − 3.3 ns VS = 1.5 V 3.6 1.65 − 1.95 tD Q Breakbefore-make time delay Charge injection 2.3 − 2.7 3.0 − 3.3 2.3 − 2.7 3.0 − 3.3 3.6 Unit ns 3.6 tOFF -40 to 85°C Min 1.65 − 1.95 tON Value CL = 35 pF RL = 50 Ω VS = VCC/2 CL = 100 pF VGEN = 0 V ns pC Doc ID 14580 Rev 3 9/23 Electrical characteristics Table 8. STG5678 Analog switch characteristics (CL = 5 pF, RL = 50 Ω,) Test conditions Symbol OIRR Xtalk Parameter OFF isolation (1) Crosstalk(2) TA = 25 °C VCC (V) 2.7 − 3.6 2.7 − 3.6 Max Min Max VS = 1 VRMS, f = 100 kHz – -86 – – – VS = 1 VRMS, f = 1 MHz – -70 – – – VS = 1 VRMS, f = 5 MHz – -54 – – – VS = 1 VRMS, f = 100 kHz – -96 – – – VS = 1 VRMS, f = 1 MHz – -87 – – – VS = 1 VRMS, f = 5 MHz – -74 – – – – 0.01 – – – % RL = 50 Ω Signal = 0 dBm – 30 – – – MHz f = 1 MHz – 12 – – – pF – 120 – – – pF – 290 – – – pF Total harmonic distortion BW -3dB bandwidth 2.7 − 3.6 CSEL Control pin input capacitance 3.3 OFF Sn port capacitance 3.3 D port capacitance when switch is enabled 3.3 f = 1 MHz f = 1 MHz 1. Off isolation = 20Log10 (VD/VS), VD = output. VS = input to off switch. 2. Crosstalk values are measured between two switches. 10/23 Unit Typ THD CD -40 to 85 °C Min RL = 32 Ω VIN = 0.5 VPP 2.7 − 3.6 DC bias = 0 f = 20 Hz to 20 kHz CSn(OFF) Value Doc ID 14580 Rev 3 dB dB STG5678 5 Test circuit Test circuit Figure 4. ON resistance I DS V V CC D S1 VS S2 IN GND GND CS14071 Figure 5. OFF leakage V CC I I S(OFF) D(OFF) D A A V SS V D S2 IN V CC GND CS14081 Doc ID 14580 Rev 3 11/23 Test circuit STG5678 Figure 6. OFF isolation V CC S1 V OUT 50 Ω S2 IN GND VS GND CS00381 Figure 7. Bandwidth V CC D S1 V OUT S2 V IN CC GND CS00371 12/23 Doc ID 14580 Rev 3 STG5678 Test circuit Figure 8. Channel-to-channel crosstalk CS14091 Figure 9. Test circuit 2. CL = 5/35 pF or equivalent (includes jig and probe capacitance) 3. RL = 50 Ω or equivalent 4. RT = ZOUT of pulse generator (typically 50 Ω) Doc ID 14580 Rev 3 13/23 Test circuit STG5678 Figure 10. Break-before-make time delay Figure 11. Switching time and charge injection (VGEN = 0 V, RGEN = 0 Ω, RL = 1 MΩ, CL = 100 pF) Figure 12. Turn on, turn off delay time VCC S1 D VOUT R L C L S2 IN V IN GND CS08721 14/23 Doc ID 14580 Rev 3 STG5678 Application hint 6 Application hint 6.1 Input signal dynamic range The STG5678 negative analog switch allows input signals that fall below 0 V to pass through the switch without signal distortion. The input signal dynamic range VI consists of a positive-region and a negative-region. The positive-region is limited by the level of VCC. The negative-region is limited by the difference between VCC and 5.5 V. The effect of this is that, the higher the VCC, the smaller the operating range in the negative region. For example, if VCC = 3.6 V, the input signal dynamic range is from -1.9 V to 3.6 V. Figure 13. Application diagram VCC VCC VI Negative SW 0V VCC-5.5 Negative region Doc ID 14580 Rev 3 15/23 Package mechanical data 7 STG5678 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. Figure 14. Package outline for Flip-chip 12 3 2 1 D C B Bottom view 16/23 Doc ID 14580 Rev 3 A STG5678 Package mechanical data Table 9. Mechanical data for Flip-chip 12 Millimeters Symbol Min Typ Max A 0.55 0.605 0.66 A1 0.17 0.205 0.24 A2 0.38 0.4 0.42 b 0.215 0.255 0.295 D 1.568 1.598 1.628 D1 – 1.2 – E 1.168 1.198 1.228 E1 – 0.8 – e 0.36 0.4 0.44 f 0.189 0.199 0.209 ccc – 0.05 – Figure 15. Footprint recommendation Doc ID 14580 Rev 3 17/23 Package mechanical data STG5678 Figure 16. Package outline for Flip-chip 12 with back side coating C B A 4 $ N5_ME Table 10. Mechanical data for Flip-chip 12 with back side coating Millimeters Symbol 18/23 Min Typ Max A 0.595 0.65 0.705 A1 0.165 0.20 0.235 A2 0.38 0.4 0.42 b 0.215 0.255 0.295 D 1.568 1.598 1.628 D1 – 1.2 – E 1.168 1.198 1.228 E1 – 0.8 – e 0.36 0.4 0.44 f 0.189 0.199 0.209 ccc – 0.05 – Doc ID 14580 Rev 3 STG5678 Package mechanical data Figure 17. Footprint recommendation A B C 1 2 3 4 N5_FR Figure 18. Tape information Doc ID 14580 Rev 3 19/23 Package mechanical data STG5678 Figure 19. Tape orientation User direction of feed AM00745V1 Table 11. 20/23 Reel measurement Tape width (mm) A N Max Min 8 180 54 W2 W3 W1 8.4 +1.5/-0 Doc ID 14580 Rev 3 Max Min Max 14.4 7.9 10.9 STG5678 Package mechanical data Figure 20. Reel information Doc ID 14580 Rev 3 21/23 Revision history 8 STG5678 Revision history Table 12. 22/23 Document revision history Date Revision Changes 01-Apr-2008 1 Initial release. 10-Sep-2008 2 Document status promoted from preliminary data to datasheet. Modified: Figure 19 on page 20. Updated: Table 9 on page 17. 04-Jun-2010 3 Added: Flip-chip 12 with back side coating. Document reformatted. Doc ID 14580 Rev 3 STG5678 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. 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