STG6384 High isolation dual SPST analog switch Features ■ Ultra high off-isolation: -80 dB (typ) at 1 Mhz ■ Ultra low power dissipation: ICC = 0.2 μA (max.) at TA = 85 °C ■ RPEAK = 1.30 Ω max (TA = 25 °C) at VCC = 4.3 V ■ Wide operating voltage range: VCC (opr) = 1.65 to 4.3 V single supply ■ 4.3 V tolerant and 1.8 V compatible threshold on digital control input at VCC = 1.65 to 4.3 V ■ Typical bandwidth (-3 dB) at 65 MHz on Sn channel ■ Latch-up performance exceeds 100 mA per JESD 78, Class II ■ ESD performance exceeds JESD22 2000-V Human body model (A114-A) QFN10L (1.8 x 1.4 mm) Additional key features are fast switching speed and ultra low power consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them ESD immunity and transient excess voltage. Description The STG6384 is a high-speed CMOS low voltage dual analog SPST (single pole single throw) switch fabricated in silicon gate C2MOS technology. The STG6384 is designed to operate from 1.65 to 4.3 V, making this device ideal for portable applications. The SELn inputs are provided to control the switch operation. The switch Sn is “on” (connected to common ports Dn) when the SELn input is held high and “off” (high impedance state exists between the two ports) when SELn is held low. Table 1. Device summary Order code Package Packaging STG6384QTR QFN10L (1.8 x 1.4 mm) Tape and reel January 2008 Rev 1 1/21 www.st.com 21 Table of contents STG6384 Table of contents 1 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.1 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 6 Application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 7 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 2/21 STG6384 Pin settings Table 2. SEL1 Pin connection (top through view) D1 10 9 NC 1 8 GND S1 2 7 S2 VCC 3 6 NC 4 5 D2 Figure 1. SEL2 1 Pin settings Pin description Pin number Symbol Name and function 1 NC No connection 2 S1 Independent channel 3 VCC Positive supply voltage 4 SEL2 Selection control 5 D2 Common channel 6 NC No connection 7 S2 Independent channel 8 GND Ground (0 V) 9 SEL1 Selection control 10 D1 Common channel 3/21 Logic diagram 2 STG6384 Logic diagram Figure 2. Logic block diagram SEL1 S1 D1 S2 D2 SEL2 Table 3. Truth table 1. High impedance 4/21 SELn Switch Sn L OFF(1) H Sn is connected to Dn STG6384 3 Maximum rating Maximum rating Stressing the device above the rating listed in the “Absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Table 4. Absolute maximum ratings Symbol VCC Parameter Supply voltage Value Unit -0.5 to 5.5 V -0.5 to VCC + 0.5 V -0.5 to 5.5 V -0.5 to VCC + 0.5 V VI DC input voltage VIC DC control input voltage VO DC output voltage IIKC DC input diode current on control pin (VSEL < 0 V) − 50 mA IIK DC input diode current (VSEL < 0 V) ± 50 mA IOK DC output diode current ± 20 mA IO DC output current ± 300 mA IOP DC output current peak (pulse at 1 ms, 10% duty cycle) ± 500 mA ± 100 mA 1120 mW -65 to 150 °C 300 °C ICC or IGND DC VCC or ground current PD TSTG TL Power dissipation at TA=70 °C(1) Storage temperature Lead temperature (10 sec) 1. Derate above 70 °C by 18.5 mW/°C 5/21 Maximum rating 3.1 STG6384 Recommended operating conditions Table 5. Recommended operating conditions Symbol VCC Supply voltage Value Unit 1.65 to 4.3 V VI Input voltage 0 to VCC V VIC Control input voltage 0 to 4.3 V VO Output voltage 0 to VCC V Top Operating temperature -40 to 85 °C dt/dv 6/21 Parameter Input rise and fall time control input VCC = 1.65 V to 2.7 V 0 to 20 ns/V VCC = 3.0 V to 4.3 V 0 to 10 STG6384 4 Electrical characteristics Electrical characteristics Table 6. DC specifications Value Symbol Parameter VCC (V) Test condition TA = 25 °C Min VIH VIL High level input voltage Low level input voltage 0.65 VCC 2.3 −2.5 1.2 1.2 2.7 −3.0 1.3 1.3 3.0 −3.6 1.4 1.4 4.3 1.5 1.5 ΔRON RFLAT IOFF OFF state leakage current (Sn), (Dn) ISEL SEL leakage current V 0.25 0.25 2.3 −2.5 0.25 0.25 2.7 −3.0 0.25 0.25 3.0 −3.6 0.30 0.30 4.3 0.40 0.40 1.10 1.3 1.5 1.15 1.4 1.6 1.25 1.5 1.8 2.7 1.35 1.6 1.9 1.8 2.20 2.9 3.5 4.3 10 3.0 VS = 0 V to VCC IS = 100 mA 3.0 V Ω 14 VS at RPEAK IS = 100 mA 14 mΩ 2.7 15 1.8 30 4.3 0.45 0.50 0.55 0.45 0.50 0.55 0.50 0.55 0.60 2.7 0.55 0.60 0.70 1.8 1.10 1.70 2.00 VS = 0.3 or 4 V ±0.1 ±1 μA VSEL = 0 to 4.3 V ±0.05 ±1 μA 3.6 ON resistance flatness (2) Max 1.65 −1.95 3.6 ON resistance match (1) Min 0.65 VCC 3.6 RPEAK Max 1.65 −1.95 4.3 Switch ON resistance Typ -40 to 85 °C Unit 3.0 4.3 0 −4.3 VS = 0 to VCC IS = 100 mA Ω 7/21 Electrical characteristics Table 6. STG6384 DC specifications Value Symbol VCC (V) Parameter TA = 25 °C Test condition Min ICC Quiescent supply current ICCLV Quiescent supply current low voltage driving 1.65 −4.3 4.3 Typ Max VSEL = VCC or GND -40 to 85 °C Unit Min Max ±0.05 ±0.2 VSEL = 1.65 V ±37 ±50 ±100 VSEL = 1.80 V ±33 ±40 ±50 VSEL = 2.60 V ±12 ±20 ±30 μA μA 1. ΔRON = RON(max) - RON(min). 2. Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal ranges. Table 7. AC electrical characteristics (CL = 35 pF, RL = 50 Ω, tr = tf ≤5 ns) Value Symbol Parameter VCC (V) Test condition TA = 25 °C Min tPLH, tPHL Propagation delay 1.65 −−1.95 0.45 2.3 −−2.7 0.45 3.0 −−3.3 0.30 3.6 −−4.3 0.30 Turn-ON time 2.3 −−2.7 3.0 −−3.3 1.65 −−1.95 VS = 0.8 V Turn-OFF time 2.3 −−2.7 3.0 −−3.3 1.65 −−1.95 Charge injection 2.3 −−2.7 3.0 −−3.3 3.6 −−4.3 8/21 Max 120 65 85 90 42 55 65 40 55 65 18 30 40 16 30 40 15 30 40 45 ns VS = 1.5 V 3.6 −−4.3 Q Min ns VS = 1.5 V 3.6 −−4.3 tOFF Max Unit ns 1.65 −−1.95 VS = 0.8 V tON Typ -40 to 85 °C 43 CL = 100 pF RL = 1 MΩ VGEN = 0 V RGEN = 0 Ω 51 pC 51 49 STG6384 Electrical characteristics Table 7. AC electrical characteristics (CL = 35 pF, RL = 50 Ω, tr = tf ≤5 ns) Value Symbol Parameter VCC (V) Test condition TA = 25 °C Min OIRR Xtalk Off isolation(1) Crosstalk 1.65 −4.3 1.65 −4.3 THD Total harmonic distortion 2.3 −4.3 BW -3dB bandwidth 1.65 −4.3 Typ VS = 1 VRMS f = 1 MHz RL = 50 Ω -80 VS = 1 VRMS f = 10 MHz RL = 50 Ω -60 VS = 1 VRMS f = 1 MHz Signal = 0 dBm -85 Max -40 to 85 °C Min Unit Max dB dB VS = 1 VRMS f = 10 MHz Signal = 0 dBm f = 20 Hz to 20 kHz RL = 600 Ω CL = 50 pF VIN = 2 VP-P VDC = VCC/2 -74 0.01 % RL = 50 Ω Signal = 0 dBm 58 MHz VCC = 0 V 9 CSEL Control pin input capacitance CON Port capacitance when switch is enabled 3.3 f = 1 MHz 113 COFF Port capacitance when switch is disabled 3.3 f = 1 MHz 85 pF 1. Off isolation = 20 Log10 (VD/VS), VD = output. VS = input at off switch 9/21 Test circuit 5 STG6384 Test circuit Figure 3. ON resistance I DS V V CC S1 D VS IN GND GND CS14072 10/21 STG6384 Test circuit Figure 4. OFF leakage V CC I S(OFF) I D(OFF) D S1 A A V SS V D IN V CC GND CS14082 Figure 5. OFF isolation V CC S1 D VOUT 50 IN GND GND CS00372 11/21 Test circuit STG6384 Figure 6. Bandwidth S1 Figure 7. Switch-to-switch crosstalk D1 SEL1 D2 SEL2 12/21 STG6384 Test circuit Figure 8. Test circuit 1. CL = 5/35 pF or equivalent (includes jig and probe capacitance) 2. RL = 50 Ω or equivalent 3. RT = ZOUT of pulse generator (typically 50 Ω) 13/21 Application diagram 6 STG6384 Application diagram Figure 9. Application diagram R Class-D output L BB S1 D1 S2 D2 SEL1=HIGH 14/21 SEL2=HIGH STG6384 7 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Figure 10. QFN10L (1.8 x 1.4 mm) package outline 7936408 Rev.D 15/21 Package mechanical data STG6384 Table 2. QFN10L(1.8 x 1.4 mm) mechanical data Symbol Millimeters Min Typ Max A 0.45 0.50 0.55 A1 0 0.02 0.05 A3 b 0.127 0.15 0.25 D 1.75 1.80 1.85 E 1.35 1.40 1.45 e L 16/21 0.20 0.40 0.35 0.40 0.45 STG6384 Package mechanical data Figure 11. QFN10L (1.8 x 1.4 mm) footprint recommendations Figure 12. QFN10L (1.8 x 1.4 mm) carrier tape 17/21 Package mechanical data Figure 13. QFN10L (1.8 x 1.4 mm) reel information - front side 18/21 STG6384 STG6384 Package mechanical data Figure 14. QFN10L(1.8 x 1.4 mm) reel information 19/21 Revision history 8 STG6384 Revision history Table 8. 20/21 Document revision history Date Revision 08-Jan-2008 1 Changes Initial release. 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