TSX3702 Micropower dual CMOS voltage comparators Datasheet - production data • • • • D SO8 (plastic micropackage) • Input common-mode voltage range includes ground Push-pull output 12 High input impedance: 10 Ω typ Fast response time: 2.7 µs typ. for 5 mV overdrive ESD tolerance: 4 kV HBM, 200 V MM Related products • • P TSSOP8 (thin shrink small outline package) Pin-to-pin and functionally compatible with the dual CMOS TS3702 comparators See the TSX393 for open drain output Applications • • Automotive Industrial Description S MiniSO8 (plastic package) DFN8 2x2 mm (plastic micropackage) Features • • • Low supply current: 5 µA typ. per comparator Wide single supply range 2.7 V to 16 V or dual supplies (±1.35 V to ±8 V) Extremely low input bias current: 1 pA typ. February 2015 The TSX3702 is a micropower CMOS dual voltage comparator which exhibits a very low current consumption of 5 µA typical per comparator. This device was designed as the improvement of the TS3702: it shows a lower current consumption, a better input offset voltage, and an enhanced ESD tolerance. The TSX3702 is fully specified over a wide temperature range and is proposed in automotive grade for the SO8 package. It is fully compatible with the TS3702 CMOS comparator and is available with similar packages. New tiny packages (MiniSO8 and DFN8 2x2 mm) are also proposed for the TSX3702 thus allowing even more integration on applications. DocID026056 Rev 2 This is information on a product in full production. 1/24 www.st.com Contents TSX3702 Contents 1 Package pin connections................................................................ 3 2 Absolute maximum ratings............................................................. 4 3 4 Operating conditions ...................................................................... 5 Schematic diagram.......................................................................... 6 5 Electrical characteristics ................................................................ 7 6 Application information (input voltages) ..................................... 15 7 Package information ..................................................................... 16 7.1 SO8 package information ................................................................ 17 7.2 TSSOP8 package information ......................................................... 18 7.3 DFN8 2 x 2 (NB) package information ............................................ 19 7.4 MiniSO8 package information ......................................................... 21 8 Ordering information..................................................................... 22 9 Revision history ............................................................................ 23 2/24 DocID026056 Rev 2 TSX3702 1 Package pin connections Package pin connections Figure 1: Pin connections top view Out1 1 In1- 2 - In1+ 3 + Vcc- 4 DocID026056 Rev 2 8 Vcc+ 7 Out2 - 6 In2- + 5 In2+ 3/24 Absolute maximum ratings 2 TSX3702 Absolute maximum ratings Table 1: Absolute maximum ratings (AMR) Symbol + VCC Parameter Supply voltage Value (1) 18 Vid Differential input voltage Vin Input voltage Vo Output voltage Io Output current (2) ±18 V -0.3 to 18 18 20 IF Forward current in ESD protection diodes on inputs Tj Maximum junction temperature Rthja Tstg Thermal resistance junction to ambient MM: machine model mA (3) 50 150 (4) Storage temperature range HBM: human body model ESD SO8 125 TSSOP8 120 MiniSO8 190 DFN8 2x2 57 -65 to 150 200 (7) (4) 200 (5) (6) (7) 4/24 All voltage values, except differential voltage, are with respect to network ground terminal. Differential voltages are the non-inverting input terminal with respect to the inverting input terminal. Guaranteed by design Short-circuits can cause excessive heating and destructive dissipation. Values are typical. According to JEDEC standard JESD22-A114F According to JEDEC standard JESD22-A115A According to ANSI/ESD STM5.3.1 DocID026056 Rev 2 V 1500 Notes: (3) ºC 4000 (6) Latch-up immunity (2) ºC ºC/W (5) CDM: charged device model (1) Unit mA TSX3702 3 Operating conditions Operating conditions Table 2: Operating conditions Symbol + VCC Vicm (1) Toper Parameter Supply voltage Value Unit 2.7 to 16 Common mode input voltage range Tmin ≤ Tamb ≤ Tmax Operating free-air temperature range + 0 to VCC - 1.5 0 to + VCC V -2 -40 to 125 ºC Notes: (1) The output state is guaranteed as long as one input remains with this common mode input voltage range, and the other input remains between -0.3 V and 16 V (meaning that one input can be driven above VCC+). DocID026056 Rev 2 5/24 Schematic diagram 4 TSX3702 Schematic diagram Figure 2: Schematic diagram (one operator) VCC+ ESD CLAM P IN+ IN- OUT VCC- 6/24 DocID026056 Rev 2 TSX3702 5 Electrical characteristics Electrical characteristics Table 3: VCC+ = 3 V, VCC- = 0 V, Tamb = 25 ºC (unless otherwise specified) Symbol Parameter Condition Vio Input offset voltage Iio Input offset current Iib CMR SVR Input bias current (1) VOL Low-level output voltage Max. Vicm = 0 V -5 0.1 5 Tmin ≤ Tamb ≤ Tmax -6 1 pA 1 58 Tmin ≤ Tamb ≤ Tmax 55 + VCC 69 Tmin ≤ Tamb ≤ Tmax Vid = 1 V, IOH = 6 mA 73 dB 88 69 300 Tmin ≤ Tamb ≤ Tmax Vid = -1 V, IOL = 6 mA mV 300 5 tPLH 8 tPHL Vicm = 0 V, f = 10 kHz, RL = 5.1 kΩ, CL = 50 pF, overdrive = 5 mV 2.4 Overdrive = 100 mV 0.43 Vicm = 0 V, f = 10 kHz, RL = 5.1 kΩ, CL = 50 pF, overdrive = 5 mV 2.0 Overdrive = 100 mV 0.4 tf Rise time f = 10 kHz, CL = 50 pF, RL = 5.1 kΩ, overdrive 50 mV Fall time f = 10 kHz, CL = 50 pF, RL = 5.1 kΩ, overdrive 50 mV 0.55 0.6 Tmin ≤ Tamb ≤ Tmax tr μA 9 11 Tmin ≤ Tamb ≤ Tmax Response time high to low 6 7 Tmin ≤ Tamb ≤ Tmax Response time low to high 400 600 Tmin ≤ Tamb ≤ Tmax No load, outputs high 400 600 Tmin ≤ Tamb ≤ Tmax Supply current per comparator 10 600 Vicm = 0 to max Vicm = 3 V to 5 V, Vicm = VCC/2 10 300 Tmin ≤ Tamb ≤ Tmax No load, outputs low ICC mV Vicm = VCC/2 (2) Unit 6 Tmin ≤ Tamb ≤ Tmax Supply voltage rejection ratio High-level output voltage drop Typ. Vicm = VCC/2 (2) Common-mode rejection ratio VOH Min. μs 0.5 0.6 39 ns 39 Notes: (1) (2) The specified offset voltage is the maximum value required to drive the output up to 2.5 V or down to 0.3 V. Guaranteed by design DocID026056 Rev 2 7/24 Electrical characteristics TSX3702 Table 4: VCC+ = 5 V, VCC- = 0 V, Tamb = 25 ºC (unless otherwise specified) Symbol Parameter Condition Vio Input offset voltage Iio Input offset current Iib CMR SVR Input bias current (1) VOL Low-level output voltage Max. Vicm = VCC/2 -5 0.1 5 Tmin ≤ Tamb ≤ Tmax -6 1 pA Tmin ≤ Tamb ≤ Tmax Vicm = 0 to + VCC - 1.5 V + VCC 66 65 + VCC 71 Tmin ≤ Tamb ≤ Tmax Vid = 1 V, IOH = 6 mA 85 dB 89 70 180 Tmin ≤ Tamb ≤ Tmax Vid = -1 V, IOL = 6 mA mV 180 5 Response time low to high 9 2.4 Overdrive = 10 mV 1.5 Overdrive = 20 mV 0.9 Overdrive = 40 mV 0.6 Overdrive = 100 mV 0.42 Tmin ≤ Tamb ≤ Tmax TTL input Response time high to low 0.45 2.8 Overdrive = 10 mV 1.8 Overdrive = 20 mV 1.0 Overdrive = 40 mV 0.7 Overdrive = 100 mV 0.46 Tmin ≤ Tamb ≤ Tmax TTL input Tmin ≤ Tamb ≤ Tmax 8/24 DocID026056 Rev 2 0.55 0.6 0.65 Vicm = 0 V, f = 10 kHz, RL = 5.1 kΩ, CL = 50 pF, overdrive = 5 mV (3) μA 0.6 Tmin ≤ Tamb ≤ Tmax tPHL 10 11 Vicm = 0 V, f = 10 kHz, RL = 5.1 kΩ, CL = 50 pF, overdrive = 5 mV (3) 8 9 Tmin ≤ Tamb ≤ Tmax tPLH 250 400 Tmin ≤ Tamb ≤ Tmax No load, outputs high 250 400 Tmin ≤ Tamb ≤ Tmax Supply current per comparator 10 600 Vicm = 0 to - 2 V, Tmin ≤ Tamb ≤ Tmax = 5 V to 10 V, Vicm = VCC/2 10 300 1 No load, outputs low ICC mV Vicm = VCC/2 (2) Unit 6 Tmin ≤ Tamb ≤ Tmax Supply voltage rejection ratio High-level output voltage drop Typ. Vicm = VCC/2 (2) Common-mode rejection ratio VOH Min. 0.55 0.65 0.30 0.40 0.50 μs TSX3702 Electrical characteristics Symbol Parameter Condition Min. Typ. tr Rise time f = 10 kHz, CL = 50 pF, RL = 5.1 kΩ, overdrive 50 mV 30 tf Fall time f = 10 kHz, CL = 50 pF, RL = 5.1 kΩ, overdrive 50 mV 30 Max. Unit ns Notes: (1) (2) The specified offset voltage is the maximum value required to drive the output up to 4.5 V or down to 0.3 V. Guaranteed by design (3) A step from 0 V to 3 V is applied on one input while the other is fixed at 1.4 V. Response time is the time interval between the application of the input voltage step and the moment the output voltage reaches 50 % of its final value. DocID026056 Rev 2 9/24 Electrical characteristics TSX3702 Table 5: VCC+ = 16 V, VCC- = 0 V, Tamb = 25 ºC (unless otherwise specified) Symbol Parameter Condition Vio Input offset voltage Iio Input offset current Iib CMR SVR Input bias current (1) VOL Low-level output voltage Max. Vicm = VCC/2 -5 0.1 5 Tmin ≤ Tamb ≤ Tmax -6 1 pA Tmin ≤ Tamb ≤ Tmax Vicm = 0 to + VCC - 1.5 V + VCC 72 70 + VCC 73 Tmin ≤ Tamb ≤ Tmax Vid = 1 V, IOH = 6 mA 90 dB 90 72 90 Tmin ≤ Tamb ≤ Tmax Vid = -1 V, IOL = 6 mA mV 90 7 tPLH 11 tPHL Vicm = 0 V, f = 10 kHz, RL = 5.1 kΩ, CL = 50 pF, overdrive = 5 mV 2.2 Overdrive = 10 mV 1.4 Overdrive = 20 mV 0.9 Overdrive = 40 mV 0.6 Overdrive = 100 mV 0.45 tf 10/24 Vicm = 0 V, f = 10 kHz, RL = 5.1 kΩ, CL = 50 pF, overdrive = 5 mV 2.4 Overdrive = 10 mV 1.6 Overdrive = 20 mV 1.0 Overdrive = 40 mV 0.7 Overdrive = 100 mV 0.55 μs 0.70 0.75 Rise time f = 10 kHz, CL = 50 pF, RL = 5.1 kΩ, overdrive 50 mV 11 Fall time f = 10 kHz, CL = 50 pF, RL = 5.1 kΩ, overdrive 50 mV 11 DocID026056 Rev 2 μA 0.55 0.60 Tmin ≤ Tamb ≤ Tmax tr 13 14 Tmin ≤ Tamb ≤ Tmax Response time high to low 9 10 Tmin ≤ Tamb ≤ Tmax Response time low to high 150 250 Tmin ≤ Tamb ≤ Tmax No load, outputs high 150 250 Tmin ≤ Tamb ≤ Tmax Supply current per comparator 10 600 Vicm = 0 to - 2 V, Tmin ≤ Tamb ≤ Tmax = 5 V to 16 V, Vicm = VCC/2 10 300 1 No load, outputs low ICC mV Vicm = VCC/2 (2) Unit 6 Tmin ≤ Tamb ≤ Tmax Supply voltage rejection ratio High-level output voltage drop Typ. Vicm = VCC/2 (2) Common-mode rejection ratio VOH Min. ns TSX3702 Electrical characteristics Notes: (1) (2) The specified offset voltage is the maximum value required to drive the output up to 4.5 V or down to 0.3 V. Guaranteed by design DocID026056 Rev 2 11/24 Electrical characteristics 12/24 TSX3702 Figure 3: Current consumption vs. supply voltage, output high Figure 4: Current consumption vs. supply voltage, output low Figure 5: Current consumption vs. input common-mode voltage, output high Figure 6: Current consumption vs. common-mode voltage, output low Figure 7: Output voltage drop vs. output source current, VCC = 5 V Figure 8: Output voltage drop vs. output source current, VCC = 12 V DocID026056 Rev 2 TSX3702 Electrical characteristics Figure 9: Output voltage drop vs. output sink current, VCC = 5 V Figure 10: Output voltage drop vs. output sink current, VCC = 12 V Figure 11: Input offset voltage distribution, VCC = 5 V Figure 12: Input current vs input voltage, VCC = 5 V 1E-3 1E-4 1E-5 1E-6 I ib (A) 1E-7 VCC= 5V T = 125oC o T = 85 C 1E-8 1E-9 1E-10 1E-11 1E-12 o T = 25 C 1E-13 1E-14 0 2 4 6 8 10 12 14 16 Vin (V) Figure 13: Propagation delay tPLH vs. input signal overdrive, VCC = 5 V Figure 14: Propagation delay tPHL vs. input signal overdrive, VCC = 5 V DocID026056 Rev 2 13/24 Electrical characteristics TSX3702 Figure 15: Propagation delay tPLH vs. supply voltage, VCC = 5 V 14/24 Figure 16: Propagation delay tPHL vs. supply voltage, VCC = 5 V DocID026056 Rev 2 TSX3702 6 Application information (input voltages) Application information (input voltages) The ESD strategy used in the TSX3702 (and shown in Figure 2) allows input voltages from -0.3 V up to 16 V to be applied regardless of the VCC+ voltage. When VIN > VCC+ a leakage current goes from the input through the protection diode to the ESD clamp. This current is about 0.2 nA at 25 °C and about 250 nA at 125 °C. For a detailed input characteristic see Figure 12. The device is designed to prevent phase reversal. DocID026056 Rev 2 15/24 Package information 7 TSX3702 Package information In order to meet environmental requirements, ST offers these devices in different grades of ® ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ® ECOPACK is an ST trademark. 16/24 DocID026056 Rev 2 TSX3702 7.1 Package information SO8 package information Figure 17: SO8 package outline Table 6: SO8 package mechanical data Dimensions Millimeters Ref. Min. Typ. A Inches Max. Min. Typ. 1.75 0.069 A1 0.10 A2 1.25 b 0.28 0.48 0.011 0.019 c 0.17 0.23 0.007 0.010 D 4.80 4.90 5.00 0.189 0.193 0.197 E 5.80 6.00 6.20 0.228 0.236 0.244 E1 3.80 3.90 4.00 0.150 0.154 0.157 e 0.25 Max. 0.004 0.010 0.049 1.27 0.050 h 0.25 0.50 0.010 0.020 L 0.40 1.27 0.016 0.050 L1 k ccc 1.04 1° 0.040 8° 0.10 DocID026056 Rev 2 1° 8° 0.004 17/24 Package information 7.2 TSX3702 TSSOP8 package information Figure 18: TSSOP8 package outline Table 7: TSSOP8 package mechanical data Dimensions Millimeters Ref. Min. Typ. A Max. Min. Typ. 1.2 A1 0.05 A2 0.80 b c Max. 0.047 0.15 0.002 1.05 0.031 0.19 0.30 0.007 0.012 0.09 0.20 0.004 0.008 1.00 0.006 0.039 0.041 D 2.90 3.00 3.10 0.114 0.118 0.122 E 6.20 6.40 6.60 0.244 0.252 0.260 E1 4.30 4.40 4.50 0.169 0.173 0.177 e 18/24 Inches 0.65 k 0° L 0.45 0.60 0.0256 8° 0° 0.75 0.018 8° 0.024 L1 1 0.039 aaa 0.1 0.004 DocID026056 Rev 2 0.030 TSX3702 7.3 Package information DFN8 2 x 2 (NB) package information Figure 19: DFN8 2 x 2 (NB) package outline Table 8: DFN8 2 x 2 x 0.6 (NB) mm package mechanical data (pitch 0.5 mm) Dimensions Millimeters Ref. A Inches Min. Typ. Max. Min. Typ. Max. 0.51 0.55 0.60 0.020 0.022 0.024 A1 0.05 A3 0.002 0.15 0.006 b 0.18 0.25 0.30 0.007 0.010 0.012 D 1.85 2.00 2.15 0.073 0.079 0.085 D2 1.45 1.60 1.70 0.057 0.063 0.067 E 1.85 2.00 2.15 0.073 0.079 0.085 E2 0.75 0.90 1.00 0.030 0.035 0.039 e 0.50 0.020 L 0.425 0.017 ddd 0.08 0.003 DocID026056 Rev 2 19/24 Package information TSX3702 Figure 20: DFN8 2 x 2 (NB) recommended footprint 20/24 DocID026056 Rev 2 TSX3702 7.4 Package information MiniSO8 package information Figure 21: MiniSO8 package outline Table 9: MiniSO8 package mechanical data Dimensions Millimeters Ref. Min. Typ. A A1 Inches Max. Min. Typ. 1.1 0 0.15 0.043 0 0.006 A2 0.75 0.95 0.030 b 0.22 0.40 0.009 0.016 c 0.08 0.23 0.003 0.009 D 2.80 3.00 3.20 0.11 0.118 0.126 E 4.65 4.90 5.15 0.183 0.193 0.203 E1 2.80 3.00 3.10 0.11 0.118 0.122 e L 0.85 Max. 0.65 0.40 0.60 0.033 0.026 0.80 0.016 0.024 L1 0.95 0.037 L2 0.25 0.010 k ccc 0° 0.037 8° 0.10 DocID026056 Rev 2 0° 0.031 8° 0.004 21/24 Ordering information 8 TSX3702 Ordering information Table 10: Order codes Order code Temperature range Package Packing Marking TSX3702IDT SO8 SX3702 TSX3702IPT TSSOP8 5X3702 TSX3702IST -40 ºC, 125 ºC TSX3702IQ2T TSX3702IYDT (1) MiniSO8 Tape and reel K532 DFN8 2x2 K5J SO8 (automotive grade) SX3702Y Notes: (1) Qualification and characterization according to AEC Q100 and Q003 or equivalent, advanced screening according to AEC Q001 & Q 002 or equivalent are on-going. 22/24 DocID026056 Rev 2 TSX3702 9 Revision history Revision history Table 11: Document revision history Date Revision 18-Apr-2014 1 Initial release. 2 Table 1: Absolute maximum ratings (AMR): removed footnote associated with Vin. Table 2: Operating conditions: added footnote concerning Vicm. Figure 2: Schematic diagram (one operator): updated Table 6: added "L1" 13-Feb-2015 Changes DocID026056 Rev 2 23/24 TSX3702 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2015 STMicroelectronics – All rights reserved 24/24 DocID026056 Rev 2