RHFL4913A - STMicroelectronics

RHFL4913A
Rad-hard adjustable positive voltage regulator
Datasheet - production data
Description
The RHFL4913A is a high-performance
adjustable positive voltage regulator, able to
provide 2 A of maximum current in FLAT-16
package (3 A in the SMD5C package) from an
input voltage ranging from 3 V to 12 V, with a
typical dropout voltage of 350 mV.
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Features
• Operating input voltage from 3 V to 12 V
• Adjustable output voltage
• 3 A maximum guaranteed output current in
SMD5C package, 2 A in FLAT-16
The RHFL4913A features exceptional radiation
performances. It is tested in accordance with Mil
Std 883E Method 1019.6, in ELDRS conditions.
The device is available in the FLAT-16 and the
new SMD5C hermetic ceramic package, and the
QML-V die is specifically designed for space and
harsh radiation environments. It operates with an
input supply of up to 12 V. The RHFL4913A is
QML-V qualified, DSCC SMD #5962F02524.
• Very low dropout voltage: 350 mV typ @
400 mA
• Embedded overtemperature and overcurrent
protection
• Adjustable overcurrent limitation
• Very low noise: 40 µVRMS (10 Hz-100 kHz)
• Output overload monitoring/signalling
• Inhibit (ON/OFF) TTL-compatible control
• Programmable output short-circuit current
• Remote sensing operation
• Low quiescent current: 1.5 mA typ @ no load,
150 µA in shutdown
• Rad-hard: guaranteed up to 300 krad Mil Std
883E Method 1019.6 high dose rate and 0.01
rad/s in ELDRS conditions
• Heavy ion, SEL immune.
May 2014
This is information on a product in full production.
DocID10005 Rev 17
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www.st.com
Contents
RHFL4913A
Contents
1
Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2
Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5
Device description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
6
5.1
ADJ pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5.2
Inhibit ON-OFF control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5.3
Overtemperature protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5.4
Programmable overcurrent protection . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5.5
OCM pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
6.1
Output capacitor selection and stability. . . . . . . . . . . . . . . . . . . . . . . . . . . 13
6.2
Remote sensing operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
6.3
FPGA power supply lines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
6.4
Notes on the 16-pin hermetic package . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
7
Typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
8
Die information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
8.1
Die bonding pad locations and electrical functions . . . . . . . . . . . . . . . . . 25
9
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
10
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
11
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
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RHFL4913A
List of figures
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
Figure 35.
Figure 36.
Figure 37.
Figure 38.
Figure 39.
Figure 40.
Figure 41.
Figure 42.
Figure 43.
Figure 44.
Figure 45.
Figure 46.
Figure 47.
Figure 48.
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin configuration (top view for FLAT-16, bottom view for SMD5C) . . . . . . . . . . . . . . . . . . . 7
Application diagram for remote sensing operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Baseline bias configuration with remote feedback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Local feedback configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Reference voltage versus temperature (Vin=Vout+2.5 V) . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Reference voltage versus temperature (Vin=12 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Reference voltage vs temperature (Vin=Vout+2.5 V, Iout=1 A) . . . . . . . . . . . . . . . . . . . . . . 16
Reference voltage vs temperature (Vin=12 V, Iout=1 A) . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Reference voltage vs temperature (Vin=Vout+2.5 V, Iout=2 A) . . . . . . . . . . . . . . . . . . . . . . 16
Reference voltage versus temperature (Vin=12 V, Iout=2 A). . . . . . . . . . . . . . . . . . . . . . . . 16
Line regulation vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Load regulation vs temperature (Iout=5 mA to 400 mA) . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Load regulation vs temperature (Iout=5 mA to 1 A). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Inhibit threshold vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Output voltage vs input voltage (Iout=0 mA,T=25 °C and T=125 °C) . . . . . . . . . . . . . . . . . 17
Output voltage vs input voltage (Iout=0 mA,T=0 °C and T=-55 °C). . . . . . . . . . . . . . . . . . . 17
Output voltage vs input voltage (Iout=3 A, T=25 °C and T=125 °C) . . . . . . . . . . . . . . . . . . 18
Output voltage vs input voltage (Iout=3 A, T=0 °C and T=-55 °C). . . . . . . . . . . . . . . . . . . . 18
Quiescent current vs temperature (no load) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Quiescent current vs temperature (Iout=30 mA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Quiescent current vs temperature (Iout=300 mA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Quiescent current vs temperature (Iout=1 A). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Quiescent current vs temperature (Iout=2 A). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Quiescent current vs load current, (Vin=Vout+2.5 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Quiescent current vs load current, (Vin=12 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Dropout voltage vs temperature (Vout=3 V, no load) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Dropout voltage vs temperature (Vout=3 V, Iout=400 mA). . . . . . . . . . . . . . . . . . . . . . . . . . 19
Dropout voltage vs temperature (Vout=3 V, Iout=1 A) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Dropout voltage vs temperature (Vout=3 V, Iout=2 A) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Dropout voltage vs temperature (Vout=3 V, Iout=3 A) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Dropout voltage vs load current (Vout=3 V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Dropout voltage vs load current (Vout=9 V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
SVR vs frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
SVR vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
SVR vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Output noise spectum (Vout=Vadj). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Output noise spectum (Vout=Vadj, Cout=1 µF). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Output noise spectum (Vout=9 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Output noise spectum (Vout=9 V, Cout=1 µF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Short circuit current vs dropout voltage (T=25 °C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Short circuit current vs dropout voltage (T=125 °C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Short circuit current vs dropout voltage (T=-55 °C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Short circuit current vs RSH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Short circuit current vs RSH (zoom) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Enable turn-on/off (Vout=9 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Enable turn-on/off (Vout=1.5 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Turn-on time (Vout=1.5 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
DocID10005 Rev 17
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List of figures
Figure 49.
Figure 50.
Figure 51.
Figure 52.
Figure 53.
Figure 54.
Figure 55.
Figure 56.
Figure 57.
4/32
RHFL4913A
Turn-on time (Vout=9 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Inhibit propagation delay (Lo-Hi). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Inhibit propagation delay (Hi-Lo). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Line transient . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Load transient . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Stability plan (Vout=Vadj) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Die map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
FLAT-16 mechanical drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
SMD5C mechanical drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
DocID10005 Rev 17
RHFL4913A
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Recommended maximum operating ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
FLAT-16 mechanical data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
SMD5C mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Part numbers - SMD equivalent . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Environmental characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
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Diagram
1
RHFL4913A
Diagram
Figure 1. Block diagram
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DocID10005 Rev 17
RHFL4913A
2
Pin configuration
Pin configuration
Figure 2. Pin configuration (top view for FLAT-16, bottom view for SMD5C)
60'&
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$09
Table 1. Pin description
Pin name
FLAT-16 (1)
SMD5C (2)
VO
1, 2, 6, 7
1
VI
3, 4, 5
4
GND
13
5
ISC
8
OCM
10
INHIBIT
14
3
ADJ
15
2
NC
9, 11, 12, 16
1. The upper metallic package lid and the bottom metallization are neither connected to regulator die nor to package
terminals, hence electrically floating.
2. The upper metallic package lid is neither connected to regulator die nor to package terminals, hence electrically floating.
DocID10005 Rev 17
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Maximum ratings
3
RHFL4913A
Maximum ratings
Table 2. Recommended maximum operating ratings (1)
Symbol
Parameter
Value
Unit
12
V
1.23 to 9
V
VI
DC input voltage, VI - VGROUND
VO
DC output voltage range
IO
Output current, RHFL4913KPA
2
IO
Output current, RHFL4913SCA
3
PD
TC = 25 °C power dissipation
15
W
A
TSTG
Storage temperature range
-65 to +150
°C
TOP
Operating junction temperature range
-55 to +150
°C
ESD
Electrostatic discharge capability
Class 3
1. Exceeding maximum ratings may damage the device.
Table 3. Thermal data
Symbol
Parameter
Value
Unit
RthJC
Thermal resistance junction-case, FLAT-16 and SMD5C
8.3
°C/W
TSOLD
Maximum soldering temperature, 10 sec.
300
°C
8/32
DocID10005 Rev 17
RHFL4913A
4
Electrical characteristics
Electrical characteristics
TJ = 25 °C, VI = VO + 2.5 V, CI = CO = 1 µF, unless otherwise specified.
Table 4. Electrical characteristics
Symbol
VI
VO
ISHORT
Parameter
Operating input voltage
Output voltage
Output current limit (1)
ΔVO/ΔVI Line regulation
ΔVO/ΔIO Load regulation
ZOUT
Output impedance
Test conditions
IO = 1 A, TJ = -55 to 125 °C
Min.
3
IO = 1 A for FLAT-16,
2 A for SMD5C,
VO = VADJ
1.19
IO = 1 A for FLAT-16,
2 A for SMD5C
VO = 9 V
8.7
Adjustable by mask/external resistor
Typ.
1
1.23
Max.
Unit
12
V
1.27
V
9.3
V
4.5
A
VI = VO+2.5 V to 12 V, IO = 5 mA,
TJ = +25 °C
0.07
0.35
VI = VO+2.5 V to 12 V, IO = 5 mA,
TJ = -55°C
0.05
0.4
VI = VO+2.5 V to 12 V, IO = 5 mA,
TJ = +125°C
0.1
0.4
VI = 3 V to 12 V, IO = 5 mA,
TJ = -55°C to +125°C
0.1
0.5
VI = VO+2.5 V, IO = 5 to 400 mA,
TJ = +25°C
0.04
0.3
VI = VO+2.5 V, IO = 5 to 400 mA,
TJ = -55°C
0.02
0.5
VI = VO+2.5 V, IO = 5 to 400 mA,
TJ = +125°C
0.02
0.5
VI = VO+2.5 V, IO = 5 mA to 1 A,
TJ = +25 °C
0.08
0.5
VI = VO+2.5 V, IO = 5 mA to 1A,
TJ = -55 °C
0.05
0.6
VI = VO+2.5 V, IO = 5 mA to 1A,
TJ = +125 °C
0.04
0.6
VI = 3 V, IO = 5 mA to 1 A,
TJ = -55°C to +125°C
0.1
0.7
IO = 100 mA DC and 20 mA rms
100
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Electrical characteristics
RHFL4913A
Table 4. Electrical characteristics (continued)
Symbol
Iq
Iq
Iq(off)
Vd
Parameter
Quiescent current
Quiescent current
ON mode
Quiescent current
Shutdown mode
Dropout voltage
Test conditions
Min.
Typ.
Max.
VI = VO+2.5 V,
IO = 5 mA, ON mode (+25 °C)
1.5
6
VI = VO+2.5 V,
IO = 30 mA, ON mode (+25 °C)
2.7
8
VI = VO+2.5 V,
IO = 300 mA, ON mode (+25 °C)
11
25
VI = VO+2.5 V,
IO = 1 A, ON mode (+25 °C)
32
60
VI = VO+2.5 V,
IO = 30 mA, (-55 °C)
3
14
VI = VO+2.5 V,
IO = 300 mA, (-55 °C)
15
40
VI = VO+2.5 V, IO = 1 A, (-55 °C)
52
100
VI = VO+2.5 V,
IO = 30 mA, (+125 °C)
3
8
VI = VO+2.5 V,
IO = 300 mA, (+125 °C)
8
20
VI = VO+2.5 V, IO = 1 A, (+125 °C)
20
40
VI = VO+2 V, VINH = 2.4 V,
OFF mode
0.15
1
IO = 0 mA, VO = 2.5 V to 9 V
130
IO = 400 mA, VO = 2.5 to 9 V,
(+25 °C)
350
450
IO = 400 mA, VO = 2.5 to 9 V,
(-55 °C)
300
400
IO = 400 mA, VO = 2.5 to 9 V, (+125 °C)
450
550
IO = 1 A, VO = 2.5 to 9 V, (+25 °C)
500
650
IO = 1 A, VO = 2.5 to 9 V, (-55 °C)
400
550
IO = 1 A, VO = 2.5 to 9 V, (+125 °C)
640
800
IO = 2 A, VO = 2.5 to 9 V, (+25 °C)
750
IO = 2 A, VO = 2.5 to 9 V, (+125 °C)
950
mA
mA
VINH(ON) Inhibit voltage
IO = 5 mA, TJ = -55 to +125 °C
VINH(OFF) Inhibit voltage
IO = 5 mA, TJ = -55 to +125 °C
2.4
VI = VO + 2.5 V ± 0.5 V,
VO = 3 V IO = 5 mA
f = 120 Hz
60
70
f = 33 KHz
30
40
SVR
ISH
VOCM
10/32
Supply voltage rejection (1)
mA
mV
0.8
V
dB
Shutdown input current
VINH = 5 V
OCM pin voltage
Sinked IOCM = 24 mA active low
DocID10005 Rev 17
Unit
15
µA
0.38
V
RHFL4913A
Electrical characteristics
Table 4. Electrical characteristics (continued)
Symbol
Parameter
Test conditions
Min.
tPLH
tPHL
VI = VO + 2.5V, VINH = 2.4 V, IO = 400
Inhibit propagation delay (1) mA
VO = 3 V
eN
Output noise voltage (1)
Typ.
Max.
Unit
ON-OFF
20
µs
OFF-ON
100
µs
B = 10 Hz to 100 kHz,
IO = 5 mA to 2 A
40
µVrms
1. These values are guaranteed by design. For each application it is strongly recommended to comply with the maximum
current limit of the package used.
Figure 3. Application diagram for remote sensing operation
9R
9R
9,
,QSXW
6XSSO\
6(16(
&$'Q)
5
'87
&R
$'&,
5(027(
*1'
5
5:
5:
$09
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32
Device description
5
RHFL4913A
Device description
The RHFL4913A adjustable voltage regulator contains a PNP type power element
controlled by a signal resulting from an amplified comparison between the internal
temperature-compensated band-gap and the fraction of the desired output voltage value
obtained from an external resistor divider bridge. The device is protected by several
functional blocks.
5.1
ADJ pin
The load output voltage feedback comes from an external resistor divider bridge mid-point
connected to the ADJ pin (allowing all possible output voltage settings as per user
requirements) established between load terminals.
5.2
Inhibit ON-OFF control
By setting the INHIBIT pin TTL high, the device switches off the output current and voltage.
The device is ON when the INHIBIT pin is set low. Since the INHIBIT pin is pulled down
internally, it can be left floating in cases where the inhibit function is not used.
5.3
Overtemperature protection
A temperature detector internally monitors the power element junction temperature. The
device turns off when a temperature of approximately 175 °C is reached, returning to ON
mode when back to approximately 135 °C. Combined with the other protection blocks, the
device is protected from destructive junction temperature excursions in all load conditions. It
should be noted that when the internal temperature detector reaches 175 °C, the active
power element can be as high as 225 °C. Prolonged operation under these conditions far
exceeds the maximum operating ratings and device reliability cannot be guaranteed.
5.4
Programmable overcurrent protection
An internal non fold-back short circuit limitation is set with ISHORT > 3.8 A (VO is 0 V). This
value can be decreased via an external RSH resistor connected between the ISC and VI pins,
with a typical value range of 10 kΩ to 200 kΩ (refer to Figure 44. and Figure 45.). To
maintain optimal VO regulation, it is necessary to set ISHORT 1.6 times greater than the
maximum desired application IO. When IO reaches ISHORT – 300 mA, the current limiter
overrules the regulation, VO starts to drop and the OCM flag is raised. When no current
limitation adjustment is required, the ISC pin must be left unbiased (as it is in 3 pin
packages).
5.5
OCM pin
The OCM pin goes low when the current limit becomes active, otherwise VOCM = VI. It is
buffered and can sink 10 mA. The OCM pin is internally pulled up by a 5 kΩ resistor.
12/32
DocID10005 Rev 17
RHFL4913A
6
Application information
Application information
To adjust the output voltage, the R2 resistor must be connected between the VO and ADJ
pins. The R1 resistor must be connected between ADJ and ground. Resistor values can be
derived from the following formula:
VO = VADJ (R1+ R2) / R1
The VADJ is typically 1.23 V, controlled by the internal temperature-compensated band gap
block.
The minimum input voltage is 3 V. The RHFL4913A adjustable is functional as soon as the
VI - VO voltage difference is slightly above the power element saturation voltage. The adjust
pin to ground resistor (R1) value must not be greater than 10 kΩ, in order to keep the output
feedback error below 0.2%. A minimum of 0.5 mA IO must be set to ensure perfect no-load
regulation. It is advisable to dissipate this current into the divider bridge resistor.
All available VI pins, as well as all available VO pins, should always be externally
interconnected, otherwise the stability and reliability of the device cannot be guaranteed.
The inhibit function switches off the output current electronically, and therefore very quickly.
According to Lenz’s Law, external circuitry reacts with LdI/dt terms which can be of high
amplitude in case somewhere a serial coil inductance exists. Large transient voltage would
develop on both device terminals. It is advisable to protect the device with Schottky diodes
to prevent negative voltage excursions. In the worst case, a 14 V Zener diode could protect
the device input.
Since the RHFL4913A adjustable voltage regulator is manufactured with very high speed
bipolar technology (6 GHz fT transistors), the PCB layout must be designed with exceptional
care, with very low inductance and low mutually coupling lines. Otherwise, high frequency
parasitic signals may be picked up by the device resulting in system self-oscillation. The
benefit is an SVR performance extended to far higher frequencies.
6.1
Output capacitor selection and stability.
The device has been designed for high stability and low dropout operation.
To ensure regulator stability, input and output capacitors with a minimum 1 µF are
mandatory. When large transient currents are expected, larger value capacitors are
necessary. The detailed stability plane versus output capacitance and ESR is shown in
Figure 54.
In the case of high current operation with short circuit events expected, caution must be
exercised with regard to capacitors. They must be connected as close as possible to the
device terminals. As some tantalum capacitors may permanently fail when subjected to high
charge-up surge currents, it is recommended to decouple them with 470 nF polyester
capacitors.
6.2
Remote sensing operation
A separate kelvin voltage sensing line provides the ADJ pin with exact load "high potential"
information (see Figure 3). But variable remote load current consumption induces variable
Iq current (Iq is roughly the IO current divided by the hFE of the internal PNP series power
DocID10005 Rev 17
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32
Application information
RHFL4913A
element) routed through the parasitic series line resistor RW2. To compensate for this
parasitic voltage, resistor RW1can be introduced to provide the necessary compensating
voltage signal to the ADJ pin.
A ceramic or poliester 47nF CADJ capacitor between ADJ and VOUT pins is recommended
when the remote sensing technique is implemented.
6.3
FPGA power supply lines
Because FPGA devices are very sensitive to VDD transients beyond a few % of their
nominal supply voltage (usually 1.5 V), special attention must be given by supply lines
designers to mitigate possible heavy ion disturbances. The worst case heavy ion effect can
be summarized as: the RHFL4913 internal control loop being cut (made open) or shortcircuited for a sub-microsecond duration. During such an event, the RHFL4913 power
element can either provide excessive current or current supply stoppage to the output
(VOUT) for a duration of about one microsecond, after which time the RHFL4913 smoothly
recovers to nominal operation.
According to the simulations, some very short SET (i.e. those having duration <100nsec)
are dependent also on the stray inductances related to the PCB topology, especially those
on the ground.
To mitigate these "transients", it is recommended to implement the RHFL4913 PCB layout
as follows:
•
Minimizing series/parallel parasitic inductances of the PCB path
•
Using an effective grounding scheme with short connections to GND, such as a starbus topology, whose board GND is at the GND force. The best solution is a ground
plane.
•
Using a low ESR 47 µF COUT filtering capacitor, with ESR lower than 30mΩ, together
with a 470 nF ceramic capacitor in parallel (to reduce dynamic ESR)
•
Implementing the SET mitigation circuit, by adding additional filtering components as
described in Figure 4.and Figure 5.
With this implementation, the ELDO simulated worst transient case shows no more than 90
mV deviation from the nominal line voltage value.
Additional details and suggestions regarding the application techniques aimed to mitigate
the SET effects on a linear voltage regulator can be found in the AN2984 (“Minimizing the
SET-related effects on the output of a voltage linear regulator„ available on www.st.com).
14/32
DocID10005 Rev 17
RHFL4913A
Application information
Figure 4. Baseline bias configuration with remote feedback
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Figure 5. Local feedback configuration
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6.4
Notes on the 16-pin hermetic package
The bottom section of the 16-pin package is metallized in order to allow the user to directly
solder the RHFL4913A onto PCB, no heat sink needed for enhanced heat removal.
DocID10005 Rev 17
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Typical characteristics
7
RHFL4913A
Typical characteristics
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Figure 10. Reference voltage vs temperature
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RHFL4913A
Typical characteristics
Figure 13. Load regulation vs temperature
(Iout=5 mA to 400 mA)
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Figure 15. Inhibit threshold vs temperature
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Figure 17. Output voltage vs input voltage
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(Iout=0 mA,T=25 °C and T=125 °C)
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Figure 14. Load regulation vs temperature
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32
Typical characteristics
RHFL4913A
Figure 18. Output voltage vs input voltage
(Iout=3 A, T=25 °C and T=125 °C)
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Figure 20. Quiescent current vs temperature
(no load)
Figure 21. Quiescent current vs temperature
(Iout=30 mA)
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RHFL4913A
Typical characteristics
Figure 25. Quiescent current vs load current,
(Vin=Vout+2.5 V)
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(Iout=2 A)
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Figure 26. Quiescent current vs load current,
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Figure 27. Dropout voltage vs temperature
(Vout=3 V, no load)
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Figure 29. Dropout voltage vs temperature
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Figure 28. Dropout voltage vs temperature
(Vout=3 V, Iout=400 mA)
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Typical characteristics
RHFL4913A
Figure 31. Dropout voltage vs temperature
(Vout=3 V, Iout=3 A)
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Figure 30. Dropout voltage vs temperature
(Vout=3 V, Iout=2 A)
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Figure 32. Dropout voltage vs load current
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Figure 33. Dropout voltage vs load current
(Vout=9 V)
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Figure 34. SVR vs frequency
Figure 35. SVR vs load current
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RHFL4913A
Typical characteristics
Figure 36. SVR vs temperature
Figure 37. Output noise spectum (Vout=Vadj)
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Figure 38. Output noise spectum
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Figure 39. Output noise spectum (Vout=9 V)
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Figure 41. Short circuit current vs dropout
voltage (T=25 °C)
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Typical characteristics
RHFL4913A
Figure 42. Short circuit current vs dropout
voltage (T=125 °C)
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Figure 44. Short circuit current vs RSH
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Figure 45. Short circuit current vs RSH (zoom)
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Figure 46. Enable turn-on/off (Vout=9 V)
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Figure 47. Enable turn-on/off (Vout=1.5 V)
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RHFL4913A
Typical characteristics
Figure 48. Turn-on time (Vout=1.5 V)
Figure 49. Turn-on time (Vout=9 V)
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Figure 51. Inhibit propagation delay (Hi-Lo)
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Figure 53. Load transient
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Typical characteristics
RHFL4913A
Figure 54. Stability plan (Vout=Vadj)
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RHFL4913A
8
Die information
Die information
Figure 55. Die map
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Note:
Pad numbers reflect terminal numbers when placed in case FLAT-16.
8.1
Die bonding pad locations and electrical functions
Die physical dimensions:
–
Die size: 150 mils x 110 mils (3.81 mm by 2.79 mm)
–
Die thickness: 375 µm ± 25 µm (14.8 mils ± 1 mil)
Pad size: VIN, VOUT pads: 450 µm x 330 µm (17.7 mils by 13 mils)
–
Control pads: 184 µm x 184 µm (7.25 mils square)
Interface materials:
–
Top metallization: Al/Si/Cu, 1.05 µm ± 0.15 µm
–
Backside metallization: none
Glassivation:
–
Type: p. vapox + nitride
–
Thickness: 0.6 µm ± 0.1 µm + 0.6 µm ± 0.08 µm
Substrate:
–
bare silicon
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Die information
RHFL4913A
Assembly related information:
26/32
–
Substrate potential: floating recommended to be tied to ground.
–
Special assembly instructions: "Sense" pad not used; not internally connected to
any part of the IC. Can be connected to ground when space anti-static electricity
rules apply.
DocID10005 Rev 17
RHFL4913A
9
Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
Figure 56. FLAT-16 mechanical drawing
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Package mechanical data
RHFL4913A
Table 5. FLAT-16 mechanical data
Dimensions
Symbol
Min.
Max.
A
2.42
2.88
b
0.38
0.48
c
0.10
0.18
D
9.71
10.11
E
6.71
7.11
E2
3.30
E3
0.76
e
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Typ.
3.45
3.60
1.27
L
6.35
7.36
Q
0.66
1.14
S1
0.13
DocID10005 Rev 17
RHFL4913A
Package mechanical data
Figure 57. SMD5C mechanical drawing
%
Table 6. SMD5C mechanical data
Dimensions
Symbol
Min.
Typ.
Max.
A
2.84
3.00
3.15
A1
0.25
0.38
0.51
b
7.13
7.26
7.39
b1
4.95
5.08
5.21
b2
2.28
2.41
2.54
b3
2.92
3.05
3.18
D
13.71
13.84
13.97
D1
0.76
E
7.39
7.52
7.65
e
1.91
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Ordering information
10
RHFL4913A
Ordering information
Table 7. Order codes
FLAT-16
SMD5C
Terminal
finish
Output
voltage
Quality level
RHFL4913KPA-01V
RHFL4913SCA07V
Gold
Adj
QML-V
Solder
Adj
QML-V
Gold
Adj
EM1
L4913ADIE2V
Adj
QML-V die
L4913ADIES
Adj
EM1 die
Die
RHFL4913KPA-02V
RHFL4913KPA1
RHFL4913SCA1
Table 8. Part numbers - SMD equivalent
ST part number
SMD part number
RHFL4913KPA-01V
5962F0252401VXC
RHFL4913KPA-02V
5962F0252401VXA
RHFL4913SCA07V
5962F0252403VUC
L4913ADIE2V
5962F0252401V9A
Table 9. Environmental characteristics
Parameter
Conditions
Value
Unit
Output voltage thermal drift
-55°C to +125°C
40
ppm/°C
Output voltage radiation drift
From 0 krad to 300 krad at 0.55 rad/s
8
ppm/krad
Output voltage radiation drift
From 0 krad to 300 krad, Mil Std 883E Method
1019.6
6
ppm/krad
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11
Revision history
Revision history
Table 10. Document revision history
Date
Revision
Changes
29-Oct-2004
3
New order codes added - Tables 4 and 5.
27-May-2005
4
Features, Tables 4, 5 and the Figure 1 has been updated. Add the Mechanical
Data SOC-16.
08-Jun-2005
5
Mistake on Table 4 (Q.ty Level), Table 7 has been updated and add DIE
Information.
30-Jan-2006
6
Added new package SMD5C and removed old package SOC-16.
26-Jan-2007
7
DIE Information and DIE Pad has been updated par. 6, pages 9 and 10.
23-Nov-2007
8
Pin information for the SMD5C package updated in Table 1; added section 6.3:
FPGA power supply lines on page 14. Minor text changes.
22-Sep-2008
9
Modified Application information on page 13.
17-Nov-2008
10
Modified Table 8 on page 30.
21-Jan-2010
11
Modified Table 7 on page 30.
18-Oct-2010
12
Modified Section 6.2 on page 13.
07-Feb-2011
13
Added: note Table 1 on page 7.
07-Dec-2011
14
Removed the note under Table 1 on page 7 and added footnotes 1 and 2.
20-Aug-2012
15
Order code updated in Table 7 on page 30 about the SMD5C package
15-Jan-2014
16
Updated Features in cover page.
Added Section 7: Typical characteristics.
Modified Table 4: Electrical characteristics.
Updated Section 9: Package mechanical data and Section 10: Ordering
information.
Minor text changes.
05-May-2014
17
Updated Figure 18: Output voltage vs input voltage (Iout=3 A, T=25 °C and
T=125 °C).
Minor text changes.
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RHFL4913A
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