AVR078: STK524 User’s Guide (Mega32M1 Mega32C1) 8-bit 1. Introduction The STK524 kit is made of the STK524 board, AVRCANAdapt and AVRLINAdapt boards. The STK524 board is a top module for the STK500 development board from Atmel Corporation. It is designed to support the ATmega32M1, ATmega32C1 products and future compatible derivatives. AVRCANAdapt is a hardware driver for CAN network featuring the Atmel AT6660 CAN driver while the AVRLINAdapt is the hardware driver for LIN, featuring the Atmel AT6661 LIN driver. The STK524 includes connectors and hardware allowing full utilization of the new features of the ATmega32M1 and ATmega32C1, while the Zero Insertion Force (ZIF) socket allows easy to use of TQFP32 package for prototyping. This user guide acts as a general getting started guide as well as a complete technical reference for advanced users. Notice that in this guide, the word AVR is used to refer to the target components (ATmega32M1, ATmega32C1 and derivatives). ATmega32M1 and ATmega32C1 will be also used to refer one of the products from this family. Microcontrollers Application Note Figure 1-1. STK524 Top Module for STK500 with LIN & CAN buses adapters AVRLINAdapt AVRCANAdapt 2. Features • STK524 is a New Member of the Successful STK500 Starter Kit Family. • Supports the ATmega32M1 and ATmega32C1. • CAN Interface thru Port using hardware bridge included • LIN Interface thru Port using hardware bridge included • Supported by AVR Studio® 4. • Zero Insertion Force Socket for TQFP32 Package. • High Voltage Parallell Programming. • Serial Programming. • 6 Pin Connector for On-chip Debugging using JTAGICE mkII or AVR Dragon emulators. • Potentiometer for the Demo Application. • Quick Reference to all Jumpers in the Silk-Screen of the PCB. 2 AVR078 7780A–AVR–02/08 AVR078 3. Using the STK524 Top Module 3.1 Connecting the STK524 to the STK500 Starter Kit Connect the STK524 to the STK500 expansion header 0 and 1. It is important that the top module is connected in the correct orientation as shown in Figure 3-1. The EXPAND0 written on the STK524 top module should match the EXPAND0 written beside the expansion header on the STK500 board. Figure 3-1. Connecting STK524 to the STK500 Board Note: 3.1.1 Connecting the STK524 with wrong orientation may damage the board. Placing a ATmega32M1 or ATmega32C1 on the STK524 The STK524 contains a ZIF socket for a TQFP32 package. Care should be taken so that the device is mounted with the correct orientation. Figure 3-2 shows the location of pin1 for the ZIF socket. 3 7780A–AVR–02/08 Figure 3-2. Pin1 on ZIF Socket Pin1 Caution: Do not mount a ATmega32M1 or ATmega32C1 on the STK524 at the same time as an AVR is mounted on the STK500 board. None of the devices might work as intended. 3.2 AVRLINAdapt & AVRCANAdapt description LIN bus & CAN bus need electrical drivers to be used with ATmega32M1/C1. 2 bus adapters : AVRCANAdapt & AVRLINAdapt are provided for this usage. 3.2.1 AVRLINAdapt Figure 3-3. LIN bus adapter. Optional LIN Address LIN network LIN AVR port LIN wake up Note: 4 Master LIN (when closed) When Optional LIN address jumper is closed, a LIN address can be defined using the potentiometer. AVR078 7780A–AVR–02/08 AVR078 3.2.2 AVRCANAdapt See STK501CAN extension user’s guide for more detailed information Figure 3-4. CAN bus adapter. CAN network CAN Termination resistors (when closed) Split voltage Slope control CAN AVR port 3.3 Connecting the AVRLINAdapt & AVRCANAdapt to STK524 LIN bus & CAN bus are accessible thru the add-on boards provided in the kit : AVRLINAdapt & AVRCANAdapt. These could be connected either to J4 or J5. Connect them on both J4 & J5 to access LIN & CAN buses as shown in Figure 3-5. J4 and J5 share the same definition mentioned in the table below : Table 3-1. CAN & LIN J4, J5 description : Pin # Pin Name 1 Not connected 2 Not connected 3 RxLIN 4 TxLIN 5 ISRC 6 TxCAN 7 RxCAN 8 NLSP 9 GND 10 VTG 5 7780A–AVR–02/08 Figure 3-5. Connecting AVRLINAdapt & AVRCANAdapt to STK524 CAN network LIN network LIN network CAN network Note: It is recommended to mount a 8 MHz crystal when using CAN interface on the STK524. 6 AVR078 7780A–AVR–02/08 AVR078 4. Programming the AVR The AVR (ATmega32M1, ATmega32C1) can be programmed using both serial SPI and Highvoltage Parallel Programming. This section will explain how to connect the programming cables to successfully use one of these two modes. The AVR Studio STK500 software is used in the same way as for other AVR parts Note: 4.1 The ATmega32M1 and ATmega32C1 also support Self Programming, See AVR109 application note for more information on this topic. Serial In-System Programming Figure 4-1. Serial In-System Programming To program the ATmega32M1 or ATmega32C1 using ISP Programming mode, connect the 6wire cable between the ISP6PIN connector on the STK500 board and the ISP connector on the STK524 board as shown in Figure 4-1. The device can be programmed using the Serial Programming mode in the AVR Studio4 STK500 software. The STK500 & STK524 jumpers must follow the configuration: 7 7780A–AVR–02/08 Table 4-1. In-System programming jumper settings for ATmega32M1/C1 STK500 VTARGET Mounted AREF Optional RESET Opened XTAL1 Mounted OSCSEL Mounted, pin 1 and 2 BSEL2 Optional PJUMP Optional STK524 VTG 4.2 Note: See STK500 User Guide for information on how to use the STK500 front-end software for ISP Programming. Note: Beware not having AVRLINAdapt connected to either J4 or J5 when doing In-System Programming. ISP and LIN share PD3 for MOSI_A & TXLIN, PE2 for SCK_A & RXLIN. Data received on MOSI_A are output on TXLIN. RXLIN received data from TXLIN in regards of the LIN protocol, then conflict occurs on SCK_A line. High-voltage Programming Figure 4-2. 8 Mounted High-voltage (Parallel) Programming AVR078 7780A–AVR–02/08 AVR078 To program the AVR using High-voltage (Parallel) Programming, connect the PROGCTRL to PORTD and PROGDATA to PORTB on the STK500 as shown in Figure 4-2. Make sure that the TOSC-switch is placed in the XTAL position. The STK500 & STK524 jumpers must follow the configuration : Table 6-1. High-Voltage programming jumper settings for ATmega32M1/C1 STK500 VTARGET Mounted AREF Optional RESET Mounted XTAL1 Mounted OSCSEL Mounted, pin 1 and 2 BSEL2 Mounted PJUMP Open STK524 VTG Mounted The device can now be programmed using the High-voltage Programming mode in AVR Studio STK500 software. 4.3 Note: See the STK500 User Guide for information on how to use the STK500 front-end software in Highvoltage Programming mode. Note: For the High-voltage Programming mode to function correctly, the target voltage must be higher than 4.5V. JTAGICE mkII Connector See the following document : “JTAGICE mkII Quick Start Guide” which purpose is “Connecting to a target board with the AVR JTAGICE mkII”. This note explains which signals are required for ISP and which signals are required for debugWIRE. Figure 4-3 shows how to connect the JTAGICE mkII probe on the STK524 board. 9 7780A–AVR–02/08 Figure 4-3. Connecting JTAGICE mkII to the STK524 The ISP connector is used for the ATmega32M1/C1 built-in debugWire interface. The pin out of the connector is shown in Table 4-2 and is compliant with the pin out of the JTAG ICE available from Atmel. Connecting a JTAGICE mkII to this connector allows On-chip Debugging of the ATmega32M1/C1. More information about the JTAGICE mkII and On-chip Debugging can be found in the AVR JTAGICE mkII User Guide, which is available at the Atmel web site, www.atmel.com. Note: Remove the RESET jumper on the STK500 to work run properly JTAGICE mkII. Table 4-2. 10 STK524 ISP/DW Connector Pinout Squid Cable Colours Target pins Target pins Squid Cable Colours grey MISO 1 2 VTG purple black SCK 3 4 MOSI red green RESET 5 6 GND brown STK524 ISP pinout AVR078 7780A–AVR–02/08 AVR078 Note: 4.4 MISO, MOSI & SCK lines can be disconnected when the product is in debugging mode. These can be used then for application purpose. STK524 Jumpers, Leds & Test Points Table 4-3. STK524 Jumpers Jumper Function Description JP1 VTG Useful to measure the VCC and AVCC current JP2 ANA REF Connect STK500 REF circuit to AVR AREF JP3 ISRC Closed to have a 1K resistor on ISRC pin (1) JP4 POT_SUPPLY Always closed, enable to supply potentiometer POT JP5.2 is output of potentiometer to connect either on signal port on STK500 or ADC input. TxD RxD UART lines to connect to TxD & RxD line on STK500, see Figure 4.5 UART connection JP5 JP6 (1) : Let it opened if the address resistor of the AVRLINAdapt is selected.See “LIN bus adapter.” on page 4 Table 4-4. 4.5 STK524 Test Points Test Point Function Description T1 GND Electrical ground of the STK524 board T2 AREF AREF pin of the AVR UART connection The STK524 includes a Rx/Tx 2-pin header which enables to connect the ATmega32M1/C1 UART Tx/Rx lines to Tx/Rx lines of STK500 as shown on Figure 4-3. Figure 4-4. UART connection 11 7780A–AVR–02/08 4.6 Potentiometer The STK524 includes a potentiometer. To use the potentiometer, please mount JP4 and use JP5.2 line as Potentiometer output. The potentiometer is supplied by AREF and it delivers a voltage to JP5.2. This line can be connected to any Port lines or ADC input on the STK500. Figure 4-5. 4.7 Potentiometer Extra functions The STK524 includes a footprint for a ZIF socket to evaluate QFN32 package. Socket is not mounted but can be populated using the PN : QFN32 bt-0,65-01-00 from ENPLAS 5. Technical Specifications System Unit Physical Dimensions 56 x 119 x 27 mm Weight 70 g Operating Conditions 12 Voltage Supply 1,8V - 5,5V Temperature 0°C - 50°C AVR078 7780A–AVR–02/08 AVR078 6. Technical Support For Technical support, please contact [email protected]. When requesting technical support, please include the following information: • • • • • • • • Which target AVR device is used (complete part number). Target voltage and speed. Clock source and fuse setting of the AVR. Programming method (ISP or High-voltage). Hardware revisions of the AVR tools, found on the PCB. Version number of AVR Studio. This can be found in the AVR Studio help menu. PC operating system and version/build. PC processor type and speed. A detailed description of the problem. 7. Complete Schematics On the following pages the complete schematics and assembly drawing of the STK524 revision A, AVRLINAdapt, AVRCANAdapt/STK501CAN extension are shown. 13 7780A–AVR–02/08 14 A B C D VTG 5 C1 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 RESET PC7 PC5 PC3 PC1 PE1 3 GND AUXI0 CT7 CT5 CT3 CT1 (n.c.) NRST PE1 GND VTG PC7 PC5 PC3 PC1 PA7 PA5 PA3 PA1 GND GND AUXO0 CT6 CT4 CT2 BSEL2 REF PE2 PE0 GND VTG PC6 PC4 PC2 PC0 PA6 PA4 PA2 PA0 GND EXP. CON 0 PB6 PB4 PB2 PB0 PD6 PD4 PD2 PD0 XT2 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 J2 EXP. CON 1 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 VTG PE0 PE2 PE1 CON 2x20 GND AUXO1 DATA6 DATA4 DATA0 DATA9 SO CS XT2 VTG GND PB6 PB4 PB2 PB0 PD6 PD4 PD2 PD0 GND VTG 3 CON 2x20 GND AUXI1 DATA7 DATA5 DATA3 DATA1 SI SCK XT1 VTG GND PB7 PB5 PB3 PB1 PD7 PD5 PD3 PD1 GND J1 4 4 PA0 is connected to PE2 for BSEL2 function. PB7 PB5 PB3 PB1 PD7 PD5 PD3 PD1 XT1 100nF 5 Date: Size A Title 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 PB[7..0] PC[7..0] PD[7..0] PE[2..0] ID=0xCC 2 Tuesday, February 19, 2008 Document Number <Doc> 2K R1 Q1 BC847B STK524 MEZZANINE FOR STK500 PE2 PC6 PC4 PC2 PC0 REF PE2 PE0 C13 100nF 10K R2 Sheet POWER & EXPANSION CONNECTORS VTG 2 1 1 of PB[7..0] PC[7..0] PD[7..0] PE[2..0] AREFT 1 C2 1nF 4 Rev B A B C D Figure 6-1. Schematics, 1 of 4 AVR078 7780A–AVR–02/08 7780A–AVR–02/08 A B C D 5 PE[2..0] PD[7..0] C4 15pF C3 15pF PD[7..0] 5 RxD 2 1 TxD JP6 PD2 PD4 PE0 PD3 Y1 8MHz PE2 PE1 1 3 5 4 ISP CON CON 2x3 VCC PDI GND PE[2..0] PDO SCK RESET J3 Same orientation than on STK500 PD4 PD3 4 2 4 6 C12 100nF VTG AREF_S AREF_S 3 3 RXLIN ISRC RXCAN RXLIN ISRC RXCAN 1 3 5 7 9 1 3 5 7 9 J4 EXT2 EXT4 EXT6 EXT8 VCC EXT2 EXT4 EXT6 EXT8 VCC Date: Size A Title C14 100nF TXLIN TXCAN NLSP C15 100nF TXLIN TXCAN NLSP VTG VTG PD4 PD3 PD4 PD3 PC3 PC2 PC7 PC3 PC2 PC7 2 Tuesday, February 19, 2008 Document Number <Doc> Sheet STK524 MEZZANINE FOR STK500 2 4 6 8 10 2 4 6 8 10 ISP, DebugWire, CAN, LIN, UART PORT_COM2 CON 2x5 EXT1 EXT3 EXT5 EXT7 GND J5 PORT_COM1 CON 2x5 EXT1 EXT3 EXT5 EXT7 GND 2 2 1 1 of PC[7..0] PD[7..0] PC[7..0] PD[7..0] 4 Rev B A B C D AVR078 Figure 6-2. Schematics, 2 of 4 15 A B C D PC[7..0] PE[2..0] VTG 5 PC[7..0] C8 PE1 PE2 PE0 100nF 2 PE[2..0] VTG 1 JP1 PC2 PC3 PC1 PC0 C5 100nF PD4 PD1 PD0 PB1 PB0 4 BLM-21A102S L1 4 1 2 3 4 5 6 7 8 U101 PD2 PD3 PC1 VCC GND PC2 PC3 PB0 VCC_S 100nF C6 32 31 30 29 28 27 26 25 AVCC_S 3 3 ATmega32M1_C1_tqfp32 TQFP32 24 23 22 21 20 19 18 17 AREF_S PB4 PB3 PC6 AREF AGND AVCC PC5 PC4 PD1 PE0 PC0 PD0 PB7 PB6 PB5 PC7 PB1 PE1 PE2 PD4 PD5 PD6 PD7 PB2 16 9 10 11 12 13 14 15 16 5 Date: Size A Title JP2 2 JP3 PC5 PC4 PC6 PC7 2 PB2 PB4 PB3 PB7 PB6 PB5 R3 1K PD7 PD6 PD5 AREFT 2 Tuesday, February 19, 2008 Document Number <Doc> Sheet STK524 MEZZANINE FOR STK500 ISRC 1 ANA REF 1 2 MICROCONTROLLER TQFP SOCKET GND TP T1 C7 10nF AREFTP T2 3 PB[7..0] 1 PD[7..0] 1 of 4 Rev B PB[7..0] PD[7..0] A B C D Figure 6-3. Schematics, 3 of 4 AVR078 7780A–AVR–02/08 A B C PC[7..0] PE[2..0] 5 PE[2..0] PE1 PE2 PE0 PC2 PC3 PC1 PC0 PD4 PD2 PD3 PD1 PD0 VCC_S 4 4 C9 100nF PB1 PB0 1 2 3 4 5 6 7 8 U102 3 C10 10nF 32 31 30 29 28 27 26 25 PD2 PD3 PC1 VCC GND PC2 PC3 PB0 3 100nF C11 Date: Size A Title ATmega32M1_C1_qfn32 QFN32 24 23 22 21 20 19 18 17 AVCC_S PB4 PB3 PC6 AREF AGND AVCC PC5 PC4 PD1 PE0 PC0 PD0 PB7 PB6 PB5 PC7 PB1 PE1 PE2 PD4 PD5 PD6 PD7 PB2 9 10 11 12 13 14 15 16 PC5 PC4 PC6 PC7 PB2 PB4 PB3 PB7 PB6 PB5 PD7 PD6 PD5 2 Tuesday, February 19, 2008 Sheet MICROCONTROLLER QFN32 SOCKET Document Number <Doc> 1 4 1 PB[7..0] PD[7..0] P1 voltage increases when it is turned in the CW direction STK524 MEZZANINE FOR STK500 2 2 1 7780A–AVR–02/08 JP5 of 4 Rev B PB[7..0] PD[7..0] (not connected) P1 100K JP4 2 1 D AREF_S 5 A B C D AVR078 Figure 6-4. Schematics, 4 of 4 17 A B C 3 2 1 U2 BAT LIN GND LIN MALE CONNECTOR MC 1,5/4-ST-3,81 1 2 3 4 LIN HEADER CD075014 1X3 J4 5 ISRC J5 GND LIN FEMALE CONNECTOR MC 1,5/4-G-3,81 1 2 3 4 D1 1 R3 1k BAS16W 3 YMJ-02-O-BK 4 GND C1 100n MASTER LIN J2 CD075014 1X2 1 2 JS2 U1 INH RXD VS EN LIN WAKE GND TXD 1 2 3 4 WUP LIN ATA6661-TAQJ 8 7 6 5 3 4 GND 1 2 4 3 SW1 SKRAALE010 3 J6 2 1 J1 2 4 6 8 10 Date: Size A 2 Thursday, August 23, 2007 Document Number PE020940 AVRLINADAPT ATMEL Nantes SA La Chantrerie BP 70602 44306 Nantes Cedex 3 FRANCE Title VTG TxLIN VTG YMJ-02-O-BK JS6 CD075014 2X5 PORT 1 3 5 7 9 J3 <Variant Name> R6 1k 2 4 6 8 10 CD075014 2X5 PORT 1 3 5 7 9 2 3266W-1-253_LF R5 GND RxLIN GND 2 CD075014 1X2 R2 10k GND 3 18 1 D 5 Sheet VTG R1 1k 1 1 1 of 1 VTG R4 1k Rev A A B C D Figure 6-5. ATAVRLINADAPT AVR078 7780A–AVR–02/08 GND PD0 PD2 PD4 CANRx PD6 GND PD0 PD2 PD4 CANRx PD6 2 4 6 8 10 2 4 6 8 10 VCC CANTx PD1 PD3 PD5 PD7 GND C7 100N_16V_X7R VCC CANTx C6 100N_16V_X7R PD1 PD3 PD5 PD7 GND PH_2,54_5 X 2 AVR PORT D Not mounted 1 3 5 7 9 J7 PH_2,54_5 X 2 AVR PORT D 1 3 5 7 9 1 2 PD[0..7] CANTx CANRx PD6 CANRx CANTx PD5 PD6 PD5 GND 0R 1 R9 0R 1 R8 2 2 0R Not mounted 1 R12 2 VCC GND GND 4 3 ATA6660 RXD VCC GND TXD CAN1 U1 C3 100N_16V_X7R GND 2 1 SHDN CANL CANH VREF CANL CANH RS MAX3050ASA RXD VCC GND 5 6 7 8 5 6 7 CAN2 U2 Not mounted 8 TXD RS C4 100N_16V_X7R 4 3 2 VCC 0R 1 Not mounted 1 R11 2 VREF CAN_L 0R 1 R10 2 0R GND 2 J4 1 1 VCC GND ON R4 62R GND R6 0R R7 24K Not mounted C2 100N_16V_X7R 1 JS3 SHUNT_CON_2,54 JS4 SHUNT_CON_2,54 PH_2,54_2 X 1_B TERM J3 R5 62R /SHDN CTRL VSPLIT 2 C1 PH_2,54_2 X 1_B 10N_50V_X7R SPLIT R14 0R Not mounted CAN_H CTRL /SHDN CAN_L CAN_H Not mounted 1 R13 2 CTRL 2 CAN_H CAN_L J5 PH_2,54_3 X 1 SLOPE CTRL SHUNT_CON_2,54 2 1 1 OFF 2 1 2 1 2 CTRL 3 2 1 2 1 1 2 2 4 6 8 10 1 3 5 7 9 J6 1 2 2 1 1 2 CAN flatcable J2 PH_2,54_5 X 2 Not mounted 2 7780A–AVR–02/08 GND 1 JS5 R1 0R CAN_SHLDDB9 CAN_V+ CAN_RES4 CAN_RES8 CAN_GND CAN_H CAN_L CAN_GND CAN_RES1 CAN_SHLDFLAT 10 (1 res) (4 res) (8 res) 9_PIN_MALE 5 9 4 8 3 7 2 6 1 11 GND GND CAN BUS D-SUB MALE J1 0R Not mounted 1 R3 2 0R 2 Not mounted 1 R2 AVR078 Figure 6-6. STK501 CAN Add On 19 Headquarters International Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Atmel Asia Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong Tel: (852) 2721-9778 Fax: (852) 2722-1369 Atmel Europe Le Krebs 8, Rue Jean-Pierre Timbaud BP 309 78054 Saint-Quentin-enYvelines Cedex France Tel: (33) 1-30-60-70-00 Fax: (33) 1-30-60-71-11 Atmel Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan Tel: (81) 3-3523-3551 Fax: (81) 3-3523-7581 Technical Support Enter Product Line E-mail Sales Contact www.atmel.com/contacts Product Contact Web Site www.atmel.com Literature Requests www.atmel.com/literature Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. 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