Active Errata List • • • • • • • • • • • • USB – Ping-Pong databank 1 Re-transmission Failure USB – Ping-Pong OUT Bad Reception USB – Bad Remote Wake-up Generation UART Interface – During Reception, Clearing REN may Generate Unexpected IT C51 Core – Power-down Exit Failure in X2 Mode Timer 0/1 – Unexpected Interrupt USB Interface – Data Corruption in Endpoint0 and FIFO Timer 2 – Baud Rate Generator – Long Start Time PLL Filter Values for USB Certification Powerdown Mode Generates a Reset Bad Suspend Resume Initialization Stretch MOVX Does Not Work Errata History USB Microcontrollers Lot Number Errata List AT89C5131A-L A04085, A04085B, A04086A, A04086C, A04086G, A04086J, A04271B, A04271C, A04271E, A04273, A04273B, A04273C, A04273D, A04273E, A04273L, A04273R 1, 2, 3, 4, 5, 6, 7, 8, 9,11, 12, 13, 14 Errata Sheet A03707 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14 A04271A, A04271M, A04591, A04592, A04593, A04760, A04761, A04759 and above 1, 2, 3, 4, 5, 6, 7, 8, 9,10,12,14 Errata Description 1. USB – Ping-Pong Databank 1 Re-transmission Failure When the host does not acknowledge an IN data packet from the databank 1 of a ping-pong endpoint, the endpoint retry-mechanism sends corrupted data. Then a normal USB traffic takes place. Workaround None. 2. USB - Ping-Pong OUT Bad Reception When the host sends a packet with a size lower than the size defined in the DPRAM endpoint (Ping-Pong Only), there is a risk of having a corrupted packet in the DPRAM with a wrong number of bytes reported. This problem occurs only in Ping-Pong mode if the 2 banks are full and bank 1 is cleared when the host is sending a packet at that time. If the packets are of the size of the DPRAM endpoint, there is no problem even in Ping-Pong mode. If the device application software is quick enough to read the received packets to avoid the case where the 2 banks are full, there is no problem even if the packet sizes are not of the same size of the DPRAM endpoint. Workaround None. 4380F–USB–03/08 3. USB - Bad Remote Wake-up Generation The remote wake-up generates an SE0 and J state (at the end of the Upstream Resume K) that are reserved by the Host. When a device is in suspend state and wants to notify an event to the host, it can send an upstream resume in order to wake up the host. The upstream resume consists of emitting a K state between 1 ms and 15 ms. At the end of this period, the device should leave the bus in idle state (J state) and wait for a SOF coming before 3ms. But at the end of the upstream resume, the USB controller drives a SEO (D+ and D- at 0 for 2 bit time) during 100ns before driving the J state. Workaround None. 4. UART Interface – During Reception, Clearing REN may Generate Unexpected IT During UART reception, if the REN bit is cleared between start bit detection and the end of reception, the UART will not discard the data (RI is set). Workaround Test REN bit at the beginning of interrupt routine just after CLR RI, and run the Interrupt routine code only if REN is set. 5. C51 Core – Power-down Exit Failure in X2 Mode If CPU is configured in X2 mode when exiting from power down, the first address fetched may be lost Workaround Two solutions are possible: a) Set CPU in X1 mode before entering in power-down mode and then restore CPU to X2 mode when the CPU is woken up. b) Add a NOP (0x00) opcode just after the instruction which activates the power down mode. As this NOP is randomly non executed, the behavior of the software is correct. Example: MOV PCON, #02H; Power down mode activation NOP ; This NOP is randomly not executed ............... ; Put here the first opcode to execute after exiting from power down mode 6. Timer 0/1 – Unexpected Interrupt If one of the timers 0 and 1 is in X1 mode while the other one is in X2 mode, an unexpected interrupt may randomly occur for one of the timers. Workaround Use the same mode X1 or X2 for both timers. This condition is met if PLL is used to clock the CPU. 7. USB Interface – Data Corruption in Endpoint0 and FIFO Data in Control Endpoint and FIFO may be corrupted if USB macro and CPU write in simultaneously. This condition occurs if the host cancels a control IN transaction with premature OUT and sends the following SETUP while the C51 is writing into the FIFO instead of the cancellation. Workaround: Use 32 bytes FIFO to avoid fragmented data transaction on Control Endpoint. 8. Timer 2 – Baud Rate Generator – Long Start Time When Timer 2 is used as a baud rate generator, TH2 is not loaded with RCAP2H at the beginning, then UART is not operational before 10,000 machine cycles. Workaround Add the initialization of TH2 and TL2 in the initialization of Timer 2. 2 AT89C5131A-L Errata 4380F–USB–03/08 AT89C5131A-L Errata 9. PLL Filter Values for USB Certification The current filter values recommended in the datasheet, R1/C1/C2= 100Ω/10nF/2.2nF, cannot pass USB certification, due to signal rate (11.95MHz) out of specification (11.97 MHz - 12.03MHz) . Workaround Apply new PLL filter values: R1/C1/C2= 560Ω/820pF/150pF. PLLF R1 C2 C1 VSS VSS 10. Powerdown Mode Generates a Reset A reset is generated when entering the Powerdown mode. Workaround None. 11. Wrong Latch of Hardware Conditions If the Reset input is controlled externally and is not synchronous with internal clock, the Hardware Conditions could be latched in the wrong status. These hardware conditions are used in the boot process and the device may not boot in the right target (Bootloader or Application) Workaround 1) The internal synchronous Reset provided by the POR/PFD feature guarantees a reliable Reset at power-up. 2) The internal Hardware Watchdog Reset can also be used without failure. 12. USB Interface – Bad Suspend Resume Initialization Sometimes and randomly when the USB device is plugged to the USB interface, it may not enumerate properly. It appears that the device remains in suspend state. Workaround After enabling the USB macro by means of bit USBE bit in USBCON, it is necessary to clear just after the bit WUPCPU in USBINT register 13. USB Interface – CPU Wake-up Interrupt Not Cleared The WUPCPU bit in USBINT register is set by the hardware when the USB macro exits from suspend mode. The firmware acknowledges this event by clearing the WUPCPU bit in the interrupt routine. This bit fails to be cleared by software, therefore the USB Wake-up interrupt is not acknowledged and always executed until next suspend state. Workaround Disable WakeUp interrupt after resume sequence. 14. Stretch MOVX Does Not Work When setting M0 bit in AUXR SFR (08Eh), the RD or WR pulse on a MOVX instruction on external memory is not 30 XTAL length but always standard 6 XTAL length. Thus slow external peripherals mapping in the XDATA space could not work properly. Workaround None. 3 4380F–USB–03/08 Headquarters International Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Atmel Asia Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong Tel: (852) 2721-9778 Fax: (852) 2722-1369 Atmel Europe Le Krebs 8, Rue Jean-Pierre Timbaud BP 309 78054 Saint-Quentin-enYvelines Cedex France Tel: (33) 1-30-60-70-00 Fax: (33) 1-30-60-71-11 Atmel Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan Tel: (81) 3-3523-3551 Fax: (81) 3-3523-7581 Technical Support Enter Product Line E-mail Sales Contact www.atmel.com/contacts Product Contact Web Site www.atmel.com Literature Requests www.atmel.com/literature Disclaimer: The information in this document is provided in connection with Atmel products. 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