8 PIN SOP DUAL CHANNEL HIGH SPEED 10MBit/s LOGIC GATE PHOTOCOUPLER EL063X series Schematic Features •Compliance Halogen Free . (Br <900 ppm ,Cl <900 ppm , Br+Cl < 1500 ppm) •High speed 10Mbit/s •10kV/µs min. common mode transient immunity (EL0631) • Guaranteed performance from -40 to 85 • Wide operating temperature range of -40°C to 100°C • Logic gate output • High isolation voltage between input and output (Viso=3750 V rms ) • Compliance with EU REACH • Pb free and RoHS compliant • UL and cUL approved(No. E214129) • VDE approved (No.40028116) • SEMKO approved • NEMKO approved • DEMKO approved • FIMKO approved ℃ Pin Configuration 1. Anode 2. Cathode 3. Cathode 4. Anode 5. Gnd 6. Vout 2 7. Vout 1 8. VCC Description The EL0630 and EL0631 are dual channel devices each consists of an infrared emitting diode optically coupled to a high speed integrated photo detector logic gate with a strobable output. The devices are packaged in an 8-pin small outline package which conforms to the standard SO8 footprint. Applications • Ground loop elimination • LSTTL to TTL, LSTTL or 5 volt CMOS • Line receiver, data transmission • Data multiplexing • Switching power supplies • Pulse transformer replacement • Computer peripheral interface 1 Truth Table (Positive Logic) Input H L Output L H Copyright © 2010, Everlight All Rights Reserved. Release Date : May 13, 2013. Issue No: DPC-0000175 Rev.4 www.everlight.com DATASHEET 8 PIN SOP DUAL CHANNEL HIGH SPEED 10MBit/s LOGIC GATE PHOTOCOUPLER EL063X series Absolute Maximum Ratings (Ta=25℃) Parameter Symbol Rating Unit DC/ Average Forward current IF 20 mA Reverse voltage VR 5 V Power dissipation PD 45 mW Power dissipation PC 60 mW Output current IO 50 mA Output voltage VO 7.0 V Supply voltage (max 1 minute) VCC 7.0 V PO 80 mW VISO 3750 V rms Operating temperature TOPR -40 ~ +100 °C Storage temperature TSTG -55 ~ +125 °C TSOL 260 °C Input Output Output Power Dissipation Isolation voltage *1 Soldering temperature *2 Notes: *1 AC for 1 minute, R.H.= 40 ~ 60% R.H. In this test, pins 1, 2, 3, 4 are shorted together, and pins 5, 6, 7, 8 are shorted together. *2 For 10 seconds 2 Copyright © 2010, Everlight All Rights Reserved. Release Date : May 13, 2013. Issue No:DPC-0000175 Rev.4 www.everlight.com DATASHEET 8 PIN SOP DUAL CHANNEL HIGH SPEED 10MBit/s LOGIC GATE PHOTOCOUPLER EL063X series Electrical Characteristics (Ta=-40 to 85°C unless specified otherwise) Input Symbol Min. Typ. Max. Unit Forward voltage VF - 1.4 1.8 V IF =10mA Reverse voltage VR 5.0 - - V IR =10µA ∆VF/∆TA - -1.8 - mV/°C IF =10mA CIN - 60 - pF Symbol Min Typ. Max. Unit Condition ICCH - 13 18 mA IF =0mA, VCC =5.5V ICCL - 15 21 mA IF =10mA, VCC =5.5V Parameter Temperature coefficient of forward voltage Input capacitance Condition VF =0, f=1MHz Output Parameter High level supply current Low level supply current Transfer Characteristics (Ta=-40 to 85°C unless specified otherwise) Parameter HIGH Level Output Current LOW Level Output Current Input Threshold Current 3 Symbol Min Typ. Max. Unit IOH - - 100 µA VOL - - 0.6 V IFT - - 5 mA Condition VCC=5.5V, VO =5.5V, IF =250µA, VCC =5.5V, IF =5mA, ICL =13mA VCC =5.5V, VO =0.6V, IOL =13mA Copyright © 2010, Everlight All Rights Reserved. Release Date : May 13, 2013. Issue No:DPC-0000175 Rev.4 www.everlight.com DATASHEET 8 PIN SOP DUAL CHANNEL HIGH SPEED 10MBit/s LOGIC GATE PHOTOCOUPLER EL063X series Switching Characteristics Parameter Propagation delay time to output High 4 level* (Fig.11) Propagation delay time to output Low 5 level* (Fig.11) Pulse width distortion 6 Output rise time* (Fig.11) 7 Output fall time* (Fig.11) Common Mode Transient Immunity at Logic 8 High* Common Mode Transient Immunity at Logic 9 Low* 4 (Ta=-40 to 85°C, VCC=5V, IF=7.5mA unless specified otherwise) Symbol Min Typ. Max. Unit Condition tPHL - - 100 ns CL =15pF, RL=350Ω, TA =25°C tPLH - - 100 ns CL =15pF, RL=350Ω, TA =25°C |tPHL – tPLH| - - 35 ns CL =15pF, RL =350Ω tr - 40 - ns CL =15pF, RL =350Ω tf - 10 - ns CL =15pF, RL =350Ω EL0630 5000 lCMHl EL0631 10000 EL0630 5000 lCMLl EL0631 10000 - - V/µs - - V/µs IF =0mA ,VOH(MIN) =2.0V, RL =350Ω, TA =25°C lVCMl =1KV(Fig.12 ) IF = 0mA ,VOH(MIN)=2.0V, RL=350Ω, TA=25°C lVCMl=1KV(Fig.12 ) IF =7.5mA,VOL(MAX) =0.8V, RL =350Ω, TA =25°C lVCMl =1KV(Fig.12 ) IF =7.5mA,VOL(MAX) =0.8V, RL =350Ω, TA =25°C lVCMl =1KV(Fig.12 ) Copyright © 2010, Everlight All Rights Reserved. Release Date : May 13, 2013. Issue No:DPC-0000175 Rev.4 www.everlight.com DATASHEET 8 PIN SOP DUAL CHANNEL HIGH SPEED 10MBit/s LOGIC GATE PHOTOCOUPLER EL063X series Typical Electro-Optical Characteristics Curves 5 Copyright © 2010, Everlight All Rights Reserved. Release Date : May 13, 2013. Issue No:DPC-0000175 Rev.4 www.everlight.com DATASHEET 8 PIN SOP DUAL CHANNEL HIGH SPEED 10MBit/s LOGIC GATE PHOTOCOUPLER EL063X series 6 Copyright © 2010, Everlight All Rights Reserved. Release Date : May 13, 2013. Issue No:DPC-0000175 Rev.4 www.everlight.com DATASHEET 8 PIN SOP DUAL CHANNEL HIGH SPEED 10MBit/s LOGIC GATE PHOTOCOUPLER EL063X series Fig. 11 Test circuit and waveforms for tPHL, tPLH, tr, and tf Fig. 12 Test circuit Common mode Transient Immunity Peak VCM 0V 5V Vo Switching Pos. (A), IF=0 CMH VO(Min) VO(Max) VCM Switching Pos. (B), IF=7.5mA CML 0.5V 7 Copyright © 2010, Everlight All Rights Reserved. Release Date : May 13, 2013. Issue No:DPC-0000175 Rev.4 www.everlight.com DATASHEET 8 PIN SOP DUAL CHANNEL HIGH SPEED 10MBit/s LOGIC GATE PHOTOCOUPLER EL063X series Notes *3 The VCC supply must be bypassed by a 0.1µF capacitor or larger. This can be either a ceramic or solid tantalum capacitor with good high frequency characteristic and should be connected as close as possible to the package VCC and GND pins *4. tPLH – Propagation delay is measured from the 3.75mA level on the HIGH to LOW transition of the input current pulse to the 1.5 V level on the LOW to HIGH transition of the output voltage pulse. *5. tPHL – Propagation delay is measured from the 3.75mA level on the LOW to HIGH transition of the input current pulse to the 1.5 V level on the HIGH to LOW transition of the output voltage pulse. *6. tr – Rise time is measured from the 90% to the 10% levels on the LOW to HIGH transition of the output pulse. *7. tf – Fall time is measured from the 10% to the 90% levels on the HIGH to LOW transition of the output pulse. *8 CMH – The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the HIGH state (i.e., VOUT > 2.0V). *9 CML – The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the LOW output state (i.e., VOUT < 0.8V). Order Information Part Number EL063X(Z)-V Note X = Part no. (X = 0 or 1) Z = Tape and reel option (TA, TB or none). V = VDE (optional) 8 Option None -V Standard Standard + VDE Description Packing quantity 100 units per tube 100 units per tube (TA) TA tape & reel option 2000 units per reel (TB) TB tape & reel option 2000 units per reel (TA)-V TA tape & reel option + VDE 2000 units per reel (TB)-V TB tape & reel option + VDE 2000 units per reel Copyright © 2010, Everlight All Rights Reserved. Release Date : May 13, 2013. Issue No:DPC-0000175 Rev.4 www.everlight.com DATASHEET 8 PIN SOP DUAL CHANNEL HIGH SPEED 10MBit/s LOGIC GATE PHOTOCOUPLER EL063X series Package Dimension (Dimensions in mm) Recommended pad layout for surface mount leadform 9 Copyright © 2010, Everlight All Rights Reserved. Release Date : May 13, 2013. Issue No:DPC-0000175 Rev.4 www.everlight.com DATASHEET 8 PIN SOP DUAL CHANNEL HIGH SPEED 10MBit/s LOGIC GATE PHOTOCOUPLER EL063X series Device Marking EL 0630 YWWV Notes 0630 Y WW V 10 denotes Device Number denotes 1 digit Year code denotes 2 digit Week code denotes VDE (optional) Copyright © 2010, Everlight All Rights Reserved. Release Date : May 13, 2013. Issue No:DPC-0000175 Rev.4 www.everlight.com DATASHEET 8 PIN SOP DUAL CHANNEL HIGH SPEED 10MBit/s LOGIC GATE PHOTOCOUPLER EL063X series Tape & Reel Packing Specifications Option TA Option TB Direction of feed from reel Direction of feed from reel Tape dimensions Dimension No. A0 A1 B0 D0 D1 E F Dimension(mm) 6.2±0.1 4.1±0.1 5.28±0.1 1.5±0.1 1.5±0.3 1.75±0.1 5.5±0.1 Dimension No. Po P1 P2 t W K0 K1 Dimension(mm) 4.0±0.1 8.0±0.1 2.0±0.1 0.4±0.1 3.7±0.1 0.3±0.1 11 12.0+0.3/ -0.1 Copyright © 2010, Everlight All Rights Reserved. Release Date : May 13, 2013. Issue No:DPC-0000175 Rev.4 www.everlight.com DATASHEET 8 PIN SOP DUAL CHANNEL HIGH SPEED 10MBit/s LOGIC GATE PHOTOCOUPLER EL063X series Precautions for Use 1. Soldering Condition 1.1 (A) Maximum Body Case Temperature Profile for evaluation of Reflow Profile Note: Reference: IPC/JEDEC J-STD-020D Preheat Temperature min (Tsmin) 150 °C Temperature max (Tsmax) 200°C Time (Tsmin to Tsmax) (ts) Average ramp-up rate (Tsmax to Tp) 60-120 seconds 3 °C/second max Other Liquidus Temperature (TL) 217 °C Time above Liquidus Temperature (t L) 60-100 sec Peak Temperature (TP) 260°C Time within 5 °C of Actual Peak Temperature: TP - 5°C 30 s Ramp- Down Rate from Peak Temperature 6°C /second max. Time 25°C to peak temperature Reflow times 8 minutes max. 3 times . 12 Copyright © 2010, Everlight All Rights Reserved. Release Date : May 13, 2013. Issue No:DPC-0000175 Rev.4 www.everlight.com DATASHEET 8 PIN SOP DUAL CHANNEL HIGH SPEED 10MBit/s LOGIC GATE PHOTOCOUPLER EL063X series DISCLAIMER 1. Above specification may be changed without notice. EVERLIGHT will reserve authority on material change for above specification. 2. When using this product, please observe the absolute maximum ratings and the instructions for using outlined in these specification sheets. EVERLIGHT assumes no responsibility for any damage resulting from use of the product which does not comply with the absolute maximum ratings and the instructions included in these specification sheets. 3. These specification sheets include materials protected under copyright of EVERLIGHT Corporation. Please don’t reproduce or cause anyone to reproduce them without EVERLIGHT’s consent. 13 Copyright © 2010, Everlight All Rights Reserved. Release Date : May 13, 2013. Issue No:DPC-0000175 Rev.4 www.everlight.com