w WM8804_6152_DS20_EV1_REV2 Evaluation Board Example Configurations INTRODUCTION The WM8804 is a high performance S/PDIF transceiver which offers a state-of-the-art jitter attenuating S/PDIF receiver design. The WM8804 customer evaluation board provides full functionality for the evaluation of the WM8804 device. The purpose of this document is to detail common configurations for evaluation board operation. Contained in this document are: • WM8804 internal signal path details. • Register settings for internal configuration of the WM8804 device. • Details on evaluation board setup and configuration. This document can be used as a base line for evaluation board configuration when beginning to use the WM8804 customer evaluation board. Please note that all register settings supplied in this document are suitable to setup the required path but may not be optimised for quiet power up or other considerations that will be necessary for any end application. Please consult the latest datasheet for information on such considerations. Software to configure the evaluation board can be downloaded from http://www.wolfsonmicro.com/support/drivers WOLFSON MICROELECTRONICS plc To receive regular email updates, sign up at http://www.wolfsonmicro.com/enews/ September 2007, Rev 2.2 Copyright ©2007 Wolfson Microelectronics plc WM8804_6152_DS20_EV1_REV2 Preliminary Customer Information TABLE OF CONTENTS INTRODUCTION ........................................................................................................................1 TABLE OF CONTENTS .............................................................................................................2 TERMINOLOGY .........................................................................................................................3 INPUTS AND OUTPUTS ............................................................................................................3 BOARD POWER SUPPLIES .....................................................................................................................3 S/PDIF INPUTS .........................................................................................................................................4 S/PDIF OUTPUT........................................................................................................................................4 WM8804 BASIC CONFIGURATION .........................................................................................................5 MCU CONTROL (VIA USB).......................................................................................................................5 LED INDICATORS .....................................................................................................................................6 EXAMPLE CONFIGURATIONS .................................................................................................7 HARDWARE MODE EXAMPLES..............................................................................................................7 S/PDIF RECEIVER RX0 TO AIF............................................................................................................7 S/PDIF RECEIVER RX0 TO S/PDIF TRANSMITTER ...........................................................................9 AIF TO S/PDIF TRANSMITTER ..........................................................................................................11 SOFTWARE MODE EXAMPLES ............................................................................................................13 S/PDIF RECEIVER RX0 TO AIF..........................................................................................................13 S/PDIF RECEIVER RX0 TO S/PDIF TRANSMITTER .........................................................................15 S/PDIF RECEIVER AUDIO DEMONSTRATION DAC ............................................................................17 APPLICATION SUPPORT........................................................................................................19 IMPORTANT NOTICE ..............................................................................................................20 ADDRESS:...............................................................................................................................................20 w Preliminary Customer Information September 2007, Rev 2.2 2 WM8804_6152_DS20_EV1_REV2 Preliminary Customer Information TERMINOLOGY AIF Audio Interface S/PDIF Sony/Philips Digital Interface Format USB Universal Serial Bus EVB Evaluation Board MCU Microprocessor Control Unit INPUTS AND OUTPUTS BOARD POWER SUPPLIES The WM8804 customer evaluation board can be powered using one of two sources: • External power supplies • Derived from the USB connection The evaluation board can be powered either from the 4mm power lead receptacles or from the USB host. Refer to Table 1 Power Supply Source Select. REF-DES J8 (PVDD_SEL) J9 (DVDD_SEL) J10 (DVDD_DAC_ SEL) J11 (+5V_SEL) LINK STATUS DESCRIPTION 1-2 2-3 PVDD Power Source Select PVDD 4mm power jack receptacle selected USB power source selected [default setting] 1-2 2-3 DVDD Power Source Select DVDD 4mm power jack receptacle selected USB power source selected [default setting] 1-2 2-3 S/PDIF Receiver DAC Power Source Select DVDD 4mm power jack receptacle selected USB power source selected [default setting] 1-2 2-3 +5V Power Source Select +5V 4mm power jack receptacle selected USB power source selected [default setting] Table 1 Power Supply Source Select Using appropriate power leads with 4mm connectors, supplies can be connected as described in Table 2 Power Supply Connections if the power supply is selected as the 4mm power jack receptacles. REF-DES SOCKET NAME SUPPLY J1 J2 J3 J4 J5 PVDD PGND DVDD DGND +5V +2.7V to +3.6V 0V +2.7V to +3.6V 0V +5V Table 2 Power Supply Connections Note: Refer to the datasheet for limitations on individual supply voltages. Important: Exceeding the recommended maximum voltage can damage EVB components. Under voltage may cause improper operation of some or all of the EVB components. w Preliminary Customer Information September 2007, Rev 2.2 3 WM8804_6152_DS20_EV1_REV2 Preliminary Customer Information S/PDIF INPUTS The WM8804 evaluation board supports both electrical and optical input of the S/PDIF stream. This signal may be input via a standard phono connector J7 or via the optical receivers U3. Refer to Table 3 S/PDIF Input Connections for details. REF-DES J29 LINK STATUS 1-2 2-3 DESCRIPTION S/PDIF Input Source Select Optical input selected Electrical input selected [default setting] Table 3 S/PDIF Input Connections S/PDIF OUTPUT The WM8804 S/PDIF output can be output from the WM8804 evaluation board via a standard phono connector (J21). Refer to table 4. REF-DES J21 SOCKET TYPE Phono Connector SIGNAL S/PDIF_OUT Table 4 S/PDIF Output connections The evaluation board is a also equipped with a Wolfson WM8726 received audio demonstration DAC. Refer to “S/PDIF Receiver Audio Demonstration DAC” section. w Preliminary Customer Information September 2007, Rev 2.2 4 WM8804_6152_DS20_EV1_REV2 Preliminary Customer Information WM8804 BASIC CONFIGURATION The following jumpers are provided to allow easy configuration of the WM8804 in both hardware and software mode. It is important that the jumpers are correctly configured for the desired WM8804 function. JUMPERS JUMPER STATUS DESCRIPTION Hardware Mode (selected by J15) J12 Software Mode (selected by J15) 1–2 2–3 Audio Interface Master/Slave Select Select master mode Select slave mode No function – remove link J13 1–2 2–3 Audio Interface Configuration 1 High Low Control Interface Mode Select Select 3-wire (SPI compatible) mode Select 2-wire (I2C compatible) mode J15 1–2 2–3 Hardware/Software Mode Select Software mode Hardware mode Hardware/Software Mode Select Software mode Hardware mode J16 1–2 2–3 Audio Interface Configuration 0 High Low No function – remove link 1–2 2–3 S/PDIF Transmitter Source Select Audio interface received data S/PDIF received data J17 2 Wire/I2C Mode Device Address 0x76 0x74 3 Wire/SPI Mode No function – remove link Table 5 Jumpers MCU CONTROL (VIA USB) The WM8804 evaluation board is equipped with a USB interface MCU which allows interconnection with a PC in conjunction with the WM8804-EV1S evaluation software. To enable software control via the USB MCU, the pins in header H2 must be interconnected as shown in Table 6 USB MCU Connections. The links must be removed as shown in hardware and 2-Wire/I2C mode. REF-DES LINK STATUS DESCRIPTION WM8004 to Control Interface MCU Connection 3-Wire/SPI Mode Connect WM8804 CSB to USB MCU 2-Wire/I2C Mode Do Not Fit Link Hardware Mode Do Not Fit Link 3–4 Connect WM8804 SCLK to USB MCU Connect WM8804 SCLK to USB MCU Do Not Fit Link 5–6 Connect WM8804 SDIN to USB MCU Connect WM8804 SDIN to USB MCU Do Not Fit Link 7–8 Connect WM8804 SDOUT to USB MCU Do Not Fit Link Do Not Fit Link 1–2 H2 Table 6 USB MCU Connections w Preliminary Customer Information September 2007, Rev 2.2 5 WM8804_6152_DS20_EV1_REV2 Preliminary Customer Information LED INDICATORS The WM8804 evaluation board has a number of LEDs. Their function is described in Table 7 LED Descriptions. LINK STATUS (IF APPLICABLE) LED HARDWARE MODE DESCRIPTION LED OFF LED ON SOFTWARE MODE DESCRIPTION (DEFAULT SETTINGS) LED OFF LED ON Not applicable LED1 USB firmware issue. USB firmware OK. USB firmware issue.. USB firmware OK. Not applicable LED2 USB power not present. USB interface power is OK. USB not present. USB interface power is OK. H4, 1 – 2 fitted (remove in s/w mode) LED3 S/PDIF Rx TRANS_ERR status. Indicates that the S/PDIF RX has not received a transmission error. S/PDIF Rx TRANS_ERR status. Indicates that the S/PDIF RX has received a transmission error. Not applicable – do not fit link. Not applicable– do not fit link. H4, 3 – 4 fitted LED4 No General Error occurred GEN_FLAG – indicates a general error has occurred (logical OR of TRANS_ERR, NON_AUDIO and UNLOCK) GPO0 – defaults to INT_N Indicates an interrupt has occurred due to change in S/PDIF Rx status GPO0 – defaults to INT_N Indicates no interrupt due to change in S/PDIF Rx status H4, 5 – 6 fitted (remove in 3-wire s/w mode) LED5 S/PDIF Rx UNLOCK status indicating that the S/PDIF RX has locked. S/PDIF Rx UNLOCK status. Indicates that the S/PDIF RX has lost lock. 2-wire mode GPO1 – defaults to S/PDIF Rx UNLOCK status indicating that the S/PDIF RX has locked. 3-wire mode NOT Available – remove link 2-wire mode GPO1 – defaults to S/PDIF Rx UNLOCK status. Indicates that the S/PDIF RX has lost lock. 3-wire mode NOT Available – remove link H4, 7 – 8 fitted (remove in 3-wire s/w mode) LED6 No S/PDIF Rx PCM_N or NON_AUDIO error. S/PDIF Rx NON_AUDIO status. Indicates that the S/PDIF RX has received a PCM_N or ANDIO_N status error 2-wire mode GPO2– defaults to S/PDIF Rx TRANS_ERR status. Indicates that the S/PDIF RX has not received a transmission error. 3-wire mode NOT Available – remove link 2-wire mode GPO2– defaults to S/PDIF Rx TRANS_ERR status. Indicates that the S/PDIF RX has received a transmission error. 3-wire mode NOT Available – remove link Table 7 LED Descriptions w Preliminary Customer Information September 2007, Rev 2.2 6 WM8804_6152_DS20_EV1_REV2 Preliminary Customer Information EXAMPLE CONFIGURATIONS The following example configurations are independent of whether power is applied to the board from external power supplies or from the USB interface. HARDWARE MODE EXAMPLES S/PDIF RECEIVER RX0 TO AIF The configuration is as follows:Data path = S/PDIF RX (electrical input) to AIF DOUT • Hardware master mode. • Powered from the USB interface. • AIF format = 24 bit I S • Figure 1 illustrates the data path. • Figure 2 illustrates the jumpers which must be made on the board. DVDD DGND PVDD PGND DIN BCLK LRCLK MCLK DOUT CSB / GPO1 SDOUT/GPO2 SDIN/HWMODE SCLK 2 RESETB GPO0 /SWIFMODE • Figure 1 RX0 Input Path to Audio Interface Block Diagram w Preliminary Customer Information September 2007, Rev 2.2 7 WM8804_6152_DS20_EV1_REV2 Preliminary Customer Information To configure this path, with an audio interface format of 24 bit I2S, the external jumpers should be set as shown in table 8. Do not fit H2 links. JUMPERS JUMPER STATUS DESCRIPTION J12 1–2 Audio Interface Master/Slave Select Select master mode J16 1–2 Audio Interface Configuration 0 High J13 2–3 Audio Interface Configuration 1 Low J15 2–3 Hardware/Software Mode Select Hardware mode J17 1–2 S/PDIF Transmitter Source Select Audio interface received data J29 1–2 S/PDIF Input 0 Source Select Electrical input selected Table 8 RX0 Input Path to Audio Interface Link Settings The jumpers, input signals and output signals are shown in Figure 2. The yellow jumpers are those that are required. The red jumpers are for power connections. Figure 2 RX0 Input Path to Audio Interface Evaluation Board Configuration Data is applied to the S/PDIF RX0 interface. The output data can be monitored at the AIF DOUT. MCLK is an output from AIF. w Preliminary Customer Information September 2007, Rev 2.2 8 WM8804_6152_DS20_EV1_REV2 Preliminary Customer Information S/PDIF RECEIVER RX0 TO S/PDIF TRANSMITTER The configuration is as follows:• Data path = S/PDIF RX0 (electrical input) to S/PDIF TX • Hardware slave mode. • Powered from the USB interface. • AIF format = 24 bit I S • Figure 3 illustrates the data path. • Figure 4 illustrates the jumpers which must be made on the board. 2 Figure 3 S/PDIF RX0 Input to S/PDIF TX0 Output Block Diagram w Preliminary Customer Information September 2007, Rev 2.2 9 WM8804_6152_DS20_EV1_REV2 Preliminary Customer Information To configure this path, with an audio interface format of 24 bit I2S, the external jumpers should be set as shown in table 9. Do not fit H2 links. JUMPERS JUMPER STATUS DESCRIPTION J12 2–3 Audio Interface Master/Slave Select Select slave mode J16 1–2 Audio Interface Configuration 0 High J13 2–3 Audio Interface Configuration 1 Low J15 2–3 Hardware/Software Mode Select Hardware mode J17 2–3 S/PDIF Transmitter Source Select S/PDIF received data J29 1–2 S/PDIF Input 0 Source Select Electrical input selected Table 9 S/PDIF RX0 Input Path to S/PDIF TX Link Settings The jumpers, input signals and output signals are shown in Figure 4. The yellow jumpers are those that are required. Figure 4 S/PDIF RX0 (optical) Input Path to S/PDIF TX Output Evaluation Board Configuration w Preliminary Customer Information September 2007, Rev 2.2 10 WM8804_6152_DS20_EV1_REV2 Preliminary Customer Information AIF TO S/PDIF TRANSMITTER The configuration is as follows:• Data path = AIF to S/PDIF TX • Hardware slave mode. • Powered from the USB interface. • AIF format = 16 bit RJ • Figure 5 illustrates the data path. • Figure 6 illustrates the jumpers which must be made on the board. Figure 5 Audio Interface to TX0 Block Diagram w Preliminary Customer Information September 2007, Rev 2.2 11 WM8804_6152_DS20_EV1_REV2 Preliminary Customer Information To configure this path, with an audio interface format of 16 bit RJ, the external jumpers should be set as shown in table 10. Do not fit H2 links. JUMPERS JUMPER STATUS DESCRIPTION J12 2–3 Audio Interface Master/Slave Select Select slave mode J16 1–2 Audio Interface Configuration 0 High J13 1–2 Audio Interface Configuration 1 High J15 2–3 Hardware/Software Mode Select Hardware mode J17 1–2 S/PDIF Transmitter Source Select Audio interface received data Table 10 AIF Input Path to S/PDIF TX Link Settings The jumpers, input signals and output signals are shown in Figure 6. The yellow jumpers are those that are required. USB power links selected USB input Select Slave Mode AIF_CONF[1] AIF_CONF[0] SPDIFTx source = AIF MCLK Select Data out (Master mode LRCLK and BCLK inputs) LRCLK BCLK DIN (AIF Tx) S/PDIF Tx Digital output Figure 6 AIF Input Path to S/PDIF TX Output Evaluation Board Configuration w Preliminary Customer Information September 2007, Rev 2.2 12 WM8804_6152_DS20_EV1_REV2 Preliminary Customer Information SOFTWARE MODE EXAMPLES S/PDIF RECEIVER RX0 TO AIF The configuration is as follows:• Data path = S/PDIF RX0 (electrical input) to AIF DOUT • Software slave mode. 3-wire control interface • Powered from the USB interface. • AIF format = 24 bit I S • Figure 7 illustrates the data path. • Figure 8 illustrates the jumpers which must be made on the board. 2 Figure 7 S/PDIF Rx0 to Audio Interface Block Diagram To configure this path, with an audio interface format of 24 bit I2S, the external jumpers should be set as shown in table 11 and the registers programmed as in table 12 JUMPERS JUMPER STATUS J13 DESCRIPTION 1–2 Control Interface Mode Select Select 3-wire (SPI compatible) mode 1–2 Hardware/Software Mode Select Software mode J15 Table 11 Jumper Settings for S/PDIF Rx1 to Audio Interface w Preliminary Customer Information September 2007, Rev 2.2 13 WM8804_6152_DS20_EV1_REV2 Preliminary Customer Information REGISTER SETTING 0x00 0x00 Reset device COMMENT 0x1E 0x04 Disable the S/PDIF Tx interface 0x1B 0x0A AIF Tx = 24 bit, I S 0x1C 0x4A Master mode, AIF Rx = 24 bit, I S 2 2 Table 12 Register Settings for S/PDIF Rx0 to Audio Interface The jumpers, input signals and output signals are shown in Figure 8. The yellow jumpers are those that are required. USB power links selected USB input Select electrical input H2 populated for 3-wire s/ware control 3-wire mode S/PDIF Rx Digital input. (Electrical connection) software control MCLK LRCLK BCLK DOUT (AIF Rx) S/PDIF Tx Digital output Figure 8 RX0 Input Path to Audio Interface 3-wire Software Control Evaluation Board Configuration w Preliminary Customer Information September 2007, Rev 2.2 14 WM8804_6152_DS20_EV1_REV2 Preliminary Customer Information S/PDIF RECEIVER RX0 TO S/PDIF TRANSMITTER The configuration is as follows:• Data path = S/PDIF RX0 (optical input) CMOS compatible to S/PDIF TX0 • Software master mode. 2-wire control interface. Address=0x76. • Powered from external power supplies. • AIF format = 24 bit I S • Figure 9 illustrates the data path. • Figure 10 illustrates the jumpers which must be made on the board. 2 Figure 9 RX0 to TX0 Block Diagram To configure this path, with an audio interface format of 24 bit I2S, the external jumpers should be set as shown in table 13 and the registers programmed as in table 14 JUMPERS JUMPER STATUS DESCRIPTION J13 2–3 Control Interface Mode Select Select 2-wire (I2C compatible) mode J15 1–2 Hardware/Software Mode Select Software mode J17 1–2 2 Wire/I2C Mode Device Address 0x76 J29 2–3 S/PDIF Input select Optical Input Table 13 Jumper Settings for S/PDIF Rx4 to S/PDIF Tx w Preliminary Customer Information September 2007, Rev 2.2 15 WM8804_6152_DS20_EV1_REV2 Preliminary Customer Information REGISTER SETTING 0x00 0x00 Reset device COMMENT 0x1E 0x10 Disable the AIF 0x09 0x00 Select the S/PDIF CMOS compatible input mode 0x15 0x31 S/PDIF Tx source= S/PDIF Rx 0x1B 0x0A AIF Tx = 24 bit, I S 0x1C 0x4A Master mode, AIF Rx = 24 bit, I S 2 2 Table 14 Register Settings for S/PDIF RX0 to S/PDIF TX0 The jumpers, input signals and output signals are shown in Figure 10. The yellow jumpers are those that are required. +3.3V 0V +3.3V 0V +5V USB input External power links selected H2 populated for s/ware control. Remove link1-2 for 2-wire control 2-wire mode software control S/PDIF Rx Digital input. (optical connection) 2-wire Device Address = 0x76 MCLK LRCLK BCLK DOUT (AIF Rx) S/PDIF Tx Digital output Figure 10 S/PDIF RX0 Optical Input S/PDIF TX0 Evaluation Board Configuration w Preliminary Customer Information September 2007, Rev 2.2 16 WM8804_6152_DS20_EV1_REV2 Preliminary Customer Information S/PDIF RECEIVER AUDIO DEMONSTRATION DAC The following configuration illustrates the S/PDIF Rx to analogue output via the WM8726 demonstration DAC. This can be used to view an analog representation of the digital data received on the selected S/PDIF Rx interface. Note that the AIF should not be connected to any other test equipment if using this output. This example also illustrates the connections needed when using an external power source instead of powering the board from the USB interface. The configuration is as follows:• Data path = S/PDIF Rx0 (optical input) to AIF • Software Mater mode. 2-wire control interface. Address=0x74. • Powered from external power supplies. • AIF format = 24 bit I S • Figure 11 illustrates the jumpers which must be made on the board. The jumpers needed for external power supply are detailed in Table 1 2 JUMPERS JUMPER STATUS DESCRIPTION J13 2–3 Control Interface Mode Select Select 2-wire (I2C compatible) mode J15 1–2 Hardware/Software Mode Select Software mode J17 2–3 2 Wire/I2C Mode Device Address =0x74 J29 2–3 S/PDIF Input Select Optical Input Table 15 Jumper Settings for S/PDIF Rx0 to Audio Interface REGISTER SETTING COMMENT 0x00 0x00 Reset device 0x1E 0x04 Disable the S/PDIF Tx interface 0x09 0x01 Select the comparator input mode for Rx0 0x1B 0x0A AIF Tx = 24 bit, I S 0x1C 0x4A Master mode, AIF Rx = 24 bit, I S 2 2 Table 16 Register Settings for S/PDIF Rx0 (optical input) to Audio Interface w Preliminary Customer Information September 2007, Rev 2.2 17 WM8804_6152_DS20_EV1_REV2 Preliminary Customer Information +3.3V 0V +3.3V 0V USB input (control only) +5V External power links selected H2 populated for s/ware control. Remove link1-2 for 2-wire control 2-wire mode software control S/PDIF Rx Digital input. (optical connection) 2-wire Device Address = 0x74 H6 links needed for DAC DAC outputs Figure 11 DAC Evaluation Board Configuration w Preliminary Customer Information September 2007, Rev 2.2 18 WM8804_6152_DS20_EV1_REV2 Preliminary Customer Information APPLICATION SUPPORT If you require more information or require technical support, please contact the Wolfson Microelectronics Applications group through the following channels: Email: Telephone Apps: Fax: Mail: [email protected] +44 (0) 131 272 7070 +44 (0) 131 272 7001 Applications Engineering at the address on the last page or contact your local Wolfson representative. Additional information may be made available on our web site at: http://www.wolfsonmicro.com w Preliminary Customer Information September 2007, Rev 2.2 19 WM8804_6152_DS20_EV1_REV2 Preliminary Customer Information IMPORTANT NOTICE Wolfson Microelectronics plc (“Wolfson”) products and services are sold subject to Wolfson’s terms and conditions of sale, delivery and payment supplied at the time of order acknowledgement. Wolfson warrants performance of its products to the specifications in effect at the date of shipment. Wolfson reserves the right to make changes to its products and specifications or to discontinue any product or service without notice. Customers should therefore obtain the latest version of relevant information from Wolfson to verify that the information is current. Testing and other quality control techniques are utilised to the extent Wolfson deems necessary to support its warranty. Specific testing of all parameters of each device is not necessarily performed unless required by law or regulation. In order to minimise risks associated with customer applications, the customer must use adequate design and operating safeguards to minimise inherent or procedural hazards. Wolfson is not liable for applications assistance or customer product design. The customer is solely responsible for its selection and use of Wolfson products. Wolfson is not liable for such selection or use nor for use of any circuitry other than circuitry entirely embodied in a Wolfson product. Wolfson’s products are not intended for use in life support systems, appliances, nuclear systems or systems where malfunction can reasonably be expected to result in personal injury, death or severe property or environmental damage. Any use of products by the customer for such purposes is at the customer’s own risk. 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Any representations made, warranties given, and/or liabilities accepted by any person which differ from those contained in this datasheet or in Wolfson’s standard terms and conditions of sale, delivery and payment are made, given and/or accepted at that person’s own risk. Wolfson is not liable for any such representations, warranties or liabilities or for any reliance placed thereon by any person. ADDRESS: Wolfson Microelectronics plc Westfield House 26 Westfield Road Edinburgh EH11 2QB United Kingdom Tel :: +44 (0)131 272 7000 Fax :: +44 (0)131 272 7001 Email :: [email protected] w Preliminary Customer Information September 2007, Rev 2.2 20