Freescale Semiconductor Technical Data Document Number: MC34845 Rev. 8.0, 5/2015 Low Cost Six Channel LED Backlight Driver with Integrated Power Supply The 34845 series represents high efficiency LED drivers for use in backlighting LCD displays from 10” to 17”. Operating from supplies of 5.0 V to 21 V, the 34845 series is capable of driving up to 16 LEDs in series in six separate strings. The LED current tolerance in the six strings is within ±2% maximum and is set using a resistor to GND. PWM dimming is performed by applying a PWM input signal to the PWM pin which modulates the LED channels directly. An Enable Pin (EN) provides for low power standby. Alternatively, a single wire scheme selects power down when PWM is connected to the Wake pin and held low. The integrated boost converter uses dynamic headroom control to automatically set the output voltage. There are three device versions for boost frequency; 34845C is 600 kHz, and the 34845D is 300 kHz. External compensation allows the use of different inductor/ capacitor combinations. The 34845 includes fault protection modes for LED short and open, overtemperature, overcurrent and overvoltage errors. It features an internally fixed OVP value of 60 V (typical) which protects the device in the event of a failure in the externally programmed OVP. The OVP level can be set by using an external resistor divider. This device is powered using SMARTMOS technology. 34845 LED DRIVER 98ASA00602D 24-PIN QFN-EP Applications • PC notebooks • Netbooks • GPS screens • Portable DVD players • Picture frames • Smaller screen televisions • Industrial/instrumentation displays • Health care device displays Features • Input voltage of 5.0 V to 21 V • Boost output voltage up to 60 V • 2.0 A integrated boost FET • Fixed boost frequency - 300 kHz or 600 kHz • OTP, OCP, UVLO fault detection • LED short/open protection • Programmable LED current between 3.0 mA and 30 mA 34845 12V VIN VDC1 SWA SWB VDC2 VOUT PGNDB COMP PGNDA OVP EN CONTROL UNIT 5V ~ FAIL PWM CH1 CH2 CH3 CH4 CH5 CH6 WAKE ISET GND EP GND Figure 1. 34845 Simplified Application Diagram © Freescale Semiconductor, Inc., 2011 - 2015. All rights reserved. ~ ~ ~ ~ ~ 1 Orderable Parts Table 1. Device Variations Part Number (1) MC34845CEP MC34845DEP Temperature (TA) -40 to 85 °C Package 24 QFN-EP Boost Switch Current Limit IBOOST_LIMIT (A) Switching Frequency fS (kHz) Min Typ Max Min Typ Max 1.9 2.1 2.3 540 600 660 2.1 2.35 2.6 270 300 330 Slope Compensation VSLOPE (V/s) Min - Typ 0.52 0.22 Max - Notes 1. To order parts in Tape and Reel, add the R2 suffix to the part number. 34845 2 Analog Integrated Circuit Device Data Freescale Semiconductor 2 Internal Block Diagram SWA VIN VDC1 VDC2 SWB LDO PGNDB COMP BOOST CONTROLLER PGNDA VOUT EN WAKE LOGIC V SENSE LOW POWER MODE FAIL CH1 CH2 PWM ISET BANDGAP CIRCUIT 6 CHANNEL CURRENT MIRROR CH3 CH4 CH5 CH6 GND Figure 2. 34845 Simplified Internal Block Diagram 34845 Analog Integrated Circuit Device Data Freescale Semiconductor 3 3 Pin Connections OVP GND VDC1 GND TRANSPARENT TOP VIEW VDC2 Pinout Diagram VOUT 3.1 24 23 22 21 20 19 VIN 1 18 WAKE PGNDB 2 17 COMP SWB 3 16 PWM EP GND EN 6 13 GND 7 8 9 10 11 12 CH6 14 FAIL CH5 5 CH4 PGNDA CH3 15 ISET CH2 4 CH1 SWA Figure 3. 34845 Pin Connections 3.2 Pin Definitions Table 2. 34845 Pin Definitions Pin Number Pin Name Definition 1 VIN Main voltage supply Input. IC Power input supply voltage, is used internally to produce internal voltage regulation for logic functioning, and also as an input voltage for the boost regulator. 2 PGNDB 3 SWB Boost switch node connection B. Switching node of boost converter. 4 SWA Boost switch node connection A. Switching node of boost converter. 5 PGNDA 6 EN 7 - 12 CH1 - CH6 13, 19, 21 GND Ground Reference for all internal circuits other than the Boost FET. The Exposed Pad (EP) should be used for thermal heat dissipation. 14 FAIL Fault detected pin (open drain): • No Failure = Low-impedance pull-down • Failure = High-impedance When a fault situation is detected, this pin goes into high-impedance. 15 ISET LED current setting. The maximum current is set using a resistor from this pin to GND. 16 PWM External PWM control signal. 17 COMP Boost compensation component connection. This passive pin is used to compensate the boost converter. Add a capacitor and a resistor in series to GND to stabilize the system as well as a shunt capacitor. 18 WAKE Low power consumption mode for single wire control. This is achieved by connecting the WAKE and PWM pins together and grounding the ENABLE (EN) pin. 20 VDC1 2.5 V internal voltage decoupling. This pin is for internal use only, and not to be used for other purposes. A capacitor of 2.2 F should be connected between this pin and ground. 22 OVP External boost overvoltage setting. Requires a resistor divider from VOUT to GND. If no external OVP setting is desired, this pin should be grounded. Power ground. This is the ground pin for the internal Boost FET. Power ground. This is the ground pin for the internal Boost FET. Enable pin (active high, internal pull-down). LED string connections 1 to 6. LED current drivers. Each line has the capability of driving up to 30 mA. 34845 4 Analog Integrated Circuit Device Data Freescale Semiconductor Table 2. 34845 Pin Definitions (continued) Pin Number Pin Name Definition 23 VDC2 6.0 V internal voltage decoupling. This pin is for internal use only, and not to be used for other purposes. A capacitor of 2.2 F should be connected between this pin and ground. 24 VOUT Boost voltage output feedback. EP EP Ground and thermal enhancement pad 34845 Analog Integrated Circuit Device Data Freescale Semiconductor 5 4 Electrical Characteristics 4.1 Absolute Maximum Ratings Table 3. Absolute Maximum Ratings All voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or permanent damage to the device. Symbol Ratings Value Unit Notes ELECTRICAL RATINGS VMAX ILED_MAX VESD Maximum Pin Voltages • SWA, SWB, VOUT • CH1, CH2, CH3, CH4, CH5, CH6 (Off state) • CH1, CH2, CH3, CH4, CH5, CH6 (On state) • FAIL • OVP • COMP, ISET • PWM, WAKE • EN, VIN Maximum LED Current per Channel ESD Voltage Human Body Model (HBM) Machine Model (MM) -0.3 to 65 -0.3 to 45 -0.3 to 20 -0.3 to 7.0 -0.3 to 7.75 -0.3 to 2.7 -0.3 to 5.5 -0.3 to 24 V 33 mA 2000 200 V -40 to 85 °C (2) THERMAL RATINGS TA Operating Ambient Temperature Range TJ Maximum Junction Temperature TS Storage Temperature Range TPPRT Peak Package Reflow Temperature During Reflow 150 °C -40 to 150 °C Note 4 °C (3), (4) TJA Thermal Resistance Junction to Ambient 36 °C/W (5) TJC Thermal Resistance Junction to Case 3.1 °C/W (6) 3.4 1.8 W (5) PD Power Dissipation • TA = 25 °C • TA = 85 °C Notes 2. ESD testing is performed in accordance with the Human Body Model (HBM) (AEC-Q100-2) (CZAP = 100 pF, RZAP = 1500 ), and the Machine Model (MM) (CZAP = 200 pF, RZAP = 0 3. 4. 5. 6. Pin soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may cause malfunction or permanent damage to the device. Freescale’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow Temperature and Moisture Sensitivity Levels (MSL), Go to www.freescale.com, search by part number [e.g. remove prefixes/suffixes and enter the core ID to view all orderable parts. (i.e. MC33xxxD enter 33xxx), and review parametrics. Per JEDEC51-8 Standard for Multilayer PCB. Theoretical thermal resistance is from the die junction to the exposed pad. 34845 6 Analog Integrated Circuit Device Data Freescale Semiconductor 4.2 Static and Dynamic Electrical Characteristics Table 4. Static and Dynamic Electrical Characteristics Characteristics noted under conditions VIN = 12 V, VOUT = 35 V, ILED = 30 mA, fS = 600 kHz, fPWM = 600 Hz - 40 C TA 85 C, unless otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25 °C under nominal conditions, unless otherwise noted. Symbol Characteristic Min Typ Max Unit 5.0 10 21 V Supply Current when in Shutdown Mode • EN = Low, PWM = Low - 2.0 10 A Supply Current when Operational Mode • Boost = Pulse Skipping, Channels = 1% of Duty Cycle EN = High, PWM = Low - 5.0 6.5 mA 4.0 - 4.4 V - 0.25 - V Notes SUPPLY VIN ISHUTDOWN IOPERATIONAL UVLO UVLOHYST Supply Voltage Undervoltage Lockout • VIN Rising Undervoltage Hysteresis • VIN Falling VDC1 VDC1 Voltage • CVDC1 = 2.2 F 2.4 2.5 2.6 V (7) VDC2 VDC2 Voltage (VIN between 7.0 V and 21 V) • CVD2C = 2.2 F 5.7 6.0 6.3 V (7) Output Voltage Range • VIN = 5.0 V • VIN = 21 V 8.0 24 - 43 60 V IBOOST_LIMIT Boost Switch Current Limit • 34845C • 34845D 1.9 2.1 2.1 2.35 2.3 2.6 A tBOOST_TIME Boost Switch Current Limit Timeout - 10 - ms RDSON of Internal FET • IDRAIN= 1.0 A - 300 520 mW IBOOST_LEAK Boost Switch Off State Leakage Current • VSWA,SWB = 60 V - - 1.0 mA VOUTLEAK Feedback pin Off State Leakage Current • VOUT = 60 V - - 500 mA EFFBOOST Peak Boost Efficiency • VOUT = 33 V, RL = 330 - 90 - % Line Regulation • VIN = 7.0 V to 21 V, ICH = 30 mA -0.2 - 0.2 %/V Load Regulation • VLED = 24 V to 40 V (all Channels), ICH = 30 mA -0.2 - 0.2 %/V BOOST VOUT1 VOUT2 RDS(on) ILED/VIN ILED/VLED DMIN Minimum Duty Cycle - 10 15 % DMAX Maximum Duty Cycle 88 90 - % OVP Internally Fixed Value • (no external voltage resistor divider) 56 60 64 V VOVP_INT (8) (9) Notes 7. This output is for internal use only and not to be used for other purposes. 8. Minimum and maximum output voltages are dependent on Min/Max duty cycle condition. 9. Boost efficiency test is performed under the following conditions: fSW = 600 kHz, VIN = 12 V, VOUT = 33 V and RL = 330 . The following external components are used: L = 10 H, DCR = 0.1 , COUT = 3x1 F (ceramic), Schottky diode VF = 0.35 V. 34845 Analog Integrated Circuit Device Data Freescale Semiconductor 7 Table 4. Static and Dynamic Electrical Characteristics (continued) Characteristics noted under conditions VIN = 12 V, VOUT = 35 V, ILED = 30 mA, fS = 600 kHz, fPWM = 600 Hz - 40 C TA 85 C, unless otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25 °C under nominal conditions, unless otherwise noted. Symbol Characteristic Min Typ Max Unit Notes V (10) BOOST (CONTINUED) VOVP_EXT OVP Programming Range • (set through an external resistor divider) 15 - 60 VREF_OVP OVP Reference Voltage 6.3 6.9 7.5 V ISINK_OVP OVP Sink Current - 0.2 - A 540 270 600 300 660 330 kHz 3.0 - ms fS Switching Frequency • 34845C • 34845D tSS Soft Start Time (fs = 600 kHz, 100% PWM duty) - Soft Start VOUT Overshoot (fs = 600 kHz, 100% PWM duty) - - OVP V BOOST_tR SS_VOUT Boost Switch Rise Time - 8.0 - ns BOOST_tF Boost Switch Fall Time - 6.0 - ns Current sense Amplifier Gain - 9.0 - GM OTA Transconductance - 200 - S ISS Transconductance Sink and Source Current Capability - 100 - A Slope Compensation • 34845C • 34845D - 0.52 0.22 - V/s 2.88 29.4 3.0 30 3.12 30.6 mA ACSA VSLOPE LED DRIVER ILED LED Driver Sink Current • RISET = 51 k 0.1%, PWM = 3.3 V • RISET = 5.1 k 0.1%, PWM = 3.3 V VISET ISET Pin Voltage • RISET = 5.1 k 0.1% 2.011 2.043 2.074 V VMIN Regulated Minimum Voltage Across LED Drivers • Pulse Width > 400 ns 0.675 0.75 0.825 V -2.0 -4.0 - 2.0 4.0 % Off State leakage Current, All Channels • VCH = 45 V - - 1.0 A ITOLERANCE ICH_LEAK LED Current Channel to Channel Tolerance • 10 mA ILED 30 mA • 3.0 mA ILED < 10 mA tR/tF LED Channels Rise and Fall Time - 50 75 ns OFDV LED Open Protection, Channel Disabled if VCH OFDV - - 0.55 V SFDV LED Short Protection Voltage, Channel Disabled if VCH SFDV (channel on time 10s) 6.5 7.0 7.5 V Off State Leakage Current • VFAIL = 5.5 V - - 5.0 A On State Voltage Drop • ISINK = 4.0 mA - - 0.4 V 150 - 165 25 - °C FAIL PIN IFAIL_LEAK VOL OVERTEMPERATURE SHUTDOWN OTTSHUTDOWN Over-temperature Threshold (shutdown mode) • Rising • Hysteresis Notes 10. The OVP level must be set 5.0 V above the worst-case LED string voltage. 34845 8 Analog Integrated Circuit Device Data Freescale Semiconductor Table 4. Static and Dynamic Electrical Characteristics (continued) Characteristics noted under conditions VIN = 12 V, VOUT = 35 V, ILED = 30 mA, fS = 600 kHz, fPWM = 600 Hz - 40 C TA 85 C, unless otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25 °C under nominal conditions, unless otherwise noted. Symbol Characteristic Min Typ Max Unit • PWM = 3.3 V, fPWM = 600 Hz 100% duty 9.9 49.5 - 10 50 100 10.1 50.5 - Input Minimum Pulse PWM Pin (VPWM = 3.3 V) • Start-up (Wake mode) • Operational (Wake mode) • Start-up (Enable mode) • operational (Enable mode) 1.6 0.4 - 0.2 0.2 - Input Frequency Range for PWM Pin DC - 100 kHz Shutdown Mode Timeout 27 30 33 ms Notes PWM INPUT PWMCONTROL tPWM_IN fPWM PWM Dimming Mode LED Current Control • PWM = 3.3 V, fPWM = 600 Hz 10% duty; • PWM = 3.3 V, fPWM = 600 Hz 50% duty % s WAKE tSHUTDOWN LOGIC INPUTS (PWM) VILL Input Low Voltage -0.3 - 0.5 V VIHL Input High Voltage 1.5 - 5.5 V ISINK Input Current -1.0 - 1.0 A V LOGIC INPUTS (EN) VILL Input Low Voltage -0.3 - 0.5 VIHL Input High Voltage 2.1 - 21 V ISINK Input Current (VEN = 12 V) - 6.0 10 A V LOGIC INPUTS (WAKE) VILL Input Low Voltage -0.3 - 0.5 VIHL Input High Voltage 2.1 - 5.5 V ISINK Input Current -1.0 - 1.0 A 34845 Analog Integrated Circuit Device Data Freescale Semiconductor 9 5 5.1 Functional Description Introduction LED backlighting has been popular for use in small LCD displays for many years. This technology is now rapidly replacing the incumbent Cold Cathode Fluorescent Lamp (CCFL) in mid-size displays such as those used use in notebooks, monitors, and industrial/ consumer displays. LEDs offer a number of advantages compared to the CCFL, including lower power, thinner, longer lifetime, low voltage drive, accurate wide-range dimming control, and advanced architectures for improved image quality. LEDs are also void of hazardous materials such as mercury which is used in CCFL. LED backlights use different architecture depending on the size of the display and features required. For displays in the 10” to 17” + range such as those used in notebooks, edge-lit backlights offer very thin designs down to 2.0 mm or less. The efficiency of the LED backlight also extends battery life in portable equipment compared to CCFL. In large size panels, direct backlights support advanced architectures such as local dimming, in which power consumption and contrast ratio are drastically improved. Edge lighting can also be used in large displays when low cost is the driving factor. The 34845 targets mid size panel applications in the 10” to 17” + range with edge-lit backlights. The device supports LED currents up to 30 mA and supports up to six strings of LEDs. This enables backlights up to 10 W to be driven from a single device. The device includes a boost converter to deliver the required LED voltage from either a two or three cell Li-ion battery, or a direct 12 V input supply. The current drivers match the current between devices to provide superior uniformity across the display. The 34845 provides for a wide range of PWM dimming from a direct PWM control input. 5.2 Functional Device Operation 5.2.1 Power Supply The 34845 supports 5.0 V to 21 V at the VIN input pin. Two internal regulators generate internal rails for internal operation. Both rails are de-coupled using capacitors on the VDC1 and VDC2 pins. The VIN, VDC1, and VDC2 supplies each have their own UVLO mechanisms. When any voltage is below the UVLO threshold, the device stops operating. All UVLO comparators have hysteresis to ensure constant on/off cycling does not occur. The power up sequence for applying VIN respect to the ENABLE and PWM signals is important since the 34845 device behaves differently depending on how the sequence of these signals is applied. For the case where VIN is applied before the ENABLE and PWM signals, the device has no limitation in terms of how fast the VIN ramp should be. However for the case where the PWM and ENABLE signals are applied before VIN, the ramp up time of VIN between 0 V and 5.0 V should be no longer than 2.0 ms. Figure 4 and Figure 5 illustrate the two different power up conditions. VIN EN PWM Boost Soft Star t VOUT Figure 4. Power up sequence case 1, VIN applied before the ENABLE and PWM signals. No limitation for VIN ramp up time. 34845 10 Analog Integrated Circuit Device Data Freescale Semiconductor EN PWM VIN 5V 2 ms Boost Soft Start VOUT UVLO Rising VIN ramp Figure 5. Power up sequence case 2, VIN applied after the ENABLE and PWM signals. VIN ramp up time between 0 V and 5.0 V should be not higher than 2.0 ms 5.2.2 Boost Converter The boost converter uses a Dynamic Headroom Control (DHC) loop to automatically set the output voltage needed to drive the LED strings. The DHC is designed to operate under specific pulse width conditions in the LED drivers. It operates for pulse widths higher than 400 ns. If the pulse widths are shorter than specified, the DHC circuit does not operate and the voltage across the LED drivers increase to a value given by the OVP, minus the total LED voltage in the LED string. It is therefore imperative to select the proper OVP level to avoid exceeding the max off state voltage of the LED drivers (45 V). The boost operates in current mode and is compensated externally through a type 2 network on the COMP pin. A modification of the compensation network is suggested to minimize the amplitude of the ripple at VOUT. The details of the suggested compensation network are shown in Figure 10 and Figure 11. An integrated 2.0 A minimum FET supplies the required output current. An overcurrent protection circuit limits the output current cycleby-cycle to IOCP. If the condition exists longer than 10 ms, then the device shuts down. The frequency of the boost converter is internally set to 300 kHz or 600 kHz, depending on the device’s version. The boost also includes a soft start circuit. Each time the IC comes out of shutdown mode, the soft start period lasts for tSS. Overvoltage protection is also included. The device has an internally fixed OVP value of 60 V (typical) which serves as a secondary fault protection mechanism, in the event the externally programmed OVP fails (i.e. resistor divider opens up). While the internal 60 V OVP detector can be used exclusively without the external OVP network, this is only recommended for applications where the LED string voltage approaches 55 V or more. The OVP level can be set by using an external resistor divider connected between the output voltage and ground with its output connected to the OVP pin. The OVP can be set up to 60 V by varying the resistor divider to match the OVP internal reference of 6.9 V (typical). 5.2.3 LED Driver The six channel LED driver provides current matching for six LED strings to within 2% maximum. The current in the strings is set using a resistor tied to GND from the ISET pin. The LED current level is given by the equation: RSET = 153/ ILED. The accuracy of the RSET resistor should be 0.1% for best performance. 5.2.4 LED Error Detect If an LED is open, the output voltage ramps to the OVP level. If there is still no current in the LED string, the LED channel is turned off and the output voltage ramps back down to normal operating level. If LEDs are shorted and the voltage in any of the channels is greater than the SFDV threshold (7.0 V typical), then the device turns off this channel. However if the on-time of the channels is less than 10 s, the SFDV circuit does not disable any of the channels, regardless of the voltage across them. All the LED errors can be cleared by recycling the EN pin or applying a complete power-on-reset (POR). 34845 Analog Integrated Circuit Device Data Freescale Semiconductor 11 5.2.5 WAKE Operation The WAKE pin provides the means to set the device for low power consumption (shutdown mode) without the need of an extra logic signal for enable. This is achieved by connecting the WAKE and PWM pins together, and tying the EN pin to ground. In this configuration, the PWM signal is used to control the LED channels, while allowing low power consumption by setting the device into its shutdown mode every time the PWM signal is kept low for longer time than the WAKE time out of 27 ms. 5.2.6 Overtemperature Shutdown and Temperature Control Circuits The 34845 includes over-temperature protection. If the internal temperature exceeds the over-temp threshold OTTSHUTDOWN, then the device shuts down all functions. Once the temperature falls below the low level threshold, the device is re-enabled. 5.2.7 FAIL Pin The FAIL pin is at its low-impedance state when no error is detected. However, if an error such as an LED channel open or boost overcurrent is detected, the FAIL pin goes into high-impedance. Once a failure is detected, the FAIL pin can be cleared by recycling the EN pin or applying a complete power-on-reset (POR). If the detected failure is an Over-current time-out, the EN pin or a POR must be cycled/executed to restart the part. 5.3 Typical Performance Curves 100.0 90.0 80.0 Efficiency (%) 70.0 60.0 Vin=9V Fs = 600kHz L=10uH, 68mOhm (IHLP2525CZER100M01) Schottky 5A, 100V (PDS5100HDICT-ND) COUT = 2x2.2µF FPWM=25kHz Load = 9 LEDs, 20mA/channel VLED = 27.8V, ±0.5V /channel 50.0 40.0 30.0 20.0 10.0 0.0 0 10 20 30 40 50 60 70 80 90 100 Duty Cycle (%) Figure 6. Typical System Efficiency vs Duty Cycle (FPWM = 25 kHz) 34845 12 Analog Integrated Circuit Device Data Freescale Semiconductor Chablis ILED Dimming Linearity (FPWM=25kHz) 2.000% % ILED Channel mismatch 1.500% (-) Mismatch @ 25°C (+) Mismatch @ 25°C 1.000% 0.500% 0.000% -0.500% -1.000% -1.500% -2.000% 1 10 100 % Duty cycle Figure 7. Typical ILED Dimming Linearity (FPWM = 25 kHz) PWM VOUT (ac coupled) VCH1 ILED1 Figure 8. Typical Operating Waveforms (FPWM = 25 kHz, 50% duty) 34845 Analog Integrated Circuit Device Data Freescale Semiconductor 13 PWM VOUT (ac coupled) VCH1 ILED1 Figure 9. Low Duty Dimming Operation Waveforms (FPWM = 25 kHz, 1% duty) 34845 14 Analog Integrated Circuit Device Data Freescale Semiconductor 6 Typical Applications 6.1 Application Diagram 33 uH VIN LED LEG 1 60 V, 1A 4.7 uF 10uf 25V LED LEG 2 LED LEG 3 LED LEG 4 LED LEG 5 LED LEG 6 4.7 uF 100 pF 100pF 100 pF VIN 4 1 0. 1uf 3 VD C1 VD C2 2 .2uF 10 V 20 24 23 2. 2uF 10 V SWB VOU T 2 PGN D 5 PGN D 22 100 pF SWA 100 pF 680KΩ 100p F OVP 167KΩ 33nF 10KΩ 3.3k kO Ω COM P 17 MC34845/C 7 8 9 220pF 10 EN Cont rol Un it PWM WAKE 7.65k 11 6 15 765KΩ 0.1 % 12 16 18 14 13 GND EP 21 GND CH1 CH2 CH3 CH4 CH5 CH6 F AIL Caps should be located as close as possible to the MC34845 Device Figure 10. Typical Application Circuit for Single Wire Control, fS = 600 KHz (VIN = 9.0 V, ILED/channel = 20 mA/channel, 10 LEDs/channel, OVP = 35 V, VPWM = 3.3 V) 34845 Analog Integrated Circuit Device Data Freescale Semiconductor 15 33uH VIN LED LEG 1 80V, 1A 2uF 2uF 2uF LED LEG 2 LED LEG 3 LED LEG 4 LED LEG 5 LED LEG 6 2uF 10uf 25V 100 pF 100pF 100pF VI N 1 4 0. 1uf 3 VDC1 VDC2 2. 2uF 10V 24 20 2 23 2.2uF 10V 5 22 100 pF S WA S WB V OUT 100pF P GND P GND 680kΩ 100 pF OVP 114kΩ 56nF 2kΩ MC34845 B/D COMP 7 8 9 220pF 10 10kΩ 7.65k EN Cont rol Unit 11 6 PWM WAKE 12 CH1 CH2 CH3 CH4 CH5 CH6 16 18 14 15 13 765kΩ 0. 1% GND EP FAIL 21 GND Caps should be located as close as possible to the MC34845 Device Figure 11. Typical Application Circuit for Single Wire Control, fS = 300 kHz (VIN = 8.0V, ILED = 20 mA/channel, 14 LEDs/channel, OVP = 49V, VPWM = 3.3V) 6.2 Components Calculation The following formulas are intended for the calculation of all external components related with the boost converter and network compensation. To calculate the duty cycle, the internal losses of the MOSFET and diode should be taken into consideration: V OUT + V D – V IN D = ----------------------------------------------V OUT + V D – V SW The average input current depends directly on the output current when the internal switch is off. I OUT I IN – AVG = ------------1–D 6.2.1 Inductor For calculating the Inductor, consider the losses of the internal switch and winding resistance of the inductor: V IN – V SW – I IN – AVG R INDUCTOR D L = -----------------------------------------------------------------------------------------------------------------I IN – AVG r F SW It is important to look for an inductor rated at least for the maximum input current: V IN V OUT – V IN I IN – MAX = I IN – AVG + --------------------------------------------------------2 L F SW V OUT 34845 16 Analog Integrated Circuit Device Data Freescale Semiconductor 6.2.2 Input Capacitor The input capacitor should handle at least the following RMS current. I RMS – C 6.2.3 V IN V OUT – V IN = --------------------------------------------------------- 0.3 2 L F SW V OUT IN Output Capacitor For the output capacitor selection the transconductance should be taken in consideration. R COMP 5 G M I OUT L C OUT = ------------------------------------------------------------------------------ 1 – D V OUT 0.35 The output voltage ripple (∆VOUT) depends on the ESR of the Output capacitor. For a low output voltage ripple, it is recommended to use ceramic capacitors which have a very low ESR. Since ceramic capacitor are costly, electrolytic or tantalum capacitors can be mixed with ceramic capacitors for a less expensive solution. ESR C OUT V OUT V OUT F SW L = --------------------------------------------------------------------------V OUT 1 – D The output capacitor should at least handle the following RMS current. I RMS – C 6.2.4 OUT D = I OUT -----------1–D Network Compensation Since this Boost converter is current controlled, a Type II compensation is needed. Note that before calculating the network compensation, all boost converter components need to be known. For this type of compensation it is recommended to push out the Right Half Plane Zero to higher frequencies where it does not significantly affect the overall loop. 2 V OUT 1 – D f RHPZ = --------------------------------------------I OUT 2 L The crossover frequency must be set much lower than the location of the Right half plane zero: f RHPZ f CROSS = --------------5 Since the system has a fixed slope compensation, RCOMP should be fixed for all configurations, i.e. RCOMP = 2.0 k CCOMP1 and CCOMP2 should be calculated as follows: 2 C COMP1 = ------------------------------------------------------------R f CROSS COMP 2 GM C COMP2 = ----------------------------6.28 F SW The recommended values of these capacitors for an acceptable performance of the system in different operating conditions are CCOMP1 = 33 nF and CCOMP2 = 220 pF. A resistor network can be implemented from the PWM pin to ground with a connection to the compensation network, to improve the transient response of the boost. This configuration should inject a 1.0 V signal to the COMP pin and the equivalent Thevenin resistance of the divider should be close to RCOMP, (i.e. for 2.0 k COMP resistor, RCOMP = 3.3 k and RSHUNT = 10 k. See Figure 10 and Figure 11 for implementation guidelines. If a faster transient response is needed, a higher voltage (e.g. 1.3V) should be injected to the COMP pin; so the resistor divider should be modified accordingly, but keeping the equivalent Thevenin resistance of the divider close to RCOMP. 34845 Analog Integrated Circuit Device Data Freescale Semiconductor 17 6.2.5 Variable definition D = Duty cycle VOUT = Output voltage VD = Diode voltage VIN = Input voltage VSW = Internal switch voltage drop. ∆VOUT = Output voltage ripple IIN-AVG = Average input current = IL-AVG IOUT = Output current IIN-MAX = Maximum input current r = Current ripple ratio at the inductor = IL/ IL-AVG IRMS-CIN= RMS current for the input capacitor IRMS-COUT= RMS current for output capacitor L = Inductor. RINDUCTOR= Inductor winding resistor FSW= Boost switching frequency COUT = Output capacitor RCOMP = Compensation resistor GM= OTA transconductance ESRCOUT= ESR of the output capacitor fRHPZ= Right half plane zero frequency fCROSS= Crossover frequency CCOMP1= Compensation capacitor CCOMP2= Shunt compensation capacitor 6.2.6 Component Suggestions The Component Suggestions only apply to the conditions shown. Therefore, adjustments are necessary for different application conditions. Table 5. Component Suggestion Table Application Case VIN(min) VIN(Max) VO(max) VOVP fBOOST ILED per channel ROVP_UPPER ROVP_LOWER 1 9.0 V 12 V 30 V 35 V 600 kHz 20 mA 680 k 167 k 2 6.0 V 12 V 43 V 48 V 300 kHz 23 mA 680 k 114 k Application Case L(min) L(min) Continuous mode CIN(min) COUT(min) RCOMP at VPWM =3.3V RSHUNT at VPWM =3.3 V CCOMP1 CCOMP2 1 22 H 33 H 1x10 F; X7R; 25 V 2 x 4.7 F; X7R; 50 V 3.3 k 10 k 33 nF 220 pF 2 22 H 33 H 1x10 F; X7R; 25 V 4 x 2.2 F; X7R; 100 V 2.0 k 16 k 56 nF 220 pF ISAT min = 2.6 A 34845 18 Analog Integrated Circuit Device Data Freescale Semiconductor 7 7.1 Packaging Package Mechanical Dimensions Package dimensions are provided in package drawings. To find the most current package outline drawing, go to www.freescale.com and perform a keyword search for the drawing’s document number. Table 6. Packaging Information Package Suffix 24-Pin QFN-EP EP Package Outline Drawing Number 98ASA00602D 34845 Analog Integrated Circuit Device Data Freescale Semiconductor 19 34845 20 Analog Integrated Circuit Device Data Freescale Semiconductor 34845 Analog Integrated Circuit Device Data Freescale Semiconductor 21 8 Revision History Revision Date 6.0 12/2011 7.0 6/2014 8.0 5/2015 Description of Changes • • Changed the max rating for the OVP pin from 7.0V to 7.75V in the Absolute Maximum Ratings Table on page 6. Updated Freescale form and style. • No technical changes. Revised back page. Updated document properties. Added SMARTMOS sentence to first paragraph. • • • Removed obsolete part numbers from Orderable Parts Updated Packaging Updated Freescale form and style 34845 22 Analog Integrated Circuit Device Data Freescale Semiconductor How to Reach Us: Hom e Page: freescale.com Web Suppor t: freescale.com/support Information in this document is provided solely to enable system and software implementers to use Freescale products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits based on the information in this document. Freescale reserves the right to make changes without further notice to any products herein. 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U.S. Pat. & Tm. Off. SMARTMOS is a trademark of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2015 Freescale Semiconductor, Inc. Document Number: MC34845 Rev. 8.0 5/2015