RV-3049-C3 DTCXO Temperature Compensated Real Time Clock

EM MICROELECTRONIC - MARIN SA
603003
Application Note 603003
Title:
DTCXO Temperature Compensated Real Time Clock / Calendar Module with SPI
Interface
Product Family:
RV-3049
Part Number:
RV-3049
TABLE OF CONTENTS
1. OVERVIEW ........................................................................................................................................................ 4
1.1. GENERAL DESCRIPTION ......................................................................................................................... 4
1.2. APPLICATIONS ......................................................................................................................................... 4
2. BLOCK DIAGRAM ............................................................................................................................................. 5
2.1. PINOUT ...................................................................................................................................................... 6
2.2. PIN DESCRIPTION .................................................................................................................................... 7
2.3. FUNCTIONAL DESCRIPTION ................................................................................................................... 7
2.4. DEVICE PROTECTION DIAGRAM ........................................................................................................... 8
3. REGISTER ORGANIZATION ............................................................................................................................ 9
3.1. REGISTER OVERVIEW ............................................................................................................................. 9
3.2. CONTROL PAGE REGISTER FUNCTION .............................................................................................. 10
3.2.1. CONTROL_1 (address 00h…bits description) .................................................................................. 10
3.2.2. CONTROL_INT (address 01h…bits description) .............................................................................. 10
3.2.3. CONTROL_INT FLAG (address 02h…bits description) ................................................................... 11
3.2.4. CONTROL_STATUS (address 03h…bits description) ..................................................................... 11
3.2.5. CONTROL_RESET (address 04h…bits description) ........................................................................ 12
3.3. WATCH PAGE REGISTER FUNCTION .................................................................................................. 12
3.3.1. SECONDS, MINUTES, HOURS, DAYS, WEEKDAYS, MONTHS, YEARS REGISTER ................. 12
3.3.2. DATA FLOW OF TIME AND DATE FUNCTION ............................................................................... 14
3.4. ALARM PAGE REGISTER FUNCTION .................................................................................................. 15
3.4.1. SECONDS, MINUTES, HOURS, DAYS, WEEKDAYS, MONTHS, YEARS ALARM REGISTER .... 15
3.5. TIMER PAGE REGISTER FUNCTION .................................................................................................... 17
3.6. TEMPERATURE PAGE REGISTER FUNCTION .................................................................................... 17
3.7. EEPROM DATA PAGE REGISTER FUNCTION ..................................................................................... 17
3.8. EEPROM CONTROL PAGE REGISTER FUNCTION ............................................................................. 18
3.8.1. EEPROM CONTROL (address 30h…bits description) ..................................................................... 18
3.8.2. XTAL OFFSET (address 31h…bits description) ............................................................................... 18
3.8.3. XTAL TEMPERATUR COEFFICIENT (address 32h…bits description) ........................................... 18
3.8.4. XTAL TURNOVER TEMPERATUR COEFFICIENT T0 (address 33h…bits description) ................. 19
3.9. RAM DATA PAGE REGISTER FUNCTION ............................................................................................ 19
4. DETAILED FUNCTIONAL DESCRIPTION ..................................................................................................... 20
4.1. POWER-UP, POWER MANAGEMENT AND BATTERY SWITCHOVER .............................................. 20
4.1.1. POWER UP SEQUENCE ................................................................................................................. 21
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4.1.2. SUPPLY VOLTAGE OPERATING RANGE AND LOW VOLTAGE DETECTION ............................ 22
4.2. RESET ...................................................................................................................................................... 24
4.2.1. POWER-UP RESET, SYSTEM RESET AND SELF-RECOVERY RESET ...................................... 24
4.2.2. REGISTER RESET VALUES ............................................................................................................ 25
4.3. EEPROM MEMORY ACCESS ................................................................................................................. 27
4.4. TIMER FUNCTION ................................................................................................................................... 28
4.4.1. TIMER INTERRUT ............................................................................................................................ 30
4.5. ALARM FUNCTION ................................................................................................................................. 31
4.5.1. ALARM INTERRUPT ........................................................................................................................ 32
4.6. INTERRUPT OUTPUT INT ....................................................................................................................... 33
4.7. WATCH ENABLE FUNCTION ................................................................................................................. 34
4.8. SELF-RECOVERY SYSTEM ................................................................................................................... 34
4.9. CLOCK OUTPUT CLKOUT ..................................................................................................................... 35
5. COMPENSATION OF FREQUENCY DEVIATION AND FREQUENCY DRIFT vs TEMPERATURE ............ 36
5.1. TEMPERATURE CHARACTERISTICS TUNING FORK CRYSTAL....................................................... 36
5.2. COMPENSATION PRINCIPLE ................................................................................................................ 37
5.2.1. THERMOMETER AND TEMPERATURE VALUE ............................................................................ 38
5.2.2. SETTING THE FREQUENCY COMPENSATION PARAMETERS .................................................. 39
5.3. METHOD OF COMPENSATING THE FREQUENCY DEVIATION ......................................................... 40
5.3.1. CORRECT METHOD FOR TESTING THE TIME ACCURACY ....................................................... 41
5.3.2. TESTING THE TIME ACCURACY USING CLKOUT OUTPUT........................................................ 41
5.3.3. TESTING THE TIME ACCURACY USING INTERRUPT OUTPUT 1 Hz ......................................... 42
5.4. TIME ACCURACY OPT: A / OPT: B ....................................................................................................... 44
6. SPI INTERFACE .............................................................................................................................................. 46
6.1. SPI INTERFACE SYSTEM CONFIGURATION ....................................................................................... 46
6.2. SPI INTERFACE DATA TRANSMISSION ............................................................................................... 48
6.2.1. COMMAND BYTE DEFINITION ....................................................................................................... 48
6.2.2. SPI INTERFACE READ / WRITE EXAMPLES ................................................................................. 49
7. ELECTRICAL CHRACTERISTICS .................................................................................................................. 51
7.1. ABSOLUTE MAXIMUM RATINGS .......................................................................................................... 51
7.2. FREQUENCY AND TIME CHARACTERISTICS ..................................................................................... 51
7.3. STATIC CHARACTERISTICS ................................................................................................................. 52
7.4. SPI INTERFACE TIMING CHARACTERISTICS ..................................................................................... 53
7.5. SPI INTERFACE DYNAMIC CHARACTERISTICS ................................................................................. 54
8. APPLICATION INFORMATION ....................................................................................................................... 55
8.1. RECOMMENDED REFLOW TEMPERATURE (LEADFREE SOLDERING) .......................................... 56
9. PACKAGE ........................................................................................................................................................ 57
9.1. DIMENSIONS AND SOLDERPADS LAYOUT ........................................................................................ 57
9.2. MARKING AND PIN #1 INDEX ................................................................................................................ 58
10. PACKING INFORMATION ............................................................................................................................... 59
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10.1. CARRIER TAPE ....................................................................................................................................... 59
10.2. PARTS PER REEL ................................................................................................................................... 60
10.3. REEL 13 INCH FOR 12 mm TAPE .......................................................................................................... 61
10.4. REEL 7 INCH FOR 12 mm TAPE ............................................................................................................ 62
11. HANDLING PRECAUTIONS FOR CRYSTALS OR MODULES WITH EMBEDDED CRYSTALS ................ 63
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RV-3049
Highly accurate, DTCXO Temperature Compensated Real Time Clock / Calendar Module
with SPI Interface
1. OVERVIEW


RTC module with built-in “Tuning Fork” crystal oscillating at 32.768 kHz
Factory calibrated, all built-in Temperature Compensation circuitry
Time accuracy:











Temperature Range
25°C
0°C to + 50°C
-10°C to + 60°C
-40°C to + 85°C
-40°C to +125°C
Opt: A
+/- 3 ppm
+/- 4 ppm
+/- 5 ppm
+/- 6 ppm
+/- 8 ppm
Opt: B
+/- 3 ppm
+/- 5 ppm
+/- 10 ppm
+/- 25 ppm
+/- 30 ppm
Ultra low power consumption:
800nA typ @ VDD = 3.0V / Tamb = 25°C
Wide clock operating voltage:
1.3 – 5.5V
Wide interface operating voltage:
1.4 – 5.5V
Extended operating temperature range: -40°C to +125°C
SPI serial interface with fast mode SCL clock frequency of 1 MHz
Provides year, month, day, weekday, hours, minutes and seconds
Highly versatile alarm and timer functions
Integrated Low-Voltage Detector, Power-On Reset and Self-Recovery System
Main Power Supply to Backup Battery switchover circuitry with Trickle Charger
Programmable CLKOUT pins for peripheral devices (32.768 kHz / 1024 Hz / 32 Hz / 1 Hz)
Available in a small and compact package sizes, RoHS-compliant and 100% leadfree:
C3: 3.7 x 2.5 x 0.9 mm
1.1. GENERAL DESCRIPTION
The RV-3049 is a CMOS low power, real-time clock/calendar module with built-in Thermometer and Digital
Temperature Compensation circuitry (DTCXO). The temperature compensation circuitry is factory-calibrated and
greatly improves the time accuracy by compensating the frequency-deviation @ 25°C and the anticipated
frequency-drift over the temperature of the embedded 32.768 kHz “Tuning-Fork” crystal, even over the extended
Temperature Range -40°C to +125°C. Data is transferred serially via a SPI interface with a maximum SCL clock
frequency in fast mode of 1 MHz, the built-in word address register is incremented automatically after each written
or read data byte. Beyond standard RTC-functions like year, month, day, weekday, hours, minutes, seconds
information, the RV-3049 offers highly versatile Alarm and Timer-Interrupt function, programmable Clock-Output
and Low-Voltage Detector.
1.2. APPLICATIONS
The RV-3049 RTC module combines key functions with outstanding performance in a small ceramic package:
 Factory calibrated Temperature Compensation
 Extended temperature range up to +125°C
 Low Power consumption
 Smallest temperature compensated RTC module with embedded Xtal
These unique features make this product perfectly suitable for many applications:
 Automotive: Car Radio / GPS and Tracking Systems / Dashboard / Engine Controller /
Car Mobile & Entertainment Systems / Tachometers
 Metering:
E-meter / Heating Counter
 Outdoor:
ATM & POS systems / Surveillance & Safety systems / Ticketing systems
 All kind of portable and battery operated devices
 Industrial and consumer electronics
 White goods
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2. BLOCK DIAGRAM
32.768 kHz
Xtal
DIVIDER
and
TEMPERATURE
COMPENSATION
LOGIC
OSC
CLKOUT
CLKOE
OUTPUT
CONTROL
INT
VDD
VBACKUP
SYSTEM
CONTROL
LOGIC
POWER
CONTROL
VSS
CE
SPI-BUS
SCL
4-wire
SDO
Serial
SDI
TEMPERATURE
SENSOR
Interface
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Control_1
Control_INT
Control_INT-Flags
Control_Status
Control_Reset
Seconds
Minutes
Hours
Date
Weekday
Month
Year
Seconds Alarm
Minutes Alarm
Hour Alarm
Day Alarm
Weekday Alarm
Month Alarm
Year Alarm
Timer Low
Timer High
Temperature °K
User EEPROM
2 Bytes
EE Ctrl
Xtal Deviation
Xtal Temp-Coef
Xtal T0 Temp
User RAM
8 Byte
User RAM
00
08
10
18
20
28
29
30
38
3F
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2.1. PINOUT
C3 Package:
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#1
CLKOE
#10
SDI
#2
VDD
#9
VBACKUP
#3
CLKOUT
#8
CE
#4
SCL
#7
INT
#5
SDO
#6
VSS
6
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2.2. PIN DESCRIPTION
Symbol
Pin
#
Description
C3
Positive supply voltage; positive or negative steps in supply voltage may affect oscillator performance, recommend 10 nF
decoupling capacitor close to device
VDD
2
CLKOUT
3
CE
SCL
SDO
VSS
8
4
5
6
CLKOUT output push-pull / INT function open-drain requiring pull-up resistor
Chip Enable Input pin; active HIGH
Serial Clock Input pin; may float when CE inactive
Serial Data Output pin; push-pull; high impedance when not driving; can be connected to SDI for single wire data line
Ground
INT
VBACKUP
SDI
CLKOE
7
Interrupt Output pin; open-drain; active LOW
9
10
1
Backup Supply Voltage; tie to GND when not using backup supply voltage
Serial Data Input pin; may float when CE inactive
CLKOUT enable/disable pin; enable is active HIGH; tie to GND when not using CLKOUT
Clock Output pin; CLKOUT or INT function can be selected.(Control_1; bit7; Clk/Int)
2.3. FUNCTIONAL DESCRIPTION
The RV-3049 is a highly accurate real-time clock/calendar module due to integrated temperature compensation
circuitry. The built-in Thermometer and Digital Temperature Compensation circuitry (DTCXO) provides improved
time-accuracy; achieved by measuring the temperature and calculating an expected correction value based on
precise, factory-calibrated Crystal parameters. The compensation of the frequency deviation @ 25°C and the
Crystal’s frequency-drift over the temperature range are obtained by adding or subtracting 32.768 kHz oscillator
clock-pulses. Beyond standard RTC-functions like year, month, day, weekday, hours, minutes, seconds
information, the RV-3049 offers highly versatile Alarm and Timer-Interrupt function, programmable Clock-Output
and Voltage-Low-Detector and a Main-Supply to Backup-Battery Switchover Circuitry and a SPI interface.
The CMOS IC contains thirty 8-bit RAM registers organized in 6 memory pages; the address counter is
automatically incremented within the same memory page. All sixteen registers are designed as addressable 8-bit
parallel registers, although, not all bits are implemented.
•
Memory page #00 contains of five registers (memory address 00h and 04h) used as control registers
•
Memory page #01 addresses 08h through 0Eh are used as counters for the clock function (seconds up to
years). The Seconds, Minutes, Hours, Days, Weekdays, Months and Years registers
are all coded in Binary-Coded-Decimal (BCD) format. When one of the RTC registers is
read, the content of all counters is frozen to prevent faulty reading of the clock/calendar
registers during a carry condition
•
Memory page #02 addresses 10h through 16h define the alarm condition
•
Memory page #03 addresses 18h and 19h are used for Timer function
•
Memory page #04 address 20h provides the thermometer reading value
•
Memory page #07 addresses 38h through 3Fh are available for user data
Additionally, the CMOS-IC contains six non-volatile 8-bit EEPROM registers organized in 2 memory pages; the
address counter is automatically incremented within the same memory page.
•
EEPROM page #05 addresses 28h and 29h are available for EEPROM user data
•
EEPROM page #06 contains of four registers (memory address 30h through 33h) used as non-volatile
control registers. These registers contain the factory programmed parameters of the
Crystal’s thermal characteristics, the frequency-deviation @ ambient temperature and
the Thermometer’s calibration values. In favour for the best time-accuracy, the factory
programmed registers (memory address 31h through 33h) shall not be changed by
the user without carefully studying its function
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2.4. DEVICE PROTECTION DIAGRAM
VDD
CLKOE
CLKOUT
SDI
VBACKUP
CE
SCL
INT
SDO
VSS
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3. REGISTER ORGANIZATION
The registers are grouped into memory pages. The pages are addressed by the 5 most-significant-bits (MSB’s bits
7 – 3), the 3 least-significant-bites (LSB’s 2 – 0) select the registers within the addressed page.
30 RAM registers organized in 6 memory pages and 6 EEPROM registers organized in 2 memory pages are
available. During interface access, the page address (MSB’s 7 - 3) is fixed while the register address (LSB’s 2 - 0)
are automatically incremented. The content of all counters and registers are frozen to prevent faulty reading of the
clock/calendar registers during carry condition.
The time registers in the Clock and Alarm pages are encoded in the Binary Coded Decimal format (BCD) to simplify
application use. Other registers are either bit-wise or standard binary format.
3.1. REGISTER OVERVIEW
Address
Function
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 1
Bit 0
TD1
TD0
SROn
EERE
X
X
SRIE
V2IE
TAR
TE
WE
V1IE
TIE
X
X
SRF
V2IF
AIE
V1IF
TF
X
PON
SR
AF
V2F
V1F
X
X
X
X
X
SysR
X
X
X
X
X
40
X
40
20
10
8
4
2
1
20
10
8
4
2
X
1
12-24
20-PM
10
8
4
2
1
X
X
20
10
8
4
2
1
X
X
X
X
X
4
2
1
X
X
X
10
8
4
2
1
X
40
20
10
8
4
2
1
Page
Address
Bit 7 - 3
Bit 2 - 0
Control page
000
001
010
011
00h
01h
02h
03h
Clk/Int
Control_1
X
Control_INT
X
Control_INT Flag
EEbusy
Control_Status
100
04h
Control_Reset
000
001
010
011
100
101
110
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
Seconds
Minutes
Hours
Days
Weekdays
Months
Years
000
001
010
011
100
101
110
10h
11h
12h
13h
14h
15h
16h
Second Alarm
Minute Alarm
Hour Alarm
Days Alarm
Weekday Alarm
Months Alarm
Year Alarm
Timer page
00011
000
001
18h
19h
Temperature page
00100
000
EEPROM User
00101
EEPROM Control page
00000
Clock page
00001
Alarm page
00010
00110
RAM page
00111
Bit 2
Hex
AE_S
40
20
10
8
4
2
1
AE_M
40
20
10
8
4
2
1
AE_H
X
20-PM
10
8
4
2
1
AE_D
X
20
10
8
4
2
1
AE_W
X
X
X
X
4
2
1
AE_M
X
X
10
8
4
2
1
AE_Y
40
20
10
8
4
2
1
Timer Low
Timer High
128
64
32
16
8
4
2
1
128
64
32
16
8
4
2
1
20h
Temperature
128
64
32
16
8
4
2
1
000
28h
EEPROM User
001
29h
EEPROM User
000
001
010
011
30h
31h
32h
33h
EEPROM Contr.
Xtal Offset
Xtal Coef
Xtal T0
000
:
111
38h
:
User RAM
2 bytes of EEPROM for user data
R80k
R20k
R5k
R1k
FD1
FD0
ThE
ThP
sign
64
32
16
8
4
2
1
128
64
32
16
8
4
2
1
X
X
32
16
8
4
2
1
8 bytes of RAM for user data
3Fh
Bit positions labelled as “X” are not implemented and will return a “0” when read.
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3.2. CONTROL PAGE REGISTER FUNCTION
3.2.1.CONTROL_1 (address 00h…bits description)
Address
Function
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
00h
Control_1
Clk/Int
TD1
TD0
SROn
EERE
TAR
TE
WE
Bit
Symbol
Value
7
Clk/Int
6
TD1
5
TD0
4
SROn
3
EERE
2
TAR
1
TE
0
WE
0
Description
Reference
Applies INT function on CLKOUT pin
Applies CLKOUT function on CLKOUT pin
See section 4.9.
00
01
10
11
Select Source Clock for internal Countdown Timer
See section 4.4.
0
1
0
1
0
1
0
1
0
1
Disables Self Recovery function
Enables Self Recovery function
Disables automatic EEPROM refresh every hour
Enables automatic EEPROM refresh every hour
Disables Countdown Timer auto-reload mode
Enables Countdown Timer auto-reload mode
Disables Countdown Timer
Enables Countdown Timer
Disables 1Hz Clock Source for Watch
Enables 1Hz Clock Source for Watch
1
See section 4.8.
See section 4.3.
See section 4.4.
See section 4.4.
See section 4.7.
3.2.2.CONTROL_INT (address 01h…bits description)
Address
Function
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
X
X
X
SRIE
V2IE
V1IE
TIE
AIE
01h
Control_INT
Bit
Symbol
Value
7 to 5
unused
X
Unused
0
1
0
1
0
1
0
1
0
1
Disables Self-Recovery INT
Enables Self-Recovery INT
Disables VLOW2 INT; “Low Voltage 2 detection”
Enables VLOW2 INT; “Low Voltage 2 detection”
Disables VLOW1 INT; “Low Voltage 1detection”
Enables VLOW1 INT; “Low Voltage 1detection”
Disables Countdown Timer INT
Enables Countdown Timer INT
Disables Alarm INT
Enables Alarm INT
4
SRIE
3
V2IE
2
V1IE
1
TIE
0
AIE
Description
Reference
See section 4.8.
See section 4.1.2.
See section 4.1.2.
See section 4.4.1.
See section 4.5.1.
Bit positions labelled as “X” are not implemented and will return a “0” when read.
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3.2.3.CONTROL_INT FLAG (address 02h…bits description)
Address
Function
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
X
X
X
SRF
V2IF
V1IF
TF
AF
02h
Control_INT Flag
Bit
Symbol
Value
7 to 5
unused
X
Unused
0
No Self-Recovery Interrupt generated
Self-Recovery Interrupt generated if possible
deadlock is detected; clear flag to clear Interrupt
No VLOW2 Interrupt generated
VLOW2 Interrupt generated when supply voltage
drops below VLOW2 threshold
No VLOW1 Interrupt generated
VLOW1 Interrupt generated when supply voltage
drops below VLOW1 threshold
No Timer Interrupt generated
Timer Interrupt generated when Countdown Timer
value reaches zero
No Alarm Interrupt generated
Alarm Interrupt generated when Time & Date
matches Alarm setting
4
SRF
3
V2IF
2
V1IF
1
TF
0
AF
1
0
1
0
1
0
1
0
1
Description
Reference
See section 4.6.
See section 4.6.
See section 4.6.
See section 4.6.
See section 4.6.
Bit positions labelled as “X” are not implemented and will return a “0” when read.
3.2.4.CONTROL_STATUS (address 03h…bits description)
Address
Function
03h
Control_Status
Bit
Symbol
7
EEbusy
6
unused
5
PON
4
SR
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
EEbusy
X
PON
SR
V2F
V1F
X
X
Value
0
1
X
Unused
0
No Power-On Reset executed
Flag is set at Power-On, flag must be cleared by
writing “0”
No Self-Recovery Reset or System Reset has
been generated.
Flag is set when Self-Recovery Reset or System
Reset has been generated.
No VLOW2 Interrupt generated”
VLOW2 Interrupt generated when supply voltage
drops below VLOW2 threshold
No VLOW1 Interrupt generated”
VLOW1 Interrupt generated when supply voltage
drops below VLOW1 threshold
1
0
1
0
3
V2F
2
V1F
1
0
1 to 0
unused
Description
EEPROM is not busy
Flag is set when EEPROM page is busy due to
“write” or automatic EEPROM refresh in progress
1
X
Reference
See section 4.3.
See section 4.1.
See section 4.2.1.
See section 4.6.
See section 4.6.
Unused
Bit positions labelled as “X” are not implemented and will return a “0” when read.
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3.2.5.CONTROL_RESET (address 04h…bits description)
Address
Function
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
X
X
X
SysR
X
X
X
X
04h
Control_Reset
Bit
Symbol
Value
7 to 5
unused
4
3 to 0
Description
Reference
X
Unused
0
No System Reset will be executed
Set bit = “1” triggers a System Reset. After the
restart of the logic, the SysR will be cleared and in
bit 4 “SR” in the register Control_Status will be set
See section 4.2.1.
SysR
unused
1
X
Unused
Bit positions labelled as “X” are not implemented and will return a “0” when read.
3.3. WATCH PAGE REGISTER FUNCTION
Watch Page registers are coded in the Binary Coded Decimal (BCD) format; BCD format is used to simplify
application use.
3.3.1.SECONDS, MINUTES, HOURS, DAYS, WEEKDAYS, MONTHS, YEARS REGISTER
Seconds (address 08h…bits description)
Address
Function
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
08h
Seconds
X
40
20
10
8
4
2
1
Bit
Symbol
Value
7
6 to 0
X
Seconds
0 to 59
Description
Unused
This register holds the current seconds coded in BCD format
Minutes (address 09h…bits description)
Address
Function
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
40
20
10
8
4
2
1
09h
Minutes
X
Bit
Symbol
Value
7
6 to 0
X
Minutes
0 to 59
Description
Unused
This register holds the current minutes coded in BCD format
Hours (address 0Ah…bits description)
Address
Function
0Ah
Hours
Bit
Symbol
7
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
X
12-24
20-PM
10
8
4
2
1
Value
X
-
Description
Unused
12 hour mode (AM/PM)
6
12-24
5
20-PM
4 to 0
Hours1)
0
1
0
1
1 to 12
Selects 24-hour mode
Selects 12-hour (AM/PM) mode
Indicates AM
Indicates PM
This register holds the current hours coded in BCD format
0
1
0 to 23
Selects 24-hour mode
Selects 12-hour AM/PM mode
This register holds the current hours coded in BCD format
24 hour mode
6
5 to 0
1)
12-24
Hours1)
User is requested to pay attention setting valid data only.
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Days (address 0Bh…bits description)
Address
Function
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
X
X
20
10
8
4
2
1
0Bh
Days
Bit
Symbol
Value
X
Days
1 to 31
7 to 6
5 to 0
Description
Unused
This register holds the current days coded in BCD format
1)
1)
The RTC compensates for leap years by adding a 29th day to February if the year counter contains a value which is exactly divisible by 4;
including the year 00.
Weekdays (address 0Ch…bits description)
Address
Function
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0Ch
Weekdays
X
X
X
X
X
4
2
1
Bit
Symbol
Value
X
Weekdays
1 to 7
7 to 3
2 to 0
Weekdays1)
Sunday
Monday
Tuesday
Wednesday
Thursday
Friday
Saturday
1)
Description
Unused
This register holds the current weekdays coded in BCD format 1)
Bit 7
X
X
X
X
X
X
X
Bit 6
X
X
X
X
X
X
X
Bit 5
X
X
X
X
X
X
X
Bit 4
X
X
X
X
X
X
X
Bit 3
X
X
X
X
X
X
X
Bit 2
0
0
0
1
1
1
1
Bit 1
0
1
1
0
0
1
1
Bit 0
1
0
1
0
1
0
1
These bits may be re-assigned by the user.
Months (address 0Dh…bits description)
Address
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0Dh
Function
Months
X
X
X
10
8
4
2
1
Bit
Symbol
Value
7 to 5
4 to 0
X
Months
1 to 12
Months
January
February
March
April
May
June
July
August
September
October
November
December
Bit 7
X
X
X
X
X
X
X
X
X
X
X
X
Description
Unused
This register holds the current months coded in BCD format 1)
Bit 6
X
X
X
X
X
X
X
X
X
X
X
X
Bit 5
X
X
X
X
X
X
X
X
X
X
X
X
Bit 4
0
0
0
0
0
0
0
0
0
1
1
1
Bit 3
0
0
0
0
0
0
0
1
1
0
0
0
Bit 2
0
0
0
1
1
1
1
0
0
0
0
0
Bit 1
0
1
1
0
0
1
1
0
0
0
0
1
Bit 0
1
0
1
0
1
0
1
0
1
0
1
0
1)
The RTC compensates for leap years by adding a 29th day to February if the year counter contains a value which is exactly divisible by 4;
including the year 00.
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Years (address 0Eh…bits description)
Address
Function
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
X
40
20
10
8
4
2
1
0Eh
Years
Bit
Symbol
Value
X
Years
0 to 79
7
6 to 0
Description
Unused
This register holds the current year 20xx coded in BCD format1)
1)
The RTC compensates for leap years by adding a 29th day to February if the year counter contains a value which is exactly divisible by 4;
including the year 00.
3.3.2.DATA FLOW OF TIME AND DATE FUNCTION
1 Hz tick
SECONDS
MINUTES
12_24 hour mode
HOURS
LEAP YEAR
CALCULATION
DAYS
WEEKDAY
MONTHS
YEARS
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3.4. ALARM PAGE REGISTER FUNCTION
The Alarm Page registers contain alarm information. When one or more of these registers are loaded with a valid
second, minute, hour, day, weekday, month or year information and its corresponding alarm enable bit (AE_x) is
logic “1”, then that information will be compared with the current time / date information in the Watch Page
registers.
When all enabled comparisons first match (wired “AND”) and the AIE Flag (bit 0 in register Control_INT) is enabled,
then the AF Flag (bit 0 in register Control_INT) is set = “1” and an Interrupt signal becomes available at INT pin.
Disabled Alarm registers which have their corresponding bit AE_X at logic “0” are ignored.
3.4.1.SECONDS, MINUTES, HOURS, DAYS, WEEKDAYS, MONTHS, YEARS ALARM REGISTER
Alarm Seconds (address 10h…bits description)
Address
Function
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
10h
Second Alarm
AE_S
40
20
10
8
4
2
1
Bit
Symbol
Value
7
6 to 0
AE_S
Seconds Alarm
0
1
0 to 59
Description
Second Alarm is disabled
Second Alarm is enabled
These bits hold the Second Alarm information coded in BCD format
Alarm Minutes (address 11h…bits description)
Address
Function
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
11h
Minute Alarm
AE_M
40
20
10
8
4
2
1
Bit
Symbol
Value
7
6 to 0
AE_M
Minutes Alarm
0
1
0 to 59
Description
Minute Alarm is disabled
Minute Alarm is enabled
These bits hold the Minute Alarm information coded in BCD format
Alarm Hours (address 12h…bits description)
Address
Function
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
12h
Hours Alarm
AE_H
X
20-PM
10
8
4
2
1
Bit
Symbol
Value
7
AE_H
6
X
Description
0
1
-
Hour Alarm is disabled
Hour Alarm is enabled
Unused
0
1
Indicates AM
Indicates PM
These registers hold the Hours Alarm information coded in BCD format
when in 12 hour mode
12 hour mode (AM/PM)
5
4 to 0
20-PM
Hours Alarm
1 to 12
Hours Alarm
0 to 23
24 hour mode
5 to 0
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These registers hold the Hours Alarm information coded in BCD format
when in 24 hour mode
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Alarm Days (address 13h…bits description)
Address
Function
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
13h
Days Alarm
AE_D
X
20
10
8
4
2
1
Bit
Symbol
Value
7
6
5 to 0
AE_D
X
Days Alarm
0
1
1 to 31
Description
Day Alarm is disabled
Day Alarm is enabled
Unused
These registers hold the Day Alarm information coded in BCD
Alarm Weekdays (address 14h…bits description)
Address
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
14h
Weekday Alarm
AE_W
X
X
X
X
4
2
1
Bit
Symbol
Value
7
6 to 3
2 to 0
Function
AE_W
X
Weekday Alarm
0
1
1 to 7
Description
Weekday Alarm is disabled
Weekday Alarm is enabled
Unused
These registers hold the Weekday Alarm information coded in BCD
Alarm Months (address 15h…bits description)
Address
Function
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
15h
Months Alarm
AE_M
X
X
10
8
4
2
1
Bit
Symbol
Value
7
6 to 5
4 to 0
AE_M
X
Months Alarm
0
1
1 to 12
Description
Months Alarm is disabled
Months Alarm is enabled
Unused
These registers hold the Months Alarm information coded in BCD
Alarm Years (address 16h…bits description)
Address
Function
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
16h
Year Alarm
AE_Y
40
20
10
8
4
2
1
Bit
Symbol
Value
7
6 to 0
AE_Y
Year Alarm
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0
1
0 to 79
Description
Year Alarm is disabled
Year Alarm is enabled
These registers hold the Year Alarm information coded in BCD
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3.5. TIMER PAGE REGISTER FUNCTION
The Timer Page contains 2 registers forming a 16-bit count down timer value.
Countdown Timer Value (addresses 18h / 19h…bits description)
Address
18h
19h
Address
18h
19h
Function
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Timer Low
Timer High
128
128
64
64
32
32
16
16
8
8
4
4
2
2
1
1
Symbol
Timer Low
Timer High
Value
1 to 255
0 to 255
Description
These bits hold the Low Countdown Timer Value in binary format
These bits hold the High Countdown Timer Value in binary format
3.6. TEMPERATURE PAGE REGISTER FUNCTION
The Temperature Page register contains the result of the measured temperature ranging from -60°C (=0d) to
+190°C (=250d) with 0°C corresponding to a content of =60d.
During read / write access, the content of the register Temperature is frozen in a cache memory to prevent faulty
reading.
When the Thermometer is disabled by ThE = “0” (bit 1 in register EEPROM_Control), the register Temperature at
address 20h can be externally written.
Temperature Value (address 20h…bits description)
Address
20h
Address
20h
Function
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Temperature
128
64
32
16
8
4
2
1
Symbol
Temperature
Value
-60 to
+194°C
Description
These bits hold the Temperature Value coded in binary format
3.7. EEPROM DATA PAGE REGISTER FUNCTION
The EEPROM Data Page contains 2 non-volatile EEPROM registers for user’s application.
Please see section 4.3 EEPROM MEMORY ACCESS for detailed instructions how to handle EEPROM read / write
access.
User EEPROM Data Registers (addresses 28h / 29h…bits description)
Address
28h
29h
Address
28h
29h
Function
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
EEPROM User
EEPROM User
128
128
64
64
32
32
16
16
8
8
4
4
2
2
1
1
Symbol
EEPROM User
EEPROM User
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Value
0 to 255
0 to 255
Description
EEPROM User Data (2 Bytes)
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3.8. EEPROM CONTROL PAGE REGISTER FUNCTION
The EEPROM Control Page contains 4 non-volatile EEPROM registers.
With Register EEPROM Control, the settings for Trickle-Charger (bit 7-4), the CLKOUT frequency (bit 3&2) and the
Thermometer (bit 1&0) can be controlled.
The registers XTAL Offset, XTAL Coef and XTAL T0 contain the factory calibrated, individual crystal parameters to
compensate the frequency deviation over the temperature range.
Please see section 4.3 EEPROM MEMORY ACCESS for detailed instructions how to handle EEPROM read / write
access.
3.8.1.EEPROM CONTROL (address 30h…bits description)
Address
Function
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
30h
EEPROM Control
R80k
R20k
R5k
R1k
FD1
FD0
ThE
ThP
Bit
Symbol
Value
0
1
Description
Disables 80 kΏ trickle charge resistor
Enables 80 kΏ trickle charge resistor
0
Disables 20 kΏ trickle charge resistor
1
0
1
0
1
Enables 20 kΏ trickle charge resistor
Disables 5 kΏ trickle charge resistor
Enables 5 kΏ trickle charge resistor
Disables 1.5 kΏ trickle charge resistor
Enables 1.5 kΏ trickle charge resistor
00
01
10
11
Selects Clock Frequency at CLKOUT pin
0
1
0
1
Disables Thermometer
Enables Thermometer
Set Temperature Scanning Interval:
Set Temperature Scanning Interval:
7
R80k
6
R20k
5
R5k
4
R1k
3
FD1
2
FD0
1
ThE
0
ThP
Reference
See section 4.1.
See section 4.9.
See section 5.2.1.
1 second
16 seconds
See section 5.2.1.
3.8.2.XTAL OFFSET (address 31h…bits description)
Address
Function
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
31h
XTAL Offset
sign
64
32
16
8
4
2
1
Bit
Symbol
7
6 to 0
Value
0
1
Sign
XTAL Offset1)
0 to 121
Description
- Deviation (slower) of 32.768kHz frequency at T0
+ Deviation (faster) of 32.768kHz frequency at T0
Reference
See section 5.2.2.
Frequency Offset Compensation value
1)
The XTAL Offset register value is factory programmed according to the crystal’s initial frequency-tolerance. For best time-accuracy, the
content of this register must not be changed by the user.
3.8.3.XTAL TEMPERATUR COEFFICIENT (address 32h…bits description)
Address
Function
32h
XTAL Coef
Bit
Symbol
7 to 0
XTAL Coef
1)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
128
64
32
16
8
4
2
1
Value
Description
Reference
0 to 255
Quadratic Coefficient of XTAL’s Temperature Drift
See section 5.2.2.
1)
The XTAL Coef register value is factory programmed according to the crystal parameters over temperature. For best time-accuracy, the
content of this register must not be changed by the user.
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3.8.4.XTAL TURNOVER TEMPERATUR COEFFICIENT T0 (address 33h…bits description)
Address
Function
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
33h
XTAL T0
x
x
32
16
8
4
2
1
Bit
Symbol
Value
7 to 6
x
5 to 0
XTAL T01)
4 to 67
Description
Reference
Unused
XTAL’s Turnover Temperature in °C
See section 5.2.2.
1)
The XTAL T0 register value is factory programmed according to the crystal parameters over temperature. For best time-accuracy, the
content of this register must not be changed by the user.
3.9. RAM DATA PAGE REGISTER FUNCTION
The RAM Data Page contains 8 RAM registers for user’s application.
User RAM Data Registers (addresses 38h to 3Fh…bits description)
Address
Function
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
38h
--3Fh
RAM User
--RAM User
128
64
32
16
8
4
2
1
128
64
32
16
8
4
2
1
128
64
32
16
8
4
2
1
Address
Symbol
Value
38h
---
RAM User
---
0 to 255
3Fh
RAM User
0 to 255
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Description
RAM User Data (8 Bytes)
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4. DETAILED FUNCTIONAL DESCRIPTION
4.1. POWER-UP, POWER MANAGEMENT AND BATTERY SWITCHOVER
The RV-3049 has two power supply pins:
 VDD
the main power supply input pin
 VBACKUP the backup battery input pin
The RV-3049 has multiple power management function implemented:
 Automatic switchover function between main power supply and backup supply voltage. The higher supply
voltage is selected automatically, with a switchover hysteresis of 20mV
 Low supply voltage detection VLOW1 and VLOW2 with the possibility to generate an INT if the corresponding
control bits are enabled
 Functions requiring a minimum supply voltage are automatically disabled if low supply voltage is detected
 Interface and CLKOUT are automatically disabled when the device operates in backup supply mode
 Programmable trickle charge circuitry to charge backup battery or supercap
Backup Switchover Circuitry Disables non-used Functions
VDD
Power Supply
VBAT
20mV
VDD
VBAT
2
Battery switchover
VBAT
VDD
Operating on VDD
Operating on VBACKUP
Operating on VDD
I2C Interface
Enabled
Disabled
Enabled
CLKOUT
Enabled
Disabled
Enabled
INT
Enabled
Enabled
Enabled
Disabled
Enabled
Trickle Charge
Enabled
1
1
2
3
3
Trickle charge circuitry is enabled by software when selecting trickle-charge resistors. When back-up
supply switchover-circuitry switches to the backup supply voltage, trickle charge function is disabled.
The implemented backup switchover circuitry continuously compares VDD and VBACKUP voltages and
connects the higher of them to the internal supply voltage VINT.
The switchover hysteresis from VDD to VBACKUP and vice versa is typically 20mV.
When the device is operating at the VBACKUP supply voltage, non-used RTC functions are disabled to
ensure optimized power consumption:
 SPI interface
Disabled when operating in VBACKUP mode
 CLKOUT
Disabled when operating in VBACKUP mode
 INT
Enabled even when operating in VBACKUP mode
 Trickle Charge
Disabled when operating in VBACKUP mode
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4.1.1.POWER UP SEQUENCE
The device can be either powered up from main supply VDD or from backup supply VBACKUP.
During power-up, the chip is executing the following power-up procedure:









The implemented battery switchover circuitry compares VDD and VBACKUP voltages and connects the higher
of them to supply the chip
At power-up, the chip is kept in Reset state until the supply voltage reaches an internal threshold level.
Once the supply voltage is higher than this threshold level, a Reset is executed and registers are loaded
with the Register Reset Values described in section 4.2.2. REGISTER RESET VALUES
After the Reset is executed and registers are loaded with the Register Reset Values, “PON” is set = “1” (bit
5 in Register Control-Status), it needs to be cleared by writing = “0”
Once the supply voltage reaches the oscillator start-up voltage, the oscillator-circuitry starts the 32.768 kHz
“tuning-fork” Crystal typically within 500 ms
Once the 32.768 kHz clocks are present, the Voltage Detector starts in fast mode to monitor the supply
voltage, the accelerated scanning of the supply voltage will slightly increase the current consumption.
When a supply voltage >VLow2 is detected, the fast mode voltage detection is stopped, and the EEPROM
read is enabled
Configuration registers are loaded with the configuration data read from the EEPROM Control Page and
the bits VLow1 and VLow2 are reset = “0”
If the Thermometer is enabled by “ThE” = “1” (bit 1 in register EEPROM_Control), the temperature is
measured and the frequency compensation value for time correction is calculated
The RV-3049 becomes fully functional; the correct Time / Date information needs to be loaded into the
corresponding registers and bit 5 “PON” in Register Control-Status needs to be cleared by writing “0”
Note 1:
During power up, the Low Voltage Detection is monitoring the supply voltage at an accelerated scan rate
increasing the current consumption of the device.
Once power supply voltage exceed VLOW2 threshold, the flags VLOW1 and VLOW2 are cleared and the scan rate for
the low voltage detection is set to 1 second to ensure optimized power consumption.
Note 2:
Please not the different meaning of the “PON”; “VLow1” and “VLow2” Flags:
PON
“PON” Flag is set after Power-Up Reset is executed
 Indicating that time & date information are corrupted
VLow1
VLow1 Flag is set when supply voltage drops below VLow1 threshold
 Indicating that the Thermometer might have been disabled due to low supply voltage and the temperature
compensation was operating for a while with the last temperature reading causing bigger time-deviation
VLow2
VLow2 Flag is set when supply voltage drops below VLow2 threshold
 Indicating a risk that the 32.768 kHz might have stopped due to low supply voltage and that the time & date
information might be corrupted
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Example Power Up sequence, Low Voltage detection and Backup Supply switchover
VDD
Power Supply Voltage
5.0 V
4.0 V
3.0 V
2.0 V
1.0 V
VLOW 1
2.1 V
VLOW 2
1.3 V
0V
VBAT
Battery switchover
when VDD < (VBAT - 50mV)
VBAT
VDD
PON Flag set
at power-up
1
VLOW 1 Flag set
when supply voltage < Vlow1
1
VLOW 2 -flag set
when supply voltage < Vlow2
0
0
1
0
1
1
2
3
4
5
6
7
8
2
3
4
5
6
7
8
Power Up Reset is executed; registers are loaded with Reset Values. PON flag is set at Power up
indicating that time / date information likely are corrupted.
Low voltage detection flags VLOW1 and VLOW2 are automatically cleared.
PON Flag needs to be cleared by software writing “0”.
Trickle charge circuitry for backup battery can be enabled by software.
Switchover to the backup supply voltage when VDD drops below VDD < (VBAT – 20mV).
Low voltage detection sets VLOW1 Flag when supply voltage drops VLOW1 threshold.
Low voltage detection sets VLOW2 Flag when supply voltage drops VLOW2 threshold.
Switchback from backup supply voltage to main supply voltage when VDD rise above VDD > (VBAT + 20mV).
VLOW1 and VLOW2 Flags need to be cleared by software writing “0”.
4.1.2.SUPPLY VOLTAGE OPERATING RANGE AND LOW VOLTAGE DETECTION
The RV-3049 has built-in low supply voltage detection which periodically monitors supply voltage levels vs. V LOW1
and VLOW2 thresholds.
If low supply voltage is detected, the corresponding flags V LOW1 and VLOW2 are set = “1”. Device functions critical to
low supply voltage are disabled.
During power up, the Low Voltage Detection is monitoring the supply voltage at an accelerated scan rate. If power
supply voltage exceed VLOW2 threshold, the flags VLOW1 and VLOW2 are cleared and the scan rate for the low voltage
detection is set to 1 second.
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Minimum Supply Voltage and Low Voltage Detection
2.0 V
VLOW 1
2.1 V
1.0 V
VLOW 2
1.3 V
EEPROM Write
EEPROM
Function
EEPROM Read
3.0 V
Interface active with reduced speed
Fully Operating
4.0 V
Timekeeping not guaranteed
5.0 V
SPI Interface
Function
Interface active
VDD max
5.5 V
Thermomerter inactive, last value frozen
5.5 V
Temperature
Compensation /
Thermometer
Thermomerter active
Supply
Voltage
Timekeeping
Function
Temperature Compensation Operating
VDD
VPROG
2.2 V
0V
At first power-up, the supply voltage has to exceed VLOW1 threshold to enable and correctly setup all function of
the device.
Timekeeping Function:
Keeping track of Time & Date depends on the 32.768kHz oscillator operates safely over the specified
temperature range. Timekeeping function is guaranteed for a supply voltage down to V LOW2 threshold, below this
voltage the 32.768kHz oscillator may stop and the time & date information might be corrupted.
Temperature Compensation:
The Frequency Compensation Unit “FCU” operates with supply voltages down to VLOW2 threshold. The
Thermometer requires a supply voltage of ≥ VLOW1 threshold. Supply voltages below VLOW1 threshold will
automatically disable the Thermometer; the last correct temperature reading is frozen in the register
“Temperature”. The Frequency Compensation Unit continues to operate with the last temperature-reading down
to a supply voltage ≥ VLOW1 threshold.
SPI interface:
The SPI interface operates with max. SCL clock rate down to a supply voltage of ≥ VLOW1 threshold. Between
VLOW1 and VLOW2 threshold, the interface still operates at reduced SCL clock rate.
EEPROM read / write access:
EEPROM read access is possible down to a supply voltage of ≥ VLOW2 threshold.
EEPROM write cycle requires a minimum supply voltage of ≥ VPROG of 2.2V.
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4.2. RESET
A Reset can be initiated by 3 different ways:
 Power On Reset (automatically initiated at power-up)
 Software Reset (can be initiated by software)
 Self-Recovery System Reset (automatically initiated if enabled by Software and possible deadlock is
detected)
4.2.1.POWER-UP RESET, SYSTEM RESET AND SELF-RECOVERY RESET
Power On Reset:
A Reset is automatically generated at Power On. After Power On Reset has been executed, bit 5 “PON” in Register
Control_Status is set = “1”, it needs to be cleared by writing = “0”.
System Reset:
A Software Reset can be initiated when the System-Reset command “SysR” is set =”1” (bit 4 in Register
Control_Reset). If a System-Reset is executed, the “SR” Flag (bit 4 in Register Control_Status) is set = “1”, needs
to be cleared by writing = “0”.
It is generally recommended to make a System Reset by Software after power-up.
Note:
Please consider the Register Reset Values shown in section 4.2.2. After a Reset has been executed, SelfRecovery System “SROn” (bit 4 in Register Control_1) is set = “1” and Self-Recovery INT Enable “SRIE” (bit 4 in
Register Control_INT) is set = “0”.
Self-Recovery System Reset:
A Self-Recovery System Reset will be automatically initiated when the Self-Recovery function is enabled by bit 4
“SROn” in Register Control_1 is set “1” and internally a possible deadlock-state is detected. If a Self-Recovery
System Reset is executed, the bit 4 “SR” in Register Control_Status is set “1” and need to be cleared by writing “0”.
After a Self-Recovery System Reset is executed and Register Reset Values were written, bit 4 “SRF” in Register
Control_INT Flag is set “1” and needs to be cleared by writing “0”.
In case of a Self Recovery System Reset is executed, an Interrupt is available if Self-Recovery-INT function is
Enabled by bit 4 “SRIE” in Register Control_INT is set “1”.
The purpose of the Self Recovery function is to generate an internal System Reset in case the on-chip state
machine goes into a deadlock. The function is based on an internal counter that is periodically reset by the control
logic. If the counter is not reset on time, a possible deadlock is detected and a System Reset will be triggered. The
System Reset is executed latest after 2 temperature- or voltage-monitoring periods defined in Thermometer Period
bit 0 “ThP” in Register EEPROM Control, i.e. latest after 2 or 32 seconds.
Note:
Please consider the Register Reset Values shown in section 4.2.2. After a Reset has been executed, SelfRecovery System bit 4 “SROn” in Register Control_1 = “1” and Self-Recovery INT Enable “SRIE” in Register
Control_INT = “0”.
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4.2.2.REGISTER RESET VALUES
Address
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
1
Control_1
Control_INT
Control_INT Flag
Control_Status
EEbusy
0
X
0
0
1
0
0
0
1
0
0
X
0
0
0
X
0
0
0
X
1
0
0
X
04h
Control_Reset
-
-
-
0
-
-
-
-
000
001
010
011
100
101
110
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
Seconds
Minutes
Hours
Days
Weekdays
Months
Years
-
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
000
001
010
011
100
101
110
10h
11h
12h
13h
14h
15h
16h
Second Alarm
Minute Alarm
Hour Alarm
Days Alarm
Weekday Alarm
Months Alarm
Year Alarm
AE_S
AE_Y
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Timer page
00011
000
001
18h
19h
Timer Low
Timer High
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Temperature page
00100
000
20h
Temperature
X
X
X
X
X
X
X
X
EEPROM User
00101
000
28h
EEPROM User
001
29h
EEPROM User
EEPROM Control page
000
001
010
011
30h
31h
32h
33h
EEPROM Contr.
Xtal Offset
Xtal Coef
Xtal T0
000
:
111
38h
:
User RAM
Page
Bit 7 - 3
Address
Bit 2 - 0
Hex
Control page
000
001
010
011
00h
01h
02h
03h
100
00000
Clock page
00001
Alarm page
00010
00110
RAM page
00111
Function
Bit 7
AE_M
AE_H
AE_D
AE_W
AE_M
2)
1)
3)
2 bytes of EEPROM for user data
0 4)
0 4)
0 4)
0 4)
0 4)
0 4)
1
Factory setting: Xtal frequency deviation
Factory setting: Xtal temperature coefficient
Factory setting: Xtal T0 temperature
4)
0
4)
8 bytes of RAM for user data
3Fh
– bits labelled as – are not implemented.
X bits labelled as X are undefined at power-up and unchanged by subsequent resets.
1)
SRF flag (bit 4 in register Control_INT Flag) will be set = “1” after a Self Recovery System Reset was executed.
2)
PON flag (bit 5 in register Control_Status) will be set = “1” after a Power On Reset was executed.
3)
SR flag (bit 4 in register Control_Status) will be set = “1” after a System or Self recovery Reset was executed.
4)
EEPROM Control default data are set by factory; data might be reprogrammed by customer and will remain unchanged during power down or
any Reset executed.
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After Reset, the following mode is entered:
-
CLKOUT is selected at CLKOUT pin, default frequency is 32.768 kHz defined in register EEPROM
Control
Timer and Timer Auto-Reload mode are disabled; Timer Source Clock frequency is set to 32Hz
Self Recovery function is enabled
Automatic EEPROM Refresh every hour is enabled
24 hour mode is selected, no Alarm is set
All Interrupts are disabled
At Power-On Reset, “PON” Flag is set = “1” and has to be cleared by writing = “0”
At Self-Recovery Reset or System Reset, “SR” Flag is set = “1” and has to be cleared by writing = “0”.
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4.3. EEPROM MEMORY ACCESS
The EEPROM Memory has a built-in automatic EEPROM Refresh function, controlled by “EERE” (bit 3 in register
Control_1). If enabled, this function automatically refreshes the content of the EEPROM Memory Pages once an
hour.
The “EEbusy” will be set = “1” (bit 7 in register Control_Status) if the EEPROM Memory Pages are busy due to
write or automatic refresh cycle is in progress. “EEbusy” goes = “0” when writing is finished, EEPROM Memory
Pages shall only be accessed when not busy, i.e. when “EEbusy” = “0”.
A special EEPROM access procedure is required preventing access collision between the internal automatic
EEPROM refresh cycle and external read / write access through interface.




Set “EERE” = “0”
Automatic EEPROM Refresh needs to be disabled before EEPROM access.
Check for “EEbusy” = “0” Access EEPROM only if not busy
Set “EERE” = “1”
It is recommended to enable Automatic EEPROM Refresh at the end of
read / write access
Write EEPROM
Allow 10ms wait-time after each written EEPROM register before checking for
EEbusy = “0” to allow internal data transfer
Read access:
Write access:
Clear EERE
Disable automatic
EEPROM refresh
EEbusy = 0?
Check if EEPROM is busy?
No
Disable automatic
EEPROM refresh
EEbusy = 0?
Check if EEPROM is busy?
No
Yes
Read EEPROM
Clear EERE
Yes
EEPROM read access
is permitted
Yes
Next read?
Write EEPROM
EEPROM write access
is permitted
Wait
10ms
Wait 10ms to allow
internal EEPROM write
No
Set EERE = 1
Enable automatic
EEPROM refresh
No
EEbusy = 0?
Wait until previous
write cycle is finished
Yes
Yes
Next write?
No
Set EERE = 1
Enable automatic
EEPROM refresh
Note:
A minimum power supply voltage of VPROG = 2.2V is required during the whole EEPROM write procedure; i.e. until
“EEbusy” = “0”.
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4.4. TIMER FUNCTION
The RV-3049 offers different Alarm and Timer functions which allow simply generating highly versatile timingfunctions.
The Countdown Timer is controlled by the register Control_1. Bit 1 “TE” enables the Timer function; bits 5 & 6
“TD0” and “TD1” determine one of 4 Timer Source Clock frequencies (32 Hz, 8 Hz, 1 Hz, or 0.5Hz).
The Timer counts down from a software-loaded 16-bit binary value ,n’, “Timer Low” (bit 0-7 at address 18h) and
“Timer High” (bit 0-7 at address 19h). Values, n’ from 1 to 65536 are valid; loading the counter with ,n’ = “0”
effectively stops the timer. The end of every Timer countdown is achieved when the Timer Counter value ,n’
reaches = “0”.
Countdown Timer can be set in Automatic Reload mode by “TAR” = “1” (bit 2 of register Control_1), the counter
automatically re-loads Timer countdown value, n’ and starts the next Timer period. Automatic reload of the
countdown value ,n’ requires 1 additional timer source clock. This additional timer source clock has no effect on the
first Timer period, but it has to be taken into account since it results in a Timer duration of ,n+1’ for subsequent
timer periods.
The generation of Interrupts from the Countdown Timer function is enabled by “TIE” = “1” (bit 1 in register
Control_INT). If Timer Interrupt is enabled by “TIE” = “1”, the Timer Flag “TF” (bit 1 in register Control_INT Flag) will
be set = “1” at the end of every Timer countdown. The Interrupt signal INT follows the condition of Timer Flag “TF”
(bit 1 in register Control_INT Flag), the INT signal can be cleared by clearing the “TF” = “0”.
Control of the Countdown Timer Functions (address 00h…bits description)
Address
Function
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
00h
Control_1
Clk/Int
TD1
TD0
SROn
EERE
TAR
TE
WE
Bit
Symbol
Value
6
TD1
5
TD0
2
TAR
1
TE
Description
00
Timer Source Clock Frequency: 32 Hz
01
10
11
0
1
0
1
Timer Source Clock Frequency: 8 Hz
Timer Source Clock Frequency: 1 Hz
Timer Source Clock Frequency : 0.5 Hz
Disables Countdown Timer Auto-Reload mode
Enables Countdown Timer Auto-Reload mode
Disables Countdown Timer
Enables Countdown Timer
The Timer Source Clock Frequency “TD0” & “TD1” and the Timer Auto Reload mode “TAR” can only be written
when the Timer is stopped by “TE” = “0” (bit 1 in register Control_1).
The Countdown Timer values in “Timer Low” and “Timer High” can only be written when the Timer is stopped by
“TE” = “0” and Timer Auto Reload mode is disabled “TAR” = “0”.
Register Countdown Timer (addresses 18h / 19h…bits description)
Register 18h is loaded with the low byte of the 16-bit Countdown Timer value ,n’
Register 19h is loaded with the high byte of the 16-bit Countdown Timer value ,n’
Address
Function
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
18h
Timer Low
128
64
32
16
8
4
2
1
19h
Timer High
128
64
32
16
8
4
2
1
Bit
Symbol
Value
18h
Timer Low
xx01 to xxFF
19h
Timer High
00xx to FFxx
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Description
Countdown value = n
Countdown period
28

n
Source Clock Frequency
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Example Countdown Timer function with Timer in Auto Reload mode
In this example, the Countdown Timer is set to Automatic Reload Mode, the Countdown Timer value is set = “3”.
Automatic reload of the countdown value ,n’ requires 1 additional Timer Source Clock. This additional timer
source clock has no effect on the first Timer period but it has to be taken into account since it results in a Timer
duration of ,n+1’ for subsequent timer periods. The Interrupt signal ( INT ) is cleared by clearing the Timer Flag
“TF” = “0”.
1
TE
TAR
Timer Source
Clock Frequency
TD0 / TD1
Countdown Timer
Value
XX
03
02
01
Auto
Reload
03
02
Auto
Reload
01
03
02
TF
INT
TSC
n
n
TSC
n +1
2
3
4
5
3
4
1
Timer Source Clock Frequency TD0 / TD1 can only be modified when Timer is disabled “TE” = “0”
Countdown Timer value ,n’ in “Timer Low” and “Timer High” only can be modified when Timer “TE” = “0”
and Timer Auto Reload “TAR” = “0” are both disabled.
2
Duration of first Timer Period 
3
4
5
n
Source Clock Frequency
The additional timer source clock for automatic reload of the countdown Timer value ,n’ has no effect on
the first Timer Period.
Timer Automatic Reload mode “TAR” requires one Timer Source Clock period for automatic reload of the
Countdown Timer value ,n’.
To reset Interrupt signal ( INT ), Timer Flag “TF” has to be cleared by writing = “0”.
When Countdown Timer is in automatic reload mode, one additional timer source clock has to be taken
into account since it results in a Timer duration of ,n+1’ for subsequent timer periods.
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4.4.1.TIMER INTERRUT
The generation of Interrupts from the Countdown Timer function is enabled by “TIE” = “1” (bit 1 in register
Control_INT). If Timer Interrupt is enabled by “TIE” = “1”, the Timer Flag “TF” (bit 1 in register Control_INT Flag) will
be set = “1” at the end of every Timer countdown.
The Interrupt signal INT follows the condition of Timer Flag “TF” (bit 1 in register Control_INT Flag), the Timer Flag
“TF” and the Interrupt signal ( INT ) remain set until cleared by software writing “TF” = “0”.
Timer Interrupt Control (addresses 01h / 02h…bits description)
Address
Function
01h
Control_INT
bit 1
TIE
02h
Control_INT Flag
bit 1
TF
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
X
X
X
SRIE
V2IE
V1IE
TIE
AIE
0
1
X
0
1
TF is disabled, no Timer Interrupt generated
TF is enabled, Timer Interrupt generated when Countdown Timer value
reaches zero and TF is set “1”
X
X
SRF
V2IF
V1IF
TF
AF
No Timer Interrupt generated
Timer Flag is set “1” when TIE is enabled and Countdown Timer value
reaches zero, TF needs to be cleared to clear INT
Bit positions labelled as “X” are not implemented and will return a “0” when read.
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4.5. ALARM FUNCTION
Every Alarm Register in Alarm Page can be individually enabled by setting bit 7 (AE_x) = “1”. Disabled alarm
registers which have their bit “AE_x” at logic = “0” are ignored.
When one or more of these registers are loaded with a valid second, minute, hour, day, weekday, month or year
information and its corresponding alarm enable bit (AE_x) is logic = ”1”, then that information will be compared with
the current time / date information in Watch Page registers.
Alarm function Blockdiagram
check now signal
SECOND AEN
SECOND ALARM
1
=
0
SECOND TIME
MINUTE AEN
MINUTE ALARM
1
=
0
MINUTE TIME
HOUR AEN
HOUR ALARM
0
0
HOUR TIME
1
1
=
AIE
DAY AEN
INT
DAY ALARM
& AF
1
=
0
DAY TIME
to reset INT,
clear AF by writting = 0
WEEKDAY AEN
WEEKDAY ALARM
1
=
0
WEEKDAY TIME
MONTH AEN
MONTH ALARM
1
=
0
MONTH TIME
YEAR AEN
YEAR ALARM
1
=
0
YEAR TIME
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4.5.1.ALARM INTERRUPT
The generation of Interrupts from the Alarm function is enabled by “AIE” = “1” (bit 0 in register Control_INT).
When all enabled Alarm comparisons first match (wired “AND”) and the Alarm Interrupt is enabled by, the Alarm
Flag “AF” (bit 0 in Register Control_INT Flag) is set to logic = “1”. The Interrupt signal ( INT ) follows the condition of
“AF”.
The Interrupt signal INT follows the condition of Alarm Flag “AF” (bit 0 in register Control_INT Flag), The Alarm
Flag “AF” and the Interrupt signal ( INT ) remain set until cleared by software writing “AF” = “0”.
Once bit “AF” has been cleared, it will only be set again when the time increments and matches the alarm condition
once more.
Alarm Interrupt Control (addresses 01h / 02h…bits description)
Address
01h
Function
Control_INT
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
X
X
X
SRIE
V2IE
V1IE
TIE
AIE
0
0
02h
AIE
1
Control_INT Flag
X
0
0
AF
1
AF is disabled, no Alarm Interrupt generated
AF is enabled, AF is set “1”and Alarm Interrupt generated when all
enabled Alarm comparisons first match
X
X
SRF
V2IF
V1IF
TF
AF
No Alarm Interrupt generated
Alarm Flag is set “1” when all enabled Alarm comparisons first match,
needs to be cleared to clear INT
Bit positions labelled as “X” are not implemented and will return a “0” when read.
Example for Alarm Flag and Alarm INT
MINUTE AEN
whenand
usingset
theto
minute
alarmno
and
no other
interrupts
are enabled
Example where “Minute Alarm” Example
is enabled
45 and
other
Alarm
is enabled.
If bit AIE is enabled, the INT pin follows the condition of bit 0 “AF” in register Control_INT Flag at address 02h.
1
0
HOUR AEN
minutes counter
44
minute alarm
45
45
46
1
0
set alarm flag,
AF
DAY AEN
1
0
AF
WEEKDAY AEN
1
INT when AIE = 1
0
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4.6. INTERRUPT OUTPUT INT
An active LOW Interrupt signal is available at INT pin.
The INT is an open-drain output and requires a pull-up resistor to VDD.
Interrupts may be sourced from five places:





Alarm function
Countdown Timer function
VLOW1 detection
VLOW2 detection
System Reset function
All Interrupt signals follow the condition of their corresponding flags in the bits 0 to 4 of register Control_INT Flag at
address 02h.
Alarm Interrupt:
Generation of Interrupts from the Alarm function is enabled via “AIE” = “1” (bit 0 in register Control_INT). If “AIE” is
enabled, the INT pin follows the condition of Flag “AF” (bit 0 in register Control_INT Flag). To clear Interrupt signal
( INT ), the corresponding flag “AF” needs to be cleared by writing = “0”, clearing “AF” will immediately clear INT .
Timer Interrupt:
Generation of Interrupts from the Countdown Timer is enabled via “TIE” = “1” (bit 1 in register Control_INT). If “TIE”
is enabled, the INT pin follows the condition of Flag “TF” (bit 1 in register Control_INT Flag). To clear Interrupt
signal ( INT ), the corresponding flag “TF” needs to be cleared by writing = “0”, clearing “TF” will immediately clear
INT .
VLOW1 Interrupt:
Generation of Interrupts from the Voltage Low 1 detection is enabled via “V1IE” = “1” (bit 2 in register Control_INT).
If “V1IE” is enabled, the INT pin follows the condition of Flag “V1IF” (bit 2 in register Control_INT Flag). To clear
Interrupt signal ( INT ), both corresponding flags “V1IF” (bit 2 in register Control_INT Flag) and “V1F” (bit 2 in
register Control_Status) need to be cleared by writing = “0”.
VLOW2 Interrupt:
Generation of Interrupts from the Voltage Low 2 detection is enabled via “V2IE” = “1” (bit 3 in register Control_INT).
If “V2IE” is enabled, the INT pin follows the condition of Flag “V2IF” (bit 3 in register Control_INT Flag). To clear
Interrupt signal ( INT ), both corresponding flags “V2IF” (bit 3 in register Control_INT Flag) and “V2F” (bit 3 in
register Control_Status) need to be cleared by writing = “0”.
System Reset Interrupt:
Generation of Interrupts from the System Reset function is enabled via “SRIE” = “1” (bit 4 in register Control_INT).
If “SRIE” is enabled, the INT pin follows the condition of Flag “SRF” (bit 4 in register Control_INT Flag). To clear
Interrupt signal ( INT ), both corresponding flags “SRF” (bit 4 in register Control_INT Flag) and “SR” (bit 4 in register
Control_Status) need to be cleared by writing = “0”.
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4.7. WATCH ENABLE FUNCTION
The function Watch Enable function “WE” (bit 0 in register Control_1) enables / disables the 1 Hz clock for the
watch function. After power-up reset, the bit “WE” is automatically set = “1” and the 1 Hz clock is enabled.
Setting “WE” = “0” stops the watch-function and the time circuits can be set and will not increment until the stop is
released. Setting “WE” = “1” allows for accurate start of the time circuits triggered by an external event.
“WE” will not affect the clock outputs at CLKOUT.
4.8. SELF-RECOVERY SYSTEM
The purpose of the Self-Recovery System is to automatically generate an internal Reset in case the on-chip state
machine goes into a deadlock. A possible source for such a deadlock could be disturbed electrical environment like
EMC problem, disturbed power supply or any kind of communication issues on the SPI interface.
The function of the Self-Recovery System is based on internal counter that is periodically reset by the Control
Logic. If the counter is not reset in time, a Self-Recovery Reset will be executed, at the latest after 2 thermometer
scanning interval periods, i.e. 2 or 32 seconds.
The Self-Recovery System is enabled / disabled by “SROn ” (bit 4 in register Control_1), it is automatically enabled
“SROn” = “1” after power-up by the register reset values, see section 4.2.2. REGISTER RESET VALUES.
Thermometer scanning interval is defined with “ThP” (bit 0 in register EEPROM_Control).
Generation of Interrupts from the System Reset function is enabled via “SRIE” = “1” (bit 4 in register Control_INT).
If “SRIE” is enabled, the INT follows the condition of Flag “SRF” (bit 4 in register Control_INT Flag). To clear
Interrupt signal ( INT ), both corresponding flags “SRF” (bit 4 in register Control_INT Flag) and “SR” (bit 4 in register
Control_Status) need to be cleared by writing = “0”.
During Self-Recovery or System Reset, the internal logic is reset and registers are loaded with the Register Reset
Values shown in section 4.2.2., Watch / Alarm and Timer information are not affected.
After Self-Recovery Reset, “SRF” is set = “1” (bit 4 in Register Control_INT Flag), indicating that an automatic
Self-Recovery System Reset has been executed.
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4.9. CLOCK OUTPUT CLKOUT
The internal reference frequency is generated by the oscillator-circuitry operating a 32.768 kHz “Tuning-Fork”
Quartz Crystal.
A programmable square wave is available at CLKOUT pin. Frequencies of 32.768 kHz, 1024 Hz, 32 Hz or 1 Hz can
be generated for use as a system clock, microcontroller clock, input to a charge pump or for test purposes.
The duty cycle of the selected clock is not controlled. However, due to the nature of the clock generation, all
frequencies will be 50:50 except the 32.768 kHz.
The frequency 32.768 kHz is clocked directly from the oscillator-circuitry, as a consequence of that, this frequency
does not contain frequency compensation clock pulses. The frequencies 1024 / 32 / 1 Hz are clocked from the
prescaler and contain frequency compensation clock pulses.
Operation is controlled by the bits “FD1” / “FD0” (bit 2 & 3 in the register EEPROM Control).
If “Clk/Int” is = “1” (bit 7 in register Control_1), CLKOUT pin becomes a push-pull CLKOUT output and can be
enabled / disabled with the CLKOE pin. When disabled with CLKOE pin = “low”, the CLKOUT output is pulled low.
Register EEPROM Control FD0 / FD1 CLKOUT Frequency Selection (address 30Eh…bits description)
Address
30h
Bit
3 to 2
1)
Function
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
EEPROM Control
R80k
R20k
R5k
R1k
FD1
FD0
ThE
1
3
2
CLKOUT Frequency
FD1
FD0
[Hz]
Typ. Duty Cycle
0
0
32768
40:60 to 60:40
0
1
1024
50:50
Directly from 32.768kHz oscillator
circuitry, without freq. compensation
With frequency compensation
1
0
32
50:50
With frequency compensation
1
1
1
50:50
With frequency compensation
%1)
Remarks
Duty cycle definition: % HIGH-level time : % LOW-level time
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5. COMPENSATION OF FREQUENCY DEVIATION AND FREQUENCY DRIFT vs
TEMPERATURE
There is a Thermometer and a Frequency Compensation Unit “FCU” built-in the RV-3049.
Based on all known tolerances and the measured ambient temperature, this Frequency Compensation Unit “FCU”
is calculating every 32 seconds a Frequency Compensation Value. The frequency compensation itself is achieved
by adding or subtracting clock-pulses to the 32.768 kHz reference clock, one compensation period takes 32
seconds.
All required parameters for frequency compensation are factory calibrated and should not be modified to profit from
best time accuracy.
Frequency deviations affecting the time accuracy of Real Time Clocks:
XTAL offset:
XTAL T0:
XTAL temp. coefficient:
Xtal’s frequency deviation ±20 ppm @ 25°C
Xtal’s turnover temperature 25°C ±5°C
2
Xtal’s frequency drift vs temperature -0.035 ppm * (T-T0) ±10%
5.1. TEMPERATURE CHARACTERISTICS TUNING FORK CRYSTAL
Typical Frequency Deviation of a 32.768 kHz Tuning Fork Crystal over Temperature
20.0
T0 = 25°C (±5)
0.0
-20.0
ΔF/F [ppm]
-40.0
-60.0
-0.035 ppm * (T-T0)2 (±10%)
-80.0
-100.0
-120.0
-140.0
-160.0
-180.0
-60
-40
-20
0
20
40
60
80
100
T [°C]
Above graph shows the typical frequency-deviation of a 32.768kHz “Tuning-Fork” Crystal over temperature.
The parabolic curve is specified in terms of turnover temperature “T 0” and the quadratic thermal coefficient “β”.
T0: turnover temperature 25°C ±5°C
nd
2
Β: 2 order temperature coefficient -0.035 ppm * (T-T0) ±10% (quadratic thermal coefficient)
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5.2. COMPENSATION PRINCIPLE
The Frequency Compensation Unit “FCU” is calculating every 32 seconds a Frequency Compensation Value
based on individual device data:




XTAL offset:
XTAL T0:
XTAL temp. coefficient:
Temperature:
Device individual frequency deviation ±20ppm @ 25°C
Xtal’s turnover temperature 25°C ±5°C
2
Xtal’s frequency drift vs. temperature -0.035 ppm * (T-T0) ±10%
Measured ambient temperature
Calculating the Anticipated Frequency Deviation and the Time Compensation Value
400
Calculated Time
Compensation Value
350
300
250
200
150
Δf/f [ppm]
100
XTAL OFFSET
Δf/f = +/-20 ppm
50
0
-50
-100
XTAL T0
T0 = 25°C (+/-5°C)
-150
-200
-250
XTAL Temperature Coefficient
2
Δf/f [ppm] = -0.035 * (Tamb-T0) (+/-10%)
-300
-350
-400
-50
-40
-30
-20
-10
0
10
20
30
40
50
60
70
80
90
100
110
120
130
140
Temperature [°C]
Note:
The 32.768 kHz frequency is adjusted according to the calculated Time Compensation value.
The compensation itself is achieved by adding or subtracting clock-pulses to the 32.768 kHz reference clock.
One complete compensation period takes 32 seconds.
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5.2.1.THERMOMETER AND TEMPERATURE VALUE
The function of the Thermometer is controlled by “ThP” and “ThE” (bit 0 & bit 1 in the register EEPROM Control).
Register EEPROM Control Thermometer Control (address 30h…bits description)
Address
Function
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
30h
EEPROM Control
R80k
R20k
R5k
R1k
FD1
FD0
ThE
ThP
Bit
Symbol
Value
1
ThE
0
ThP
Description
0
Disable Thermometer
1
0
1
Enable Thermometer
Thermometer scanning interval: 1 second
Thermometer scanning interval: 16 seconds
The measured temperature value is stored in the register “Temperature” at address 20h.
The measured temperature is binary coded ranging from -60°C (=0d) to +190°C (=250d).
Example: Temperature of 0°C corresponding to a content of = 60d.
The thermometer has a resolution of 1°C per LSB; the typical accuracy is +/-4°C within the temperature range
-40°C to +125°C. The Thermometer is automatically disabled if status bit “Vlow1” is set = “1”, the result of the last
temperature measurement is frozen in register “Temperature” and the frequency compensation continues working
with this last temperature reading.
The actual temperature value can be read from register “Temperature” at address 20h. The Thermometer has to be
disabled by ThE = “0” to externally write a temperature value into the register “Temperature” at address 20h.
Temperature Value (address 20h…bits description)
Address
20h
Temperature
Function
Temperature
Value hex
Bit 7
128
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
64
32
16
8
4
2
These bits hold the Temperature Value coded in binary format
1
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
-60°C
-59°C
00h
01h
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0°C
3Ch
0
0
1
1
1
1
0
0
194°C
195°C
FEh
FFh
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
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5.2.2.SETTING THE FREQUENCY COMPENSATION PARAMETERS
In order to achieve best time accuracy, correct parameters have to be stored into the corresponding registers of the
EEPROM Control page.
Attention: these parameters are factory calibrated, it is recommended not to modify these register values.
XTAL Offset (address 31h…bits description)
Address
Function
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
31h
XTAL Offset
sign
64
32
16
8
4
2
1
Bit
Symbol
7
6 to 0
Sign
XTAL Offset
Value
0
1
0 to 121
Description
- Deviation (slower) of 32.768kHz frequency at T0
+ Deviation (faster) of 32.768kHz frequency at T0
Frequency Offset Compensation value
The register value “XTAL Offset” is used by the Frequency Compensation Unit “FCU” to compensate the initial
frequency deviation of the 32.768 kHz clock at the crystal’s turnover temperature “XTAL T0”.
The required register value “XTAL Offset” is calculated as follow:
XTAL Offset = XtalOFFSET x 1.05
XTAL COEF Temperature Coefficient (address 32h…bits description)
Address
32h
XTAL Coef
Bit
Symbol
7 to 0
1)
Function
XTAL Coef1)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
128
64
32
16
8
4
2
1
Value
Description
0 to 255
Quadratic Coefficient of XTAL’s Temperature Drift
Reference
The factory programmed register value XTAL Coef may also contain thermometer error compensation.
The register value “XTAL Coef” is used by the Frequency Compensation Unit “FCU” to compensate the frequency
nd
deviation caused by 2 order temperature coefficient of the 32.768 kHz crystal (frequency drift vs temperature).
The required register value “XTAL Coef” is calculated as follow:
XTAL Coef = XtalTEMPERATURE COEFFICIENT x 4096 x 1.05
XTAL T0 Turnover Temperature (address 33h…bits description)
1)
Address
Function
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
33h
XTAL T0
x
x
32
16
8
4
2
1
Bit
Symbol
Value
7 to 6
x
5 to 0
XTAL T01)
4 to 67
Description
Reference
unused
XTAL’s Turnover Temperature in °C
The factory programmed register value XTAL T0 may also contain thermometer error compensation.
The register value “XTAL T0” is used by the Frequency Compensation Unit “FCU” to compensate the frequency
deviation caused by the turnover temperature T0 of the 32.768 kHz crystal.
The required register value “XTAL T0” is calculated as follow:
XTAL T0 = XtalTURNOVER TEMP T0 - 4
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5.3. METHOD OF COMPENSATING THE FREQUENCY DEVIATION
The Frequency Compensation Unit (FCU) calculates every 32 seconds the compensation factor needed to obtain
accurate time information. The compensation is made by adding or subtracting correction clocks to the 32.768 kHz
reference frequency at the first stage of the frequency divider chain, thereby changing the period of a single
second.
Extra clocks are added for to speed-up the timing, subtracting clocks to slow-down the timing.
Clock
32.768 kHz
2
Compensation
„slow clock“
Compensation
„fast clock“
1
2
1
If 32.768 kHz Clock too fast: then 32.768kHz clocks are suppressed to obtain a compensated and
accurate RTC timing.
If 32.768 kHz Clock too slow: then extra correction clocks are added to obtain a compensated and
accurate RTC time.
Each compensation period takes 32 seconds. Correction clocks are periodically applied during one complete
compensation period. Within a compensation period of 32 seconds, one correction clock will compensate the time
information by ±1 ppm.
1
1
1
Time deviation
Time compensation periode = 32 seconds
1
+
1
1
1
-
Time compensation cycle 32 seconds: within a time compensation cycle of 32 seconds, the required
numbers of 32.768kHz clocks are periodically suppressed (or added) to compensate the anticipated
deviation of 32.768kHz reference clock.
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Effect of correction clocks:




CLKOUT 32.768 kHz:
CLKOUT 1024 / 32 / 1 Hz:
Timer / INT Output:
Time / Date
not affected, this frequency is not compensated
affected, these frequencies are compensated
affected; the internal Timer Source Clocks are compensated
affected; time & date information are compensated
5.3.1.CORRECT METHOD FOR TESTING THE TIME ACCURACY
The compensation method of adding or subtracting correction clocks is changing the period of a single second;
therefore the duration of single seconds may vary within a compensation cycle of 32 seconds.
For a test result correctly representing the time accuracy of the RTC module, it is mandatory to measure the device
during one complete compensation cycle of 32 seconds.
When the device is tested over a shorter period of time, an error will be caused by the test method and shall be
considered for interpretation of the test-results:
Measuring Time
1 second
2 seconds
4 seconds
8 seconds
32 seconds
Resolution of Compensation Method
± 1 clock (32.768 kHz)
± 1 clock (32.768 kHz)
± 1 clock (32.768 kHz)
± 1 clock (32.768 kHz)
± 1 clock (32.768 kHz)
Test Error / Deviation per Day
± 30.5 ppm / ± 2.7 sec. per day
± 15.3 ppm / ± 1.3 sec. per day
± 7.7 ppm / ± 0.7 sec. per day
± 3.9 ppm / ± 0.4 sec. per day
represents real performance
5.3.2.TESTING THE TIME ACCURACY USING CLKOUT OUTPUT
The simplest method to test the time accuracy of the Frequency Compensation Unit (FCU) is by measuring the
compensated frequencies at the CLKOUT pin.
Enable temperature compensation:


Select scanning interval 1 s:
Enable thermometer:
set “ThP” = “0” (bit 0 register EEPROM Control)
set “ThE” = “1” (bit 1 register EEPROM Control)
Select compensated frequency at CLKOUT:

Set CLKOUT frequency:
set “FD0” / “FD1” (bits 1&3 register EEPROM Control) to select
CLKOUT frequency = 1024Hz or alternatively 1Hz
Measuring equipment and setup:


Use appropriate frequency counter:
Correct setup:
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for example Agilent A53132A Universal Counter
set gate time to 32 seconds (one complete compensation cycle)
to measure frequency and calculate time deviation upon the
measured frequency deviation
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5.3.3.TESTING THE TIME ACCURACY USING INTERRUPT OUTPUT 1 Hz
The internal Countdown Timer can be used to generate a 1 Hz test signal at the INT output. However, this
procedure is more complicated than using CLKOUT, therefore the following instructions shall be read carefully to
avoid mistakes.
Enable temperature compensation:


Select scanning interval 1 s:
Enable thermometer:
set “ThP” = “0” (bit 0 register EEPROM Control)
set “ThE” = “1” (bit 1 register EEPROM Control)
Set appropriate test condition using Countdown Timer & 1 Hz INT Output:


Disable Timer:
Disable Timer Auto-Reload Mode:
set “TE” = “0” (bit 1 register Control_1)
set “TAR” = “0” (bit 2 register Control_1)
Timer & Timer Auto Reload Mode needs to be disabled to allow changes in settings of the Timer Source Clock and
Countdown Timer value.


Set Timer Source Clock = 8 Hz:
Set Countdown Timer Value n = 7:



Enable Timer Interrupt:
Set Timer in Auto-Reload Mode:
Enable Timer:
set “TD0” = “1“& “TD1” = “0” (bit 5&6 register Control_1)
set register “Timer Low” = 07h (bit 0-7 register Timer Low)
set register “Timer High” = 00h (bit 0-7 register Timer High)
set “TIE” = “1” (bit 1 register Control_INT)
set “TAR” = “1” (bit 2 register Control_1)
set “TE” = “1” (bit 1 register Control_1)
Prepare MCU Software Driver to clear INT signal:

MCU clears INT signal:
clear INT by setting “TF” = “0” (bit 1 register Control_INT Flag)
Measuring equipment and setup:



Use appropriate frequency counter:
Gate time:
Trigger to negative slope:
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for example Agilent A53132A Universal Counter
set gate time to 32 seconds (one complete compensation cycle)
set trigger to falling edge (negative slope)
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1 Second
1
INT
CE
SCL
SDO
VDD
SDI
RV-3049
INT
MCU
1
2
2
INT Output is active LOW.
That means the falling edge of the INT signal is generated by the RV-3049.
When testing the time-accuracy by using INT signal it is mandatory to trigger on the falling edge of the
Interrupt signal.
The rising edge of the INT signal is generated when the MCU clears the Interrupt signal by software.
The timing of the rising edge depends on the MCU and must not be used to test the time-accuracy.
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5.4. TIME ACCURACY OPT: A / OPT: B
Option A: parts individually calibrated over the temperature range
To obtain the best possible accuracy over the temperature-range, Option A parts are individually calibrated over
the entire temperature range.
XTAL offset:
XTAL T0:
XTAL temp. coefficient:
Thermometer error:
Frequency deviation @ 25°C
Turnover temperature
Frequency drift vs temperature
Thermometer accuracy
Individually compensated
Individually calibrated over temperature
Individually calibrated over temperature
Individually acquired over temperature,
correction value individually embedded
in XTAL parameters
Every part RV-3049 Opt: A is individually measured over the temperature range to derive thermometer’s and
crystal’s characteristics over the temperature range in order to achieve optimized time accuracy. Based on the
temperature data, frequency correction values are calculated and individually programmed into the
corresponding EEPROM register by the factory.
Below chart shows the time deviation of 30 tested devices over the temperature range of 30 individually
calibrated RTC’s (Opt: A) after the components were reflow soldered onto a PCB, the red dotted line shows the
specified time accuracy for Option: A devices.
Option A:
Temperature range
25°C
0°C to + 50°C
-10°C to + 60°C
-40°C to + 85°C
-40°C to +125°C
Time deviation
±3 ppm = ±0.26 seconds per day
±4 ppm = ±0.35 seconds per day
±5 ppm = ±0.44 seconds per day
±6 ppm = ±0.52 seconds per day
±8 ppm = ±0.70 seconds per day
Option: A (calibrated)
Time Deviation vs. Temperature
12.0
10.0
8.0
6.0
Δ t/t [ppm]
4.0
2.0
0.0
-2.0
-4.0
-6.0
-8.0
-10.0
-12.0
-50
-40
-30
-20
-10
0
10
20
30
40
50
60
70
80
90
Temperature [°C]
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Option B: parts individually calibrated based on generic temperature data
The Option: B devices are designed for an optimized trade off accuracy vs cost. Option B parts are individually
programmed to compensate the frequency deviation at 25°C but using generic batch data to compensate the
crystal’s temperature characteristics. Option B parts offer a good time accuracy at little cost.
XTAL offset:
XTAL T0:
XTAL temp. coefficient:
Thermometer error:
Frequency deviation @ 25°C
Turnover Temperature
Frequency drift vs temperature
Thermometer accuracy
Individually compensated
Compensated with generic batch data
Compensated with generic batch data
Individually acquired at 25°C,
correction value individually embedded
in XTAL parameters
Samples of RV-3049 Opt: B parts are individually measured over the temperature range to derive the generic
batch data for the thermometer’s and crystal’s characteristics over the temperature range. Based on the
temperature data, frequency correction values are calculated and individually programmed into the
corresponding EEPROM register by the factory.
Below chart shows the time deviation of 30 tested devices over the temperature-range of individually calibrated
RTC’s (Opt: B) after the components were reflow soldered onto a PCB, the red dotted line shows the specified
time accuracy for Option: B devices.
Option B:
Temperature range
25°C
0°C to + 50°C
-10°C to + 60°C
-40°C to + 85°C
-40°C to +125°C
Time deviation
± 3 ppm = ±0.26 seconds per day
± 5 ppm = ±0.44 seconds per day
±10 ppm = ±0.87 seconds per day
±25 ppm = ±2.17 seconds per day
±30 ppm = ±2.60 seconds per day
Option: B (default)
Time Deviation vs. Temperature
30
25
20
15
Δ t/t [ppm]
10
5
0
-5
-10
-15
-20
-25
-30
-50
-40
-30
-20
-10
0
10
20
30
40
50
60
70
80
90
Temperature [°C]
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6. SPI INTERFACE
SPI Interface connects Master and one or multiple Slave devices. Data transfer to and from the devices is made via
a 4-wire (3-wire) SPI bus. The four lines are: Chip Enable (CE), Serial-CLock (SCL), Serial-Data-Output (SDO) and
Serial-Data-Input (SDI).
The chip enable signal CE is used to enable the considered device and to identify the transmitted data.
The data lines for input and output are split into two separate lines. However, the Data-Input SDI and Data-Output
SDO lines can be connected together to facilitate a bidirectional data bus in single wire mode.
6.1. SPI INTERFACE SYSTEM CONFIGURATION
SPI Serial Interface
Symbol
Function
Description
SCL
Serial Clock Input
SDI
Serial Data Input
SDO
Serial Data Output
CE
Chip Enable input
Serial Clock Input pin; this Input may float when CE is LOW (inactive), may be higher than VDD
Serial Data Input pin; this Input may float when CE is LOW (inactive), may be higher than V DD; input
data is sampled on the rising edge of SCL
Serial Data Output pin; push-pull drives from VSS to VDD; high-impedance when not driving; can be
connected to SDI for single-wire data line, output data is changed on the falling edge of SCL
Chip Enable input active HIGH but may not be wired permanently HIGH, with internal 100 kΏ pull-down
resistor, when LOW the interface is reset.
SDI / SDO Configurations
two wire mode
single wire mode
SDI
SDI
SDO
SDO
Note:
The data lines for input and output are split into two separate lines, however, the Data-Input SDI and Data-Output
SDO lines can be connected together to facilitate a bidirectional data bus in single wire mode.
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Application Diagram
Pull-up Resistor
tr
R=
Cbus
VDD
CE (Device A)
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INT
VDD
VDD
INT
INT
SCL
SDI
SDO
CE
SPI-Bus
Device A
RV-3049
SCL
SDI
SDO
CE
multiple devices may share
common SPI bus lines
SCL / SDI / SDO / INT
CE (RV-3049)
SCL
SDI
SDO
CE
SPI-Bus
Master
INT
CE
CE
SDI
SDO
SCL
VDD
VDD
SPI-Bus
Device X
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6.2. SPI INTERFACE DATA TRANSMISSION
The data transmission is controlled by the active HIGH chip enable signal CE. The data transfer is initiated by the
Master by raising the chip enable signal CE of the considered Slave device to “1”.
At the beginning of SPI bus data transmission, a copy of the content of the addressed Watch, Alarm, Timer and
Temperature registers is stored into a cache memory. During read / write operation, data are provided from this
cache memory.
To prevent faulty reading, data in the cache memory are kept stable until the SPI bus data transmission is
terminated. When the Master is pulling the CE to “0”, the content of the modified registers in the cache memory are
copied back into the corresponding Watch, Alarm, Timer and Temperature registers.
Each data transfer is a byte, with the Most Significant Bit (MSB) sent first. The first byte transmitted is the
Command Byte, defining the address of the first register to be accessed and the read or write mode.
One data bit is transferred during each SCL clock pulse. Data are sampled on the rising edge of the SCL clock and
internally transferred on the falling edge of the SCL clock. In idle mode, SCL shall be LOW.
The register address (within the same page) will automatically increment after transmission of every byte. The page
address remains unchanged until data transfer is stopped and a new data transfer is initiated. Therefore, CE must
return LOW before a new data transfer can be executed.
Data transfer is terminated by the Master by pulling the chip enable CE of the addressed Slave device to “0”.
Data Transfer Overview
Command byte
Data
Data (byte)
Data (byte)
Data (byte)
CE
Chip Enable
6.2.1.COMMAND BYTE DEFINITION
Bit
7
Symbol
Value
R/W
Data read or write selection
0
Write data; master writes data on the SDI line
1
6 to 3
PA
-0xxx
2 to 0
RA
000
111
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Description
Read data; RV-3049 writes data on the SDO line
Page Address; the not transmitted bit 7 of the page address is set internally
to = “0”
Register Address; will be automatically incremented after transmission of
each byte
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6.2.2.SPI INTERFACE READ / WRITE EXAMPLES
Serial bus read example (reading the Seconds register address 08h and Minutes register address 09h)
Data Byte
Data Byte
Seconds data 11BCD
Minutes data 06BCD
Command Byte
Read
08 Hex
Page Address
R/W
b7
1
b6
0
b5
0
b4
0
Register Address
b3
1
b2
0
b1
0
b0
0
b7
0
B6
0
b5
0
b4
1
b3
0
b2
0
b1
0
b0
1
b7
0
b6
0
b5
0
b4
0
b3
0
b2
1
b1
1
b0
0
SCL
SDI
High Z
High Z
SDO
CE
address
counter
XX
1
08h
09h
2
0Ah
3
3
1
CE goes “High”:
2
After sending Command Byte: the command byte sets the RV-3049 in “Read Mode”, the SDO pin
becomes active. The Page & Register address to 08h (Clock page;
Seconds register).
3
4
4
transmission starts. SPI interface of the RV-3049 is enabled.
After reading Data Byte:
after transmission of every data byte, the register address is
automatically incremented.
CE goes “Low”:
transmission stops. SPI Interface of the RV-3049 is disabled, SDO
becomes High-Z.
Note:
In this example, the Seconds and Minutes registers are read. Pins SDI and SDO are not connected together; in this
configuration it is important that SDI pin is never left floating. It always must be driven either HIGH or LOW. If pin
SDI is left open, high IDD currents may result; short transition periods in the order of 200 ns will not cause any
problems.
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Serial bus write example (Seconds register set to 45 seconds, Minutes register set to 10 minutes)
Data Byte
Data Byte
Seconds data 45BCD
Minutes data 10BCD
Command Byte
Write
08 Hex
Page Address
R/W
b7
0
b6
0
b5
0
b4
0
Register Address
b3
1
b2
0
b1
0
b0
0
b7
0
B6
1
b5
0
b4
0
b3
0
b2
1
b1
0
b0
1
b7
0
b6
0
b5
0
b4
1
b3
0
b2
0
b1
0
b0
0
SCL
SDI
High Z
SDO
High Z
CE
address
counter
XX
1
08h
09h
2
0Ah
3
3
4
1
CE goes “High”:
2
After sending Command Byte: the command byte sets the RV-3049 in “Write Mode”, the SDO pin
remains in High-Z mode. The Page & Register address are set to 08h
(Clock page; Seconds register).
3
4
transmission starts. SPI interface of the RV-3049 is enabled.
After writing Data Byte:
after writing of every data byte, the register address is automatically
incremented.
CE goes “Low”:
transmission stops. SPI Interface of the RV-3049 is disabled, SDO
remains High-Z.
Note:
In this example, the Seconds and Minutes registers are written. Pins SDI and SDO are not connected together,
since the device is accessed in write mode the SDO line remains High-Z during the whole transmission.
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7. ELECTRICAL CHRACTERISTICS
7.1. ABSOLUTE MAXIMUM RATINGS
In accordance with the Absolute Maximum Rating System IEC 60134
PARAMETER
SYMBOL
Supply voltage
Supply current
Input voltage
VDD
IDD ; ISS
VI
>GND / <VDD
VDD Pin
Input Pin
GND -0.3
-50
GND -0.3
+6.0
+50
VDD +0.3
Output voltage
VO
INT / CLKOUT
GND -0.5
VDD +0.5
V
-10
-10
+10
+10
300
+125
+125
±2000
±300
200
mA
mA
mW
°C
°C
V
V
mA
DC Input current
DC Output current
Total power dissipation
Operating ambient temperature range
Storage temperature range
II
IO
PTOT
TOPR
TSTO
Electro Static Discharge voltage
VESD
Latch-up current
ILU3)
CONDITIONS
Stored as bare product
HBM1)
MM2)
MIN.
MAX.
-40
-55
UNIT
V
mA
V
1)
HBM: Human Body Model, according to JESD22-A114.
MM: Machine Model, according to JESD22-A115.
3)
Latch-up testing, according to JESD78.
2)
Stresses above these listed maximum ratings may cause permanent damage to the device. Exposure beyond
specified operating conditions may affect device reliability or cause malfunction.
7.2. FREQUENCY AND TIME CHARACTERISTICS
VDD= 3.0 V; VSS= 0 V; Tamb= +25°C; fOSC= 32.768 kHz
PARAMETER
SYMBOL
CONDITIONS
TYP.
MAX.
UNIT
+/-10
+/-20
ppm
+/-0.5
+/-1.0
ppm/V
32.768 kHz Oscillator Characteristics
Frequency accuracy
Δf/f
Frequency vs. voltage characteristics
Δf/(fΔV)
Frequency vs. temperature characteristics
Δf/TOPR
Turnover temperature
Aging first year max.
TO
Δf/f
Oscillator start-up voltage
VStart
Oscillator start-up time
TStart
CLKOUT duty cycle
FCLKOUT = 32.7678 kHz
Tamb
= +25°C
VDD
= 3.0 V
Tamb = +25°C
VDD = 1.4 V to 5.5 V
TOPR = -40°C to +125°C
VDD = 3.0 V
Tamb = +25°C
Tamb = +25°C
TStart < 10 s
Tamb = -40°C to +85°C
Tamb = -40°C to +125°C
FCLKOUT = 32.7678 kHz
TAMB = +25°C
-0.035ppm/°C2 (TOPR-T0)2
(+/-10%)
+25
20 - 30
+/-3
1.0
ppm
°C
ppm
V
0.5
1
3
3
s
50
40/60
%
+/-1
+/-2
+/-3
+/-4
+/-5
+/-1
+/-3
+/-5
+/-10
+/-15
+/-3
+/-4
+/-5
+/-6
+/-8
+/-3
+/-5
+/-10
+/-25
+/-30
Time accuracy, DTCXO Digitally Temperature Compensated
Time accuracy Opt: A
Δt/t
Time accuracy Opt: B
Δt/t
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Tamb
Tamb
Tamb
Tamb
Tamb
Tamb
Tamb
Tamb
Tamb
Tamb
51
= +25°C
= 0°C to +50°C
= -10°C to +65°C
= -40°C to +85°C
= -40°C to +125°C
= +25°C
= 0°C to +50°C
= -10°C to +65°C
= -40°C to +85°C
= -40°C to +125°C
ppm
ppm
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7.3. STATIC CHARACTERISTICS
VDD= 1.4 V to 5.5 V; VSS= 0 V; Tamb= -40°C to +125°C; fOSC= 32.768 kHz
PARAMETER
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNIT
1.4
5.5
V
3.0
1.8
1.0
5.5
2.1
1.4
V
V
V
Supplies
Supply voltage
VDD
Minimum supply voltage detection
Minimum supply voltage detection
Main Supply to Backup Supply
Switchover Hysteresis
VLOW1
VLOW2
Time-keeping mode
SPI bus reduced speed
SPI bus full speed
Tamb = -40°C to +125°C
Tamb = -40°C to +125°C
VHYST
VDD to VBACK = 3.0 V
Supply current
SPI bus inactive
CLKOUT disabled
VBACK = 0 V
or
VDD = 0 V
IDD
(VBACK = 0 V)
or
IBACK
(VDD = 0 V)
Supply current
SPI bus active
CLKOUT disabled
IDD
Current consumption
SPI bus inactive
CLKOUT = 32.768kHz,
CLOAD = 7.5pF
Inputs
LOW level input voltage
HIGH level input voltage
Input leakage current
IDD32K
VDD = 5.0V
VDD = 3.3V
VDD = 1.4V
VIL
VIH
VDD = 1.4 V to 5.0V
VSS > VI < VDD
IL
Input capacitance
Outputs
CI
HIGH level output voltage
VOH
LOW level output voltage
VOL
HIGH level output current
LOW level output current
IOH
IOL
Output leakage current
ILO
Operating Temperature Range
Operating temperature range
20
VDD = 1.4 V
Tamb = -40°C to +85°C
VDD = 1.4 V
Tamb = -40°C to +125°C
VDD = 3.3 V
Tamb = -40°C to +85°C
VDD = 3.3 V
Tamb = -40°C to +125°C
VDD = 5.0 V
Tamb = -40°C to +85°C
VDD = 5.0 V
Tamb = -40°C to +125°C
SCL = 200 kHz
VDD = 1.4 V
Tamb = -40°C to +85°C
SCL = 200 kHz
VDD = 1.4 V
Tamb = -40°C to +125°C
SCL = 1 MHz
VDD = 3.3 V
Tamb = -40°C to +85°C
SCL = 1 MHz
VDD = 3.3 V
Tamb = -40°C to +125°C
SCL = 1 MHz
VDD = 5.0 V
Tamb = -40°C to +85°C
SCL = 1 MHz
VDD = 5.0 V
Tamb = -40°C to +125°C
0.6
0.8
0.9
2.5
1.5
1.1
1.5
µA
4.6
µA
2.0
µA
5.2
µA
2.2
µA
5.5
µA
14
µA
18
µA
50
µA
55
µA
65
µA
75
µA
3.4
2.2
1.6
µA
µA
µA
Tamb = -40°C to +85°C
80% VDD
-1
20%
+1
V
V
µA
Tamb = -40°C to +125°C
-1.5
+1.5
µA
7
pF
Pins: SCL, SDI, CLKOE, CE
VDD = 1.4V; IOH = 0.1mA
VDD = 3.3V; IOH = 1.5mA
VDD = 5.0V; IOH = 2.0mA
VDD = 1.4V; IOL = 0.4mA
VDD = 3.3V; IOL = 1.5mA
VDD = 5.0V; IOL = 5.0mA
VOH = 4.5 V / VDD = 5 V
VOL = 0.8 V / VDD = 5 V
VO = VDD or VSS
Tamb = -40°C to +85°C
VO = VDD or VSS
Tamb = -40°C to +125°C
TOPR
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mV
1.0
2.7
4.5
V
0.2
0.25
0.8
2.0
-5.0
-1
0
+1
-1.5
0
+1.5
V
mA
mA
µA
-40
52
VDD
+125
°C
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PARAMETER
SYMBOL
CONDITIONS
EEPROM Characteristics
Read voltage
Programming voltage
VRead
VProg
EEPROM Programming Time
TProg
EEPROM Programming Time
TProg
EEPROM Programming Time
TProg
EEPROM write / erase cycles
Trickle charger
VHYST
Tamb = -40°C to +125°C
Tamb = -40°C to +125°C
Tamb = -40°C to +125°C
1 Byte EEPROM User
Tamb = -40°C to +125°C
1 Byte EEPROM Control
Tamb = -40°C to +125°C
2-4 Byte EEPROM Control
VDD to VBACK = 3.0 V
R80k
R20k
R5k
R1.5k
Tamb
Tamb
Tamb
Tamb
TE
Tamb = -40°C to +85°C
Tamb = -40°C to +125°C
Current limiting resistors
VDD = 5.0V
VBACK = 3.0V
MIN.
TYP.
MAX.
UNIT
1.4
2.2
V
V
35
ms
100
ms
135
ms
5000
Cycles
= 25°C
= 25°C
= 25°C
= 25°C
80
20
5
1.5
kΏ
+/-4
+/-6
°C
Thermometer
Thermometer precision
7.4. SPI INTERFACE TIMING CHARACTERISTICS
tw(CE)
CE
tSCL
tSU;(CE)
tr
tclk(H)
tf
tclk(L)
th(CE)
trec(CE)
80%
SCL
20%
tSU;DAT
tHD;DAT
WRITE
SDI
SDO
R/W
SA2
RA0
b6
b0
b7
b6
b0
Hi Z
READ
SDI
b7
td(SDI-SDO)
tdis(SDO)
td(R)SDO
SDO
Hi Z
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b7
53
b6
b0
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7.5. SPI INTERFACE DYNAMIC CHARACTERISTICS
VSS= 0 V; Tamb= -40°C to +125°C. All timing values are valid within the operating supply voltage range and
references to VIL and VIH with an input voltage swing from VSS to VDD.
PARAMETER
SYMBOL
SCL clock frequency
SCL time
Clock HIGH time
Clock LOW time
Rise time
Fall time
CE setup time
CE hold time
CE recovery time
fclk(SCL)
tSCL
tclk(H)
tclk(L)
tr
tr
tsu(CE)
th(CE)
trec(CE)
CE pulse width
tw(CE)
Setup time
tsu
Hold time
th
Measured after valid
sub address is
received
Setup time for SDI
data
Hold time for SDI
data
SDO read delay time
td(R)SDO
Bus load = 50pF
SDO disable time
tdis(SDO)
Transition time SDI to SDO
tt(SDI-SDO)
CONDITIONS
VDD = 1.4V
MIN
MAX
VDD = 1.8V
MIN
0.2
5
1500
1500
for SCL signal
for SCL signal
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VDD = 3.0V
MIN
0.6
1.7
700
700
800
800
100
500
400
No load value; bus
will be held up by
bus capacitance;
use RC time
constant with
application values
Prepare for 0ns to
avoid bus conflict
MAX
100
300
300
VDD = 5.0V
MIN
1.0
1
400
400
800
800
0.49
MAX
1.0
1
400
400
200
200
100
200
200
0.49
200
200
100
200
200
0.49
0.49
20
20
20
20
500
300
200
200
UNIT
MAX
MHz
μs
ns
ns
ns
ns
ns
ns
ns
s
ns
ns
1300
650
350
350
ns
200
100
50
50
ns
0
0
54
0
0
ns
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8. APPLICATION INFORMATION
Operating RV-3049 without VBACKUP Supply:
VDD
10 nF
2
VDD
VBACKUP
INT
SDO
SDI
SCL
CE
INT
SDI
SDO
SCL
CE
RV-3049
1
μ Controller
CLKOUT
3
CLKOE
VSS
1
2
3
GPIO VSS
When operating the RV-3049 without Backup Supply Voltage, it is recommended to tie VBACKUP pin to GND,
10 kOhm resistor is recommended.
Pull-up resistor of the INT signal can be tied directly to supply voltage VDD.
CLKOUT is enabled when CLKOE input is high. It either can be permanently enabled with a pull-up resistor
to supply voltage VDD or actively controlled by the μController.
If no clock function is needed, it is recommended to disable CLKOUT by permanently tie CLKOE pin with a
pull-down resistor to GND.
Operating RV-3049 with Backup Supply Voltage VBACKUP:
VDD
VBACKUP
10 nF
4
VDD
VBACKUP
VBACKUP
5
INT
SDO
SDI
SCL
CE
INT
SDI
SDO
SCL
CE
RV-3049
μ Controller
CLKOUT
CLKOE
VSS
4
5
GPIO VSS
When operating the RV-3049 with either Supercap or Lithium Battery as Backup Supply, the INT signal
also works when the device operates on VBACKUP supply voltage. Therefore it is recommended to tie the
INT pull-up resistor to VBACKUP.
When a Lithium Battery is used, it is recommended to insert a protection resistor of 100 - 1’000 Ohm to
limit battery current and to prevent damage in case of soldering issues causing short between supply pins.
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8.1. RECOMMENDED REFLOW TEMPERATURE (LEADFREE SOLDERING)
Maximum Reflow Conditions in accordance with IPC/JEDEC J-STD-020C “Pb-free”
Temperature Profile
Average ramp-up rate
Ramp down Rate
Time 25°C to Peak Temperature
Preheat
Temperature min
Temperature max
Time Tsmin to Tsmax
Soldering above liquidus
Temperature liquidus
Time above liquidus
Peak temperature
Peak Temperature
Time within 5°C of peak temperature
Copyright 2014, EM Microelectronic-Marin SA
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Symbol
(Tsmax to Tp)
Tcool
Tto-peak
Condition
3°C / second max
6°C / second max
8 minutes max
Tsmin
Tsmax
ts
150
200
60 - 180
°C
°C
Sec
TL
tL
217
60 – 150
°C
sec
Tp
tp
260
20 - 40
°C
sec
56
Unit
°C / s
°C / s
m
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9. PACKAGE
9.1. DIMENSIONS AND SOLDERPADS LAYOUT
C3 Package:
Package dimensions (bottom view):
Recommended solderpad layout:
All dimensions in mm typical.
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9.2. MARKING AND PIN #1 INDEX
C3 Package:
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10.PACKING INFORMATION
10.1. CARRIER TAPE
12 mm Carrier-Tape:
Material:
Polystyrene / Butadine or Polystyrol black, conductive
Cover Tape:
Base Material:
Adhesive Material:
Polyester, conductive 0.061 mm
Pressure-sensitive Synthetic Polymer
C3 Package:
User Direction of Feed
Tape Leader and Trailer: 300 mm minimum.
All dimensions in mm.
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10.2. PARTS PER REEL
C3 Package:
Reels:
Diameter
7”
7”
Copyright 2014, EM Microelectronic-Marin SA
603003.doc, Version , 5-Mai-14
Material
Plastic, Polystyrol
Plastic, Polystyrol
60
RTC’s per reel
1’000
3’000
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10.3. REEL 13 INCH FOR 12 mm TAPE
Reel:
Diameter
Material
13”
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Plastic, Polystyrol
61
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10.4. REEL 7 INCH FOR 12 mm TAPE
Reel:
Diameter
Material
7”
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Plastic, Polystyrol
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11.HANDLING PRECAUTIONS FOR CRYSTALS OR MODULES WITH EMBEDDED
CRYSTALS
The built-in tuning-fork crystal consists of pure Silicon Dioxide in crystalline form. The cavity inside the package is
evacuated and hermetically sealed in order for the crystal blank to function undisturbed from air molecules,
humidity and other influences.
Shock and vibration:
Keep the crystal / module from being exposed to excessive mechanical shock and vibration. We guarantee that
the crystal / module will bear a mechanical shock of 5000g / 0.3 ms.
The following special situations may generate either shock or vibration:
Multiple PCB panels - Usually at the end of the pick & place process the single PCBs are cut out with a router.
These machines sometimes generate vibrations on the PCB that have a fundamental or harmonic frequency
close to 32.768 kHz. This might cause breakage of crystal blanks due to resonance. Router speed should be
adjusted to avoid resonant vibration.
Ultrasonic cleaning - Avoid cleaning processes using ultrasonic energy. These processes can damages
crystals due to mechanical resonance of the crystal blank.
Overheating, rework high temperature exposure:
Avoid overheating the package. The package is sealed with a seal ring consisting of 80% Gold and 20% Tin. The
eutectic melting temperature of this alloy is at 280°C. Heating the seal ring up to >280°C will cause melting of the
metal seal which then, due to the vacuum, is sucked into the cavity forming an air duct. This happens when using
hot-air-gun set at temperatures >300°C.
Use the following methods for rework:


Use a hot-air- gun set at 270°C.
Use 2 temperature controlled soldering irons, set at 270°C, with special-tips to contact all solder-joints from
both sides of the package at the same time, remove part with tweezers when pad solder is liquid.
EM Microelectronic-Marin SA (“EM”) makes no warranties for the use of EM products, other than those expressly contained in EM's applicable
General Terms of Sale, located at http://www.emmicroelectronic.com. EM assumes no responsibility for any errors which may have crept into
this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any
commitment to update the information contained herein.
No licenses to patents or other intellectual property rights of EM are granted in connection with the sale of EM products, neither expressly nor
implicitly.
In respect of the intended use of EM products by customer, customer is solely responsible for observing existing patents and other intellectual
property rights of third parties and for obtaining, as the case may be, the necessary licenses.
Important note: The use of EM products as components in medical devices and/or medical applications, including but not limited to,
safety and life supporting systems, where malfunction of such EM products might result in damage to and/or injury or death of
persons is expressly prohibited, as EM products are neither destined nor qualified for use as components in such medical devices
and/or medical applications. The prohibited use of EM products in such medical devices and/or medical applications is exclusively at
the risk of the customer
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