Quartus II Device Support Release Notes December 2007 Quartus II version 7.2 Service Pack 1 This document provides late-breaking information about device support in this version of the Altera® Quartus® II software. For information about memory, disk space, and system requirements, refer to the readme.txt file in your \altera\quartus<version number> directory. For information about New Features, EDA Tool version support, and existing and resolved software issues, refer to the Quartus II Software Release Notes. Device Support & Pin-Out Status........................................................... 2 Full Device Support ........................................................................... 2 Advance Device Support ................................................................... 2 Timing Models ......................................................................................... 3 Preliminary Timing Models............................................................... 3 Final Timing Models ......................................................................... 4 Power Models .......................................................................................... 5 Changes in Device Support.................................................................... 6 Changed Transceiver PLL Settings for Stratix II GX and Arria GX Devices............................................................................................... 6 New Automotive Temperature Grade Devices Available ................. 6 Device Specification Change for EP3SL200 Devices....................... 6 Incorrect Delay Chain Setting for Cyclone III Devices with DQS Interface ............................................................................................. 7 Incorrect fMAX Reporting for Some Stratix II GX Designs ................ 7 User Pin Assignments to PGM Pins Do Not Function Correctly Under Some Circumstances............................................................... 7 Change in Clock Management Unit PLL Multiplication Factors...... 8 Altera Corporation RN-01032-1.0 1 Quartus II Device Support Release Notes Version 7.2 Service Pack 1 Device Support & Pin-Out Status This section contains information about the status of support in the Quartus II software for the devices listed. Full Device Support Full compilation, simulation, timing analysis, and programming support is now available for the following new devices and device packages: Devices with Full Support Device Family ® Cyclone III Cyclone II Devices EP3C16E144 EP3C16U256 EP3C16U484 EP3C40F324 EP3C40U484 EP3C80F484 EP3C80F780 EP2C5AT144 EP3C16F256 EP3C16F484 EP3C40Q240 EP3C40F484 EP3C40F780 EP3C80U484 EP2C5AF256 Advance Device Support Compilation, simulation, and timing analysis support is provided for the following devices that will be released in the near future. Although the Compiler generates pin-out information for these devices, it does not generate programming files for them in this release. Devices with Advance Support with Pin-out Support Device Family ® MAX II Stratix® III Cyclone III Altera Corporation RN-01032-1.0 Devices EPM240ZM68 EPM570ZM100 EPM570ZM256 EP3SL200H780 EP3C5M164 EP3C16M164 EPM240ZM100, EPM570ZM144 EP3C10M164 2 Quartus II Device Support Release Notes Version 7.2 Service Pack 1 Timing Models This section contains a summary of timing model status in the current version of the Quartus II software. Preliminary Timing Models The following table shows the devices with preliminary timing models in the current version of the Quartus II software: Devices with Preliminary Timing Models Device Family ® HardCopy II Cyclone III Stratix III Altera Corporation RN-01032-1.0 Device HC210 HC220 HC240 EP3C10 EP3C40 EP3C80 EP3SE50 EP3SL70 EP3SE110 EP3SL150 EP3SE260 HC210W HC230 EP3C16 EP3C55 EP3SL50 EP3SE80 EP3SL110 EP3SL200 EP3SL340 3 Quartus II Device Support Release Notes Version 7.2 Service Pack 1 Final Timing Models The following table lists the devices with final timing models that are available in the current version of the Quartus II software: Devices with Final Timing Models Device Family Arria® GX Cyclone II Cyclone III MAX II Stratix II Stratix II GX Device EP1AGX20 EP1AGX35 EP1AGX50 EP1AGX60 EP1AGX90 EP2C5 EP2C8 EP2C20 EP2C35 EP2C50 EP2C70 EP3C25 EP3C120 EPM240 EPM1270 EPM570 EPM2210 EP2S15 EP2S30 EP2S60 EP2S90 EP2S130 EP2S180 EP2SGX30 EP2SGX60 EP2SGX90 EP2SGX130 Timing Models Final in Quartus II Version Number 7.2 7.2 7.2 7.2 7.2 6.0 5.1 SP2 5.1 SP2 5.1 SP2 6.0 5.1 SP2 7.2 SP1 7.2 SP1 5.0 5.0 5.0 SP1 5.0 SP1 5.0 SP1 5.0 5.0 5.0 SP1 5.0 SP1 5.1 7.0 7.0 6.1 6.1 The current version of the Quartus II software also includes final timing models for the ACEX® 1K, APEX® 20K, APEX 20KE, APEX 20KC, APEX II, Cyclone, FLEX® 6000, FLEX 10K, FLEX 10KA, FLEX 10KE, and MAX 7000S, Stratix, and Stratix GX device families. Timing models for these device families became final in versions 4.1 and earlier. Altera Corporation RN-01032-1.0 4 Quartus II Device Support Release Notes Version 7.2 Service Pack 1 Power Models This section contains a summary of power model status for recent devices in the current version of the Quartus II software. Device Family Stratix Stratix GX Stratix II Stratix II GX Stratix III Cyclone Cyclone II Cyclone III MAX 3000A MAX 7000AE MAX 7000B MAX II HardCopy II Arria GX (1) Altera Corporation RN-01032-1.0 Power Model Status Final – 5.1 Final – 5.1 Final – 6.0 Final – 7.1 Preliminary Final – 5.1 Final – 6.0 Preliminary Final – 5.1 Final – 5.1 Final – 5.1 Final – 5.0 SP1 Correlated(1) – 7.2 Final – 7.2 HardCopy II power models are fully correlated to silicon in this release. 5 Quartus II Device Support Release Notes Version 7.2 Service Pack 1 Changes in Device Support Changed Transceiver PLL Settings for Stratix II GX and Arria GX Devices The Quartus II software has updated the CMU PLL loop filter resistor control and charge pump settings used for 3G and 6G basic modes in Stratix II GX devices and 3G basic modes in Arria GX devices. This change improves the CMU PLL performance for some configurations. No design change is needed; the Quartus II software will apply the updated settings during compilation. Applies to: Stratix II GX and Arria GX devices New Automotive Temperature Grade Devices Available The following devices are now available in "A" temperature grade for automotive applications: Cyclone: EP1C3T100A8, EP1C3T144A8 Cyclone II: EP2C5AF256A7, EP2C5AT144A7, EP2C8AF256A7, EP2C15AF256A7, EP2C15AF484A7, EP2C20AF256A7, EP2C20AF484A7 MAX 7000: EPM7032AETA44-10, EPM7064AETA44-10, EPM7064AETA100-10, EPM7128AETA100-10, EPM7128AETA144-10 MAX II: EPM240T100A5, EPM570T100A5, EPM570T144A5, EPM1270F256A5, EPM1270T144A5, EPM2210F256A5, EPM2210F324A5 HardCopy II: HC210WF484A Device Specification Change for EP3SL200 Devices The device specifications for EP3SL200 devices have changed, including resource counts, pin-outs, speed grades and package options. Projects that use EP3SL200 devices should be compiled with the Quartus II software version 7.2 SP1 or later. Updated device specifications are provided in the Stratix III Device Handbook. Applies to: Stratix III EP3SL200 devices Altera Corporation RN-01032-1.0 6 Quartus II Device Support Release Notes Version 7.2 Service Pack 1 Incorrect Delay Chain Setting for Cyclone III Devices with DQS Interface Device characterization has determined that the correct delay chain value for hybrid memory interfaces (i.e., those with multiple DQS pins placed on adjacent sides of the device) should be 0. The Quartus II software version 7.2 and earlier incorrectly set the value to 1. The incorrect setting causes a performance decrease. To correct the setting, either recompile your design using the Quartus II software version 7.2 SP1 or manually set the delay chain value to 0 with a delay chain assignment in the version 7.2 or earlier software. Applies to: Cyclone III devices Incorrect fMAX Reporting for Some Stratix II GX Designs Designs that targeted the Stratix II GX C5 speed grade, and used the DSP block in 36x36-bit multiply mode and used dynamic control of the signed / unsigned behavior of the multiplier had an overly low fMAX limit in the Quartus II software version 7.2 (197 MHz). The Quartus II software version 7.2 SP1 corrects the fMAX limit for this mode to 305 MHz, which matches the limit in the Quartus II software releases earlier than 7.2. No design that closed timing in the Quartus II software version 7.2 will be affected by this change, since it can only increase the operating speed of a design. If your design matches the case listed above, and your operating frequency was limited by the DSP block, you should re-run timing analysis in the Quartus II software version 7.2 SP1 to obtain a corrected and less conservative timing report. Applies to: Stratix II GX devices in C5 grades User Pin Assignments to PGM Pins Do Not Function Correctly Under Some Circumstances Programming pins do not function correctly as user I/O pins when remote update is enabled in an Active Serial Configuration scheme. No compiler warning is issued by the Quartus II software version 7.2 SP1 and earlier. Applies to: Arria GX, Stratix II, and Stratix II GX device families Altera Corporation RN-01032-1.0 7 Quartus II Device Support Release Notes Version 7.2 Service Pack 1 Change in Clock Management Unit PLL Multiplication Factors This change affects the (OIF) CEI PHY interface protocol for Stratix II GX instantiations of the alt2gxb megafunction. In the Quartus II software version 7.2 and earlier, you could specify a data rate to input clock frequency ratio of 10, 20, or 40 when operating in the 4.7–5.7 Gbps range. Beginning in version 7.2 SP1, that ratio can be only 10 or 20. Applies to: Stratix II GX Altera Corporation RN-01032-1.0 8 Quartus II Device Support Release Notes Version 7.2 Service Pack 1 Revision History Revision 1.0 Description Initial Release Copyright © 2007 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and service marks of Altera Corporation in the U.S. and other countries. All other product or service names are the property of their respective holders. Altera products are protected under numerous U.S. and foreign patents and pending applications, mask work rights, and copyrights. Altera Corporation RN-01032-1.0 9