ACT412US-T - Active-Semi

ACT412
Rev 1, 30-Oct-13
ActivePSRTM Quasi-Resonant PWM Controller
FEATURES
mode including cycle-by-cycle current limiting.
• Patented Primary Side Regulation
ACT412 is to achieve no overshoot and very short
rise time even with big capacitive load (10000µF)
with the built-in fast and soft start process, .
Technology
• Quasi-Resonant Operation
The Quasi-Resonant (QR) operation mode can
effectively improve efficiency, reduce the EMI noise
and further reduce the components in input filter.
• Adjustable up to 120kHz Switching
Frequency
• +/-5% Output Voltage Regulation
• Constant Power Operation Mode for Fast
ACT412 is idea for application up to 36 Watt.
Figure 1:
Start-up and Motor Drive Applications
Simplified Application Circuit
• Integrated Line and Primary Inductance
Compensation
• Built-in Soft-Start Circuit
• Line Under-Voltage, Thermal, Output Overvoltage, Output Short Protections
•
•
•
•
Current Sense Resistor Short Protection
Transformer Short Winding Protection
Less than 100mW Standby Power
Complies with Global Energy Efficiency and
CEC Average Efficiency Standards
• Tiny SOT23-6 Packages
APPLICATIONS
• AC/DC Adaptors/Chargers for E-Shaver,
Motor Driver, ADSL, Network Power, Cell
Phone
• Big Capacitive Load Application
GENERAL DESCRIPTION
The ACT412 is a high performance peak current
mode PWM controller which applies ActivePSRTM
and ActiveQRTM technology. ACT412 achieves
accurate voltage regulation without the need of an
opto-coupler or reference device.
The ACT412 is designed to achieve less than
100mW Standby Power. By applying frequency fold
back and
ActiveQRTM technology, ACT412
exceeds the latest ES2.0 efficiency standard.
ACT412 integrates comprehensive protection. In
case of over temperature, over voltage, short
winding, short current sense resistor, open loop
and overload conditions, it would enter auto restart
Innovative PowerTM
ActivePSRTM is a trademark of Active-Semi.
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Copyright © 2013 Active-Semi, Inc.
ACT412
Rev 1, 30-Oct-13
ORDERING INFORMATION
PART NUMBER
TEMPERATURE
RANGE
PACKAGE
PINS
PACKING
METHOD
ACT412US-T
-40°C to 85°C
SOT23-6
6
TUBE & REEL
TOP MARK
FRYS
PIN CONFIGURATION
SOT23-6
ACT412US
PIN DESCRIPTIONS
PIN
NAME
DESCRIPTION
1
CS
2
GND
Ground.
3
GATE
Gate Drive. Gate driver for the external MOSFET transistor.
4
VDD
5
FB
6
COMP
Current Sense Pin. Connect an external resistor (RCS) between this pin and ground to set peak
current limit for the primary switch.
Power Supply. This pin provides bias power for the IC during startup and steady state operation.
Feedback Pin. Connect this pin to a resistor divider network from the auxiliary winding.
Compensation Pin.
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ACT412
Rev 1, 30-Oct-13
ABSOLUTE MAXIMUM RATINGSc
PARAMETER
VALUE
UNIT
FB, CS, COMP to GND
-0.3 to + 6
V
VDD, GATE to GND
-0.3 to + 22
V
0.45
W
-40 to 150
˚C
220
˚C/W
Operating Junction Temperature
-40 to 150
˚C
Storage Temperature
-55 to 150
˚C
300
˚C
Maximum Power Dissipation (SOT23-6)
Operating Junction Temperature
Junction to Ambient Thermal Resistance (θJA)
Lead Temperature (Soldering, 10 sec)
c: Do not exceed these limits to prevent damage to the device. Exposure to absolute maximum rating conditions for long periods.
ELECTRICAL CHARACTERISTICS
(VDD = 18V, LM = 0.5mH, RCS = 0.75Ω, VOUT = 13V, NP = 68, NS =12, NA = 17, TA = 25°C, unless otherwise specified,12V0.4A application)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
11.11
12.35
13.58
V
4.8
5.4
6
V
18.45
20.5
22.55
V
5
10
µA
1
mA
Supply
VDD Turn-On Voltage
VDDON
VDD Rising from 0V
VDD Turn-Off Voltage
VDDOFF
VDD Falling after Turn-on
VDD Over Voltage Protection
VDDOVP
VDD Rising from 0V
Start Up Supply Current
IDDST
VDD = 11V, before VDD Turn-on
IDD Supply Current
IDD
VDD = 12V, after VDD Turn-on (no
switching)
0.55
IDD Supply Current at Fault Mode
IDD
VDD = 12V, after VDD Turn-on,
fault = 1
0.25
mA
Feedback
Effective FB Reference Voltage
VFBREF
FB Sampling Blanking Time
TFB_BLK
Time needed for FB Sampling
(After blanking)
FB Leakage Current
TFB_SAMP
IBVFB
2.23
2.25
2.28
V
Light load
0.38
0.45
0.52
µs
Heavy Load
1.1
1.3
1.5
µs
FB sampling
0.5
0.65
0.75
µs
CC and Knee point detecting
0.22
0.25
0.29
µs
1
µA
VFB = 3V
Current Limit
CS Current Limit Threshold
CS Minimum Current Limits
Threshold
VCSLIM1
VOUT = 12V
0.5
V
VCSLIM2
VOUT = 6V
0.75
V
300
mV
60
ns
Light Load
150
ns
Heavy Load
636
ns
VCSMIN
CS to GATE Propagation Delay
Leading Edge Blanking Time
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ACT412
Rev 1, 30-Oct-13
ELECTRICAL CHARACTERISTICS CONT’D
(VDD = 18V, LM = 0.5mH, RCS = 0.75Ω, VOUT = 13V, NP = 68, NS =12, NA = 17, TA = 25°C, unless otherwise specified,12V0.4A application)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
250
ns
GATE DRIVE
Gate Rise Time
TRISE
VDD = 10V, CL = 1nF
150
Gate Falling Time
TFALL
VDD = 10V, CL = 1nF
90
ns
Gate Low Level ON-Resistance
RONLO
ISINK = 30mA
10
Ω
Gate High Level ON-Resistance
RONHI
ISOURCE = 30mA
31
Ω
GATE = 18V, before VDD
turn-on
Gate Leakage Current
1
µA
COMPENSATION
Inside Compensate Resistor
RCOMP
Output Sink Current
ICOMP_SINK
Output Source Current
ICOMP_SOUR
ACT412
0
kΩ
VFB = 3V, VCOMP = 2V
15
40
µA
VFB = 1.5V, VCOMP = 2V
15
40
µA
71
µA/V
CE
Transconductance of Error Amplifier
Gm
Maximum Output Voltage
VCOMPMAX
VFB = 1.5V
3.5
V
Minimum Output Voltage
VCOMPMIN
VFB = 3V
0.4
V
CS to COMP Gain
2
V/V
Pre-Amp Gain
1
V/V
COMP Leakage Current
COMP = 2.5V
1
µA
132
kHz
OSCILLATOR
Maximum Switching
fMAX
108
120
Maximum Duty Cycle
DMAX
65
75
%
1164
Hz
Minimum Switching Frequency
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ActivePSRTM is a trademark of Active-Semi.
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Copyright © 2013 Active-Semi, Inc.
ACT412
Rev 1, 30-Oct-13
ELECTRICAL CHARACTERISTICS CONT’D
(VDD = 18V, LM = 0.5mH, RCS = 0.75Ω, VOUT = 13V, NP = 68, NS =12, NA = 17, TA = 25°C, unless otherwise specified,12V0.4A application)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
2
2.25
3
µs
CS Short Detection Threshold
0.1
0.15
V
CS Open Threshold Voltage
1.75
V
Abnormal OCP Blanking Time
190
ns
Inductance Short CS Threshold Voltage
1.75
V
Thermal Shutdown Temperature
135
˚C
Thermal Hysteresis
20
˚C
Protection
CS Short Waiting Time
Vo Short Detection Threshold
VFBUVLO
0.28
V
Line UVLO
IFBUVLO
0.2
mA
20
µA
2.4
mA
3
V
3.3
µs
Line UVLO Hysteresis
Line OVP
IFBOVP
VFB Over Voltage Protection
Valley Detection
Valley Detection Time Window
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VCOMP = 0.45V
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Copyright © 2013 Active-Semi, Inc.
ACT412
Rev 1, 30-Oct-13
FUNCTIONAL BLOCK DIAGRAM
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Copyright © 2013 Active-Semi, Inc.
ACT412
Rev 1, 30-Oct-13
FUNCTIONAL DESCRIPTION
ACT412 is a high performance peak current mode
low-voltage PWM controller IC. The controller
includes the most advance features that are
required in the adaptor applications up to 36 Watt.
Unique fast startup, frequency fold back, QR
switching technique, accurate OLP, low standby
mode operation, external compensation adjustment,
short winding protection, OCP, OTP, OVP and
UVLO are included in the controller.
transformer secondary and auxiliary turns, and VD
is the rectifier diode forward drop voltage at
approximately 0.1A bias.
Constant Power (CP) Mode Operation
When the secondary output current reaches a level
set by the internal current limiting circuit, the
ACT412 enters current limit condition and causes
the secondary output voltage to drop. As the output
voltage decreases, so does the flyback voltage in a
proportional manner. An internal current shaping
circuitry adjusts the switching frequency and current
limit threshold slowly based on the flyback voltage
so that the transferred power is fixed to the output
voltage, resulting in a constant power at secondary
side output power profile. Through correctly setting
K1, K2, the energy transferred to the output during
each switching cycle is ½(LP × ILIM^2) , where LP
is the transformer primary inductance, ILIM is the
primary peak current, Formula can be present as
below:
Startup
Startup current of ACT412 is designed to be very
low so that VDD could be charged to VDDON
threshold level and device starts up quickly. A large
value startup resistor can therefore be used to
minimize the power loss yet reliable startup in
application. For a typical AC/DC adaptor with
universal input range design, two 1MΩ, 1/8 W
startup resistors could be used together with a VDD
capacitor(4.7uF) to provide a fast startup and yet
low power dissipation design solution.
During startup period, the IC begins to operate with
minimum Ippk to minimize the switching stresses
for the main switch, output diode and transformers.
And then, the IC operates at maximum power
output to achieve fast rise time. After this, VOUT
reaches about 90% VOUT , the IC operates with a
‘soft-landing’ mode (decrease Ippk) to avoid output
overshoot.
P OUTCP
(2)
Loop Compensation
The ACT412 allows external loop compensation by
connecting a capacitor to extend its applications,
especially with different VOUT in a wide output power
range.
Primary Inductance Compensation
The ACT412 integrates a built-in primary
inductance compensation circuit to maintain
constant OLP despite variations in transformer
manufacturing. The compensated ranges is +/-7%.
(1)
where RFB1 (R5) and RFB2 (R6) are top and bottom
feedback resistor, NS and NA are numbers of
ActivePSRTM is a trademark of Active-Semi.
) 2 × η × K 2 f SW
In no load standby mode, the ACT412 oscillator
frequency is further reduced to a minimum
frequency while the current pulse is reduced to a
minimum level to minimize standby power. The
actual minimum switching frequency is
programmable with an output preload resistor.
This error signal is then amplified by the internal
error amplifier. When the secondary output voltage
is above regulation, the error amplifier output
voltage decreases to reduce the switch current.
When the secondary output voltage is below
regulation, the error amplifier output voltage
increases to ramp up the switch current to bring the
secondary output back to regulation. The output
regulation voltage is determined by the following
relationship:
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_ TH
Standby (No Load) Mode
In constant voltage operation, the ACT412 senses
the output voltage at FB pin through a resistor
divider network R5 and R6 in Figure 2. The signal
at FB pin is pre-amplified against the internal
reference voltage, and the secondary side output
voltage is extracted based on Active-Semi's
proprietary filter architecture.
R FB 1
N
) × S - VD
R FB 2
NA
1
× L p × ( K 1V CS
2
where fSW is the switching frequency. The constant
power operation typically extends down to 20% of
nominal output voltage regulation.
Constant Voltage (CV) Mode Operation
VOUTCV = 2 . 20 V × ( 1 +
=
Primary Inductor Current Limit
Compensation
The ACT412 integrates a primary inductor peak
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ACT412
Rev 1, 30-Oct-13
FUNCTIONAL DESCRIPTION CONT’D
current limit compensation circuit to achieve
constant power over wide line and wide load range.
identified. There is a startup phase in the autorestart mode. After this startup phase the conditions
are checked whether the failure is still present.
Normal operation proceeds once the failure mode is
removed. Otherwise, new startup phase will be
initiated again.
Frequency Fold-back
When the load drops to 75% of full load level,
ACT412 starts to decrease the switching frequency,
which is proportional to the load current ,to improve
the efficiency of the converter as show in Functional
Block Diagram.
PROTECTION
FUNCTIONS
FAILURE
CONDITION
PROTECTION
MODE
VDD Over Voltage
VDD > 20.5V
(4 duty cycle)
Auto Restart
VFB Over Voltage
VFB > 3V
(4 duty cycle)
Auto Restart
Valley Switching
Over Temperature
T > 135˚C
Auto Restart
ACT412 employed valley switching from medium
load to heavy load to reduce switching loss and
EMI. After the switch is turned off, the ringing
voltage from the auxiliary winding is applied to the
VFB pin through feedback network R5, R6.
Internally, the VFB pin is connected to an zerocrossing detector to generate the switch turn on
signal when the conditions are met. In light load, the
frequency fold back scheme starts to take control to
determine the switch turn on signal, so thus the
switching frequency.
Short Winding/
Short Diode
VCS > 1.75V
Auto Restart
Over Load
IPK = ILIMIT
Auto Restart
Output Short
Circuit
VFB < 0.28V
Auto Restart
Open Loop
No switching for
4 cycle
Auto Restart
VCC Under
Voltage
VCC < 6.8V
Auto Restart
This enables the application to meet all latest green
energy standards. The actual minimum switching
frequency is programmable with a small dummy
load (while still meeting standby power).
Figure 1:
To reduce the power loss during fault mode, the
startup delay control is implemented. The startup
delay time increases over lines.
Valley Switching at heavy load
Short Circuit Protection
Vdrain_gnd Mosfet
When the secondary side output is short circuited,
the ACT412 enters hiccup mode operation. This
hiccup behavior continues until the short circuit is
removed.
DC voltage
FB Over Voltage Protection
Possible Valley turn on
Ton
The ACT412 includes output over-voltage
protection circuitry, which shuts down the IC when
the output voltage is 40% above the normal
regulation voltage 4 consecutive switching cycles.
The ACT412 enters hiccup mode when an output
over voltage fault is detected.
t
T
VDD Over Voltage Protection
Protection Features
ACT412 can monitor the converter output voltage.
The voltage generated by the auxiliary winding
tracks converter’s output voltage through VDD,
which is in proportion to the turn ratio (VOUT+VDIODE)
хNA/NS. When the VOUT is abnormally higher than
design value for four consecutive cycles, IC will
The ACT412 provides full protection functions. The
following table summarizes all protection functions.
Auto-Restart Operation
ACT412 will enter auto-restart mode when a fault is
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ACT412
Rev 1, 30-Oct-13
TYPICAL APPLICATION CONT’D
enter the restart process. A counter is used to
reduce sensitivity to noise and prevent the auto
start unnecessary.
Open Loop Protection
ACT412 is able to protect itself from damage when
the control loop is open. The typical open loop
condition includes either VFB floating or RFB5
open.
Over Temperature Shutdown
The thermal shutdown circuitry detects the ACT412
die temperature. The threshold is set at typical
135˚C. When the die temperature rises above this
threshold (135˚C) the ACT412 is disabled and
remains disabled until the die temperature falls
below 115˚C, at which point the ACT412 is reenabled.
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ACT412
Rev 1, 30-Oct-13
TYPICAL APPLICATION CONT’D
Design Example
The design example below gives the procedure for
a DCM fly back converter using an ACT412. Refer
to Application Circuit Figure 2, the design for an
adapter application starts with the following
specification:
Input Voltage Range
90VAC - 265VAC, 50/60Hz
Output Power, PO
5W
Output Voltage, VOUTCV
0.4A
CC Current, IOUTMAX
1.8A
System Efficiency CV, η
0.75
I IN
=
Since a bridge rectifier and bulk input capacitors are
used, the resulting minimum and maximum DC
input voltages can be calculated:
=
VIN ( MAX
=
1
2 POUT (
- tC )
2 fL
η × CIN
1
2 ×5 ×(
- 3 .5 ms )
2
×
2
47
2 × 85 ≈90V
0 .75 × 2 × 6 .8 μF
) DC
=
2 × VIN ( MAX
) AC
2 × ( 265 V AC ) = 375 V
(3)
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P OUT
V
INDC
5
× 0 . 75
90
_ FL
_ MIN
× η
(5)
≈ 75 mA
I ppk
_ FL
=
2 × LI N _ FL
=
D FL
2 × 75
= 375 mA
0 .4
(4)
- 10 -
(6)
The primary inductance of the transformer:
Lp =
V INDC
I ppk
_ MIN
_ FL
D FL
× fs
(7)
90 × 0 . 4
=
≈ 0 . 74 mH
375 mA × 130 k
The primary turns on time at full load:
TON
_ FL
= Lp
I ppk
_ FL
V INDC
(8)
_ MIN
0 . 74 mH × 375 mA
=
= 3 . 08 μ s
90
The ringing periods from primary inductance with
mosfet Drain-Source capacitor:
TRINGING
_ MAX
= 2 π Lp _ MAX C DS _ MAX
= 2 × 3 .14 × 0 .73 mH × (1 + 7 %) × 100 PF = 1 .76 μs
(9)
Design only an half ringing cycle at maximum load
in minimum low line, so secondly reset time:
TRST = TSW - TON _ FL - 0.5TRINGING _ MAX
= 1 / 130 kHz - 3.08 μs - 0.5 × 1.76 μs = 3.73 μs
(10)
Base on conservation of energy and transformer
transform identity, the primary to secondary turns
ratio NP/NS:
V IN _ MIN
NP
T
= ON ×
NS
T RST
V OUT + V D
(11)
3 . 08
90
=
×
= 5 . 53
3 . 73 13 + 0 . 45
Where ŋ is the estimated circuit efficiency, fL is the
Innovative PowerTM
=
_ FL
The input primary peak current at full load:
The operation for the circuit shown in Figure 1 is as
follows: the rectifier bridge D1-D4 and the capacitor
C1/C2 convert the AC line voltage to DC. This
voltage supplies the primary winding of the
transformer T1 and the startup resistor R7/R8 to
VDD pin of ACT412 and C4. The primary power
current path is formed by the transformer’s primary
winding, the mosfet, and the current sense resistor
R9. The resistors R3, R2, diode D5 and capacitor
C3 create a snubber clamping network that protects
Q1 from voltage spike from the transformer primary
winding leakage inductance. The network
consisting of capacitor C4, diode D6 and resistor
R4 provides a VDD supply voltage for ACT412 from
the auxiliary winding of the transformer. The resistor
R4 is optional, which filters out spikes and noise to
makes VDD more stable. C4 is the decoupling
capacitor of the supply voltage and energy storage
component for startup. During power startup, the
current charges C4 through startup resistor R7/R8
from the rectified high voltage. The diode D8 and
the capacitor C5/C6 rectify filter the output voltage.
The resistor divider consists of R5 and R6
programs the output voltage.
2
2VINAC
_ MIN
The full load system duty cycle is set to be 40% at
low line voltage 85VAC and the circuit efficiency is
estimated to be 75%. Then the average input
current at full load is:
12V
Full Load Current, IOUTFL
VINDC _ MIN =
line frequency, tC is the estimated rectifier
conduction time, CIN is empirically selected to be
2х6.8µF electrolytic capacitors.
The auxiliary to secondary turns ratio NA/NS:
NA
V + VD '
18 + 0 . 45
= DD
=
= 1 . 37
N S VOUT + V D 13 + 0 . 45
(12)
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ACT412
Rev 1, 30-Oct-13
TYPICAL APPLICATION CONT’D
An EE16 core is selected for the transformer. From
the manufacture’s catalogue recommendation, the
core with an effective area AE is 19.2mm2 .The turn
of the primary winding is:
NP ≥
Ilim × Lp _ max
AE × Bmax
=
0.75 × 0.00073
= 95T
19 .2 × 3000 × 10 −10
I lim = 2 × I p _ FL = 2 × 375 mA ≈ 750 mA
(13)
(14)
The turns of secondary and auxiliary winding
can be derived accordingly:
Ns = Np /
NA =
Np
NS
= 95 / 5 . 53 ≈ 17 T
(15)
NA
× N s = 1 . 4 × 17 ≈ 24 T
NS
down the turn ratio and inductance.
N p = 68 T , N s = 12 T , N A = 17 T , L p = 0 . 5 mH
(21)
PCB Layout Guideline
Good PCB layout is critical to have optimal
performance. Decoupling capacitor (C4) and
feedback resistor (R5/R6) should be placed close to
VDD and FB pin respectively. There are two main
power path loops. One is formed by C1/C2, primary
winding, Mosfet transistor and current sense
resistor (R9). The other is secondary winding,
rectifier D8 and output capacitors (C5/C6). Keep
these loop areas as small as possible. Connecting
high current ground returns, the input capacitor
ground lead, and the ACT412 GND pin to a single
point (star ground configuration).
Determining the value of the current sense resistor
(R9) uses the peak current in the design. Since the
ACT412 internal current limit is set to 1V, the
design of the current sense resistor is given by:
R CS =
V CS
1
=
≈ 1 . 3 .Ω
I lim
0 . 75
(16)
The voltage feedback resistors are selected
according to frequency at full load. The design
frequency at full load is given by:
fs =
Np
Ns
×
R fb 1 × R fb 2
VO + V D
×
V
R fb 1 + R fb 2
L p × cs × K f
R cs
_ sw
(17)
The design Vo is given by:
Vo = (1 +
R fb1
N
) × s × VFB − VD
R fb 2
Na
(18)
Where k is IC constant and K=0.0000065, then we
can get the value:
R fb 1 = 45 . 3 K , R fb 2 = 6 . 9 K
(19)
When selecting the output capacitor, a low
ESR electrolytic capacitor is recommended to
minimize ripple from the current ripple. The
approximate equation for the output capacitance
value is given by:
COUT =
IOUT
1.8
=
= 327 μF
fsw ×VRIPPLE 110k × 50mV
(20)
Two 330µF electrolytic capacitors are used to keep
the ripple small.
In fact, consider of transformer production, we scale
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ACT412
Rev 1, 30-Oct-13
Figure 2:
ACT412, Universal VAC Input, 12V/400mA Output Charger
V-I Characteristic vs. VIN (25˚C)
16
High Limit
115V
12
Low Limit
10
V
90
Output Voltage (V)
14
230V
8
264V
6
4
2
0
0
300
600
900
1200
1400
Output Current (mA)
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ACT412
Rev 1, 30-Oct-13
Table 2:
ACT412 Bill of Materials
ITEM
REFERENCE
1
U1
QTY
MANUFACTURER
IC, ACT412,SOT23-6
2
DESCRIPTION
1
Active-Semi.
C1,C2
Capacitor, Electrolytic, 6.8µF/400V, 10x12mm
2
KSC
3
C3
Capacitor, Ceramic, 1000pF/500V, 0805,SMD
1
POE
4
C4
Capacitor, Electrolytic,4.7µF/35V,5x11mm
1
KSC
5
C5,C6
Capacitor, Electrolytic, 330µF/16V, 8x11.5mm
2
KSC
6
C8
Capacitor, Ceramic, 0.1µF/25V, 0805,SMD
1
POE
7
C9
Capacitor, Ceramic, 1000pF/100V, 0805,SMD
1
POE
8
C10
Capacitor, Ceramic, 200pF/50V, 0805,SMD
1
POE
9
CY1
Safety Y1,Capacitor,1000pF/400V,Dip
1
UXT
10
D1-D4
Diode,Rectifier,1000V/1A,1N4007, DO-41
4
Good-Ark
11
D5
Fast Recovery Rectifier, RS1M,1000V/1.0A, RMA
1
PANJIT
12
D6
Fast Recovery Rectifier,RS1D,200V/1.0A,SMA
1
PANJIT
13
D7
NC
14
D8
Diode, schottky, 100V/3A, SB3100, DO-47
1
Good-Ark
15
L1
Axial Inductor, 1.5mH, 5*7,Dip
1
SoKa
16
L2
Axial Inductor, 0.55*5T, 5*7,Dip
1
SoKa
17
Q1
Mosfet Transistor, 4N60,TO-220
1
Infineon
18
PCB1
PCB, L*W*T=52.2x30x1.6mm,Cem-1,Rev:A
1
Jintong
19
FR1
Fuse,1A/250V
1
TY-OHM
20
R1
Chip Resistor, 51Ω, 0805, 5%
1
TY-OHM
21
R2
Chip Resistor, 510KΩ, 1206, 5%
1
TY-OHM
22
R3
Chip Resistor, 100Ω, 0805, 5%
1
TY-OHM
23
R4,R13
Chip Resistor, 22Ω, 0805, 5%
2
TY-OHM
TY-OHM
24
R5
Chip Resistor, 45.3KΩ, 0805,1%
1
25
R6
Chip Resistor, 6.9KΩ, 0805, 1%
1
TY-OHM
26
R7,R8
Chip Resistor, 1.5MΩ, 0805 , 5%
2
TY-OHM
27
R9
Chip Resistor, 0.75Ω, 1206,1%
1
TY-OHM
28
R11
Chip Resistor, 6.8KΩ, 0805, 5%
1
TY-OHM
29
R12
Chip Resistor, 3KΩ, 0805 , 5%
1
TY-OHM
30
R14
Chip Resistor, 390Ω, 0805 , 5%
1
TY-OHM
31
R15
Chip Resistor, 100KΩ, 0805 , 5%
1
TY-OHM
32
T1
Transformer, Lp=0.5mH, EE16
1
Innovative PowerTM
ActivePSRTM is a trademark of Active-Semi.
- 13 -
www.active-semi.com
Copyright © 2013 Active-Semi, Inc.
ACT412
Rev 1, 30-Oct-13
TYPICAL PERFORMANCE CHARACTERISTICS
Startup Supply Current vs. Temperature
VDD ON/OFF Voltage vs. Temperature
10.5
9.5
8.5
VDDOFF
7.5
6.5
0
40
80
5
4
-40
0
40
80
120
Temperature (°C)
Temperature (°C)
Supply Current at Operation/Fault Mode
vs. Temperature
Maximum/Minimum Switching Frequency vs.
Temperature
0.5
0.4
Fault Mode
0.3
0.2
-40
0
40
80
150
FMAX
100
50
FMIN
0
-40
120
0
40
80
120
Temperature (°C)
Temperature (°C)
VCS Voltage vs. Temperature
VFB Threshold Voltage vs. Temperature
1.5
VFB Threshold Voltage (V)
VCS_Open
VCS Voltage
1
0.5
VCS_Short
2.5
ACT412-006
ACT412-005
2
VREF
2
1.5
0
-40
ACT412-004
ACT412-003
Operation Mode
Supply Current (mA)
6
120
0.6
VCS Voltage (V)
7
3
-40
Maximum Switching Frequency (KHz)
VDDON and VDDOFF (V)
11.5
Startup Supply Current (µA)
VDDON
12.5
ACT412-002
8
ACT412-001
13.5
0
40
80
120
-40
Temperature (°C)
Innovative PowerTM
ActivePSRTM is a trademark of Active-Semi.
0
40
80
120
Temperature (°C)
- 14 -
www.active-semi.com
Copyright © 2013 Active-Semi, Inc.
ACT412
Rev 1, 30-Oct-13
TYPICAL PERFORMANCE CHARACTERISTICS
VCOMP Voltage vs. Temperature
VDDON and VDDOFF (V)
ACT412-007
VMAX
4
3
2
1
VMIN
0
-40
0
40
80
120
Temperature (°C)
Innovative PowerTM
ActivePSRTM is a trademark of Active-Semi.
- 15 -
www.active-semi.com
Copyright © 2013 Active-Semi, Inc.
ACT412
Rev 1, 30-Oct-13
PACKAGE OUTLINE
SOT23-6 PACKAGE OUTLINE AND DIMENSIONS
Active-Semi, Inc. reserves the right to modify the circuitry or specifications without notice. Users should evaluate each
product to make sure that it is suitable for their applications. Active-Semi products are not intended or authorized for use
as critical components in life-support devices or systems. Active-Semi, Inc. does not assume any liability arising out of
the use of any product or circuit described in this datasheet, nor does it convey any patent license.
Active-Semi and its logo are trademarks of Active-Semi, Inc. For more information on this and other products, contact
[email protected] or visit http://www.active-semi.com.
is a registered trademark of Active-Semi.
Innovative PowerTM
ActivePSRTM is a trademark of Active-Semi.
- 16 -
www.active-semi.com
Copyright © 2013 Active-Semi, Inc.