ETC IW1692

iW1692
Low-Power Off-line Digital PWM Controller
1.0 Features
2.0 Description
• Primary-side feedback eliminates opto-isolators and
simplifies design
• Multi-mode operation for highest overall efficiency
• Built-in cable drop compensation
• Very tight output voltage regulation
• No external loop compensation components required
• Complies with CEC/EPA/IEC no load power consumption
and average efficiency regulations
• Built-in output constant-current control with primary-side
feedback
• Low start-up current (10 µA typical)
• Built-in soft start
• Built-in short circuit protection
• AC line under/overvoltage and output overvoltage
protection
• 40 kHz PWM switching frequency
The iW1692 is a high performance AC/DC power supply
controller which uses digital control technology to build
peak current mode PWM flyback power supplies. The device
provides high efficiency along with a number of key built-in
protection features while minimizing the external component
count and bill of material cost. The iW1692 removes the need
for secondary feedback circuitry while achieving excellent
line and load regulation. It also eliminates the need for loop
compensation components while maintaining stability over
all operating conditions. Pulse-by-pulse waveform analysis
allows for a loop response that is much faster than traditional
solutions, resulting in improved dynamic load response. The
built-in power limit function enables optimized transformer
design in universal off-line applications and allows for a wide
input voltage range.
The low start-up power and PFM operation at light load
ensure that the iW1692 is ideal for applications targeting the
newest regulatory standards for standby power.
3.0 Applications
• Low power AC/DC adapter/chargers for cell phones,
PDAs, digital still cameras
• PFM operation at light load
• Built-in ISENSE pin short protection
• Standby supplies for televisions, DVDs, set-top boxes
and other consumer electronics
• Space-saving SOT-23 package
L
N
+
+
+
VOUT
RTN
+
4
VCC
5
ISENSE
6
VIN
OUTPUT
3
GND
2
VSENSE
1
U1
iW1692
Figure 2.0.1 iW1692 Typical Application Circuit
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4.0 Pinout Description
iW1692
1
VSENSE
2
GND
3
OUTPUT
VIN
6
ISENSE
5
VCC
4
Pin #
Name
Type
Pin Description
1
VSENSE
Input
Voltage sense input from the auxiliary winding.
2
GND
Ground
Ground connection.
3
OUTPUT
Output
Gate drive output for the external power MOSFET switch.
4
VCC
Input
Supply voltage.
5
ISENSE
Input
Primary current sense. Used for cycle-by-cycle peak current control and limit.
6
VIN
Input
Senses average rectified input voltage.
5.0 Absolute Maximum Ratings
Absolute maximum ratings are the parametric values or ranges which can cause permanent damage if exceeded. For
maximum safe operating conditions, refer to Electrical Characteristics in Section 6.0.
Parameter
Symbol
Value
Units
DC supply voltage range (pin 4, ICC = 20mA max)
VCC
-0.3 to 18
V
DC supply current at VCC pin
ICC
20
mA
Output (pin 3)
-0.3 to 18
V
VSENSE input (pin 1)
-0.3 to 4.0
V
ISENSE input (pin 5)
-0.3 to 4.0
V
VIN input (pin 6)
-0.3 to 18
V
Power dissipation at TA ≤ 25°C
PD
400
mW
Maximum junction temperature
TJ (MAX)
125
°C
Storage temperature
TSTG
–65 to 150
°C
Lead temperature during IR reflow for ≤ 15 seconds
TLEAD
260
°C
θJA
240
°C/W
ESD rating per JEDEC JESD22-A114 (HBM)
2,000
V
Latch-Up test per JEDEC 78
±100
mA
Thermal resistance junction-to-ambient
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6.0 Electrical Characteristics
VCC = 12 V, -40°C ≤ TA ≤ 85°C, unless otherwise specified (Note 1)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
366
407
448
mV
10
15
µA
VIN SECTION (Pin 6)
Start-up voltage threshold
VINST
TA= 25°C, positive edge
Start-up current
IINST
VIN = 10 V, CVCC = 10 µF
ROUTPUT = 10 kW to GND
Shutdown low voltage threshold
VUVDC
TA= 25°C
216
240
264
mV
Shutdown high voltage threshold
VOVDC
TA= 25°C
1.834
1.988
2.123
V
Input impedance
ZIN
After start-up
IBVS
VSENSE = 2 V
20
kW
VSENSE SECTION (Pin 1)
Input leakage current
1
μA
Nominal voltage threshold
VSENSE(NOM)
TA=25°C, negative edge
1.523
1.538
1.553
V
Output OVP threshold
VSENSE(MAX)
TA=25°C, negative edge
1.683
1.700
1.717
V
OUTPUT SECTION (Pin 3)
Output low level ON-resistance
RDS(ON)LO
ISINK = 5 mA
45
100
W
Output high level ON-resistance
RDS(ON)HI
ISOURCE = 5 mA
65
100
W
Rise time (Note 2)
tR
TA = 25°C, CL = 330 pF
10% to 90%
40
75
ns
Fall time (Note 2)
tF
TA = 25°C, CL = 330 pF
90% to 10%
40
75
ns
Output switching frequency
fS
ILOAD > 15% of maximum
40
44
kHz
16
V
36
VCC SECTION (Pin 4)
Maximum operating voltage
VCC(MAX)
Start-up threshold
VCC(ST)
VCC rising
11.0
12.0
13.2
V
Undervoltage lockout threshold
VCC(UVL)
VCC falling
5.5
6.0
6.6
V
2.5
3.5
mA
Operating current
ICCQ
CL = 330 pF, VSENSE = 1.5 V
ISENSE SECTION (Pin 5)
Peak limit threshold
VPEAK
1000
mV
CC limit threshold
VCC-TH
900
mV
Notes:
Note 1. Adjust VCC above the start-up threshold before setting at 12 V.
Note 2. These parameters are not 100% tested, guaranteed by design and characterization.
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7.0 Typical Performance Characteristics
12.4
VCC Start-up Threshold (V)
VCC Supply Current (mA)
2.8
2.6
12.3
2.4
2.2
12.2
2.0
12.1
1.8
1.6
VCC = 12 V
TA = 25°
0
200
400
600
800
Load Capacitance (pF)
1000
12.0
Figure 7.0.1 Supply Current vs. Load Capacitance
Internal Reference Voltage (V)
Switching Frequency (kHz)
0
25
50
Ambient Temperature (°C)
75
100
2.015
42
40
38
VCC = 12 V
-50
-25
0
25
50
Ambient Temperature (°C)
75
100
2.010
2.005
2.000
1.995
Figure 7.0.2 Switching Frequency vs. Temperature
-25
Figure 7.0.3 Start-Up Threshold vs. Temperature
44
36
-50
VCC = 12 V
-50
-25
0
25
50
Ambient Temperature (°C)
75
100
Figure 7.0.4 Internal Reference vs. Temperature
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8.0 Functional Block Diagram
VIN
4
6
VIN_A
0.2 V ~ 2.0 V
VSENSE
1
Start-up
VINSW
VINSW
Signal
Conditioning
VCC
ADC
Gate
Driver
Digital
Logic
Control
VVMS
OUTPUT
3
VFB
VOCP
GND
–
+
2
1.0 V
ISENSE
5
DAC
IPEAK
VIPK
0.2 V ~ 0.9 V
+
– –
Figure 8.0.1 iW1692 Functional Block Diagram
9.0 Theory of Operation
The iW1692 is a digital controller which uses a new,
proprietary primary-side control technology to eliminate the
opto-isolated feedback and secondary regulation circuits
required in traditional designs. This results in a low-cost
solution for low power AC/DC adapters. The core PWM
processor uses fixed-frequency Discontinuous Conduction
Mode (DCM) operation at heavy load and switches to variable
frequency operation at light loads to maximize efficiency.
Furthermore, iWatt’s digital control technology enables fast
dynamic response, tight output regulation, and full featured
circuit protection with primary-side control.
Furthermore, accurate secondary constant-current operation
is achieved without the need for any secondary-side sense
and control circuits.
Referring to the block diagram in Figure 8.0.1, the digital
logic control generates the switching on-time and off-time
information based on the line voltage and the output voltage
feedback signal. The system loop is internally compensated
inside the digital logic control, and no external analog
components are required for loop compensation. The iW1692
uses an advanced digital control algorithm to reduce system
design time and improve reliability.
iWatt’s digital control scheme is specifically designed to
address the challenges and trade-offs of power conversion
design. This innovative technology is ideal for balancing new
regulatory requirements for green mode operation with more
practical design considerations such as lowest possible cost,
smallest size and high performance output control.
The iW1692 uses PWM mode control at higher output
power levels and switches to PFM mode at light load to
minimize power dissipation. Additional built-in protection
features include overvoltage protection (OVP), output
short circuit protection (SCP), AC low line brown out, over
current protection, single pin fault protection and ISENSE fault
detection.
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9.1 Pin Detail
Start-up
Sequencing
Pin 1 – VSENSE
Sense signal input from auxiliary winding. This provides the
secondary voltage feedback used for output regulation.
VIN
Pin 2 – GND
Analog, digital and power ground.
VCC
Pin 3 – OUTPUT
Gate drive signal for the external power MOSFET switch.
VINSW
OFF
ON
Pin 4 – VCC Power supply for the controller during normal operation.
The controller starts up when VCC reaches 12 V (typical) and
shuts-down when the VCC voltage is below 6 V (typical). A
100 nF decoupling capacitor should be connected between
the VCC pin and GND.
Pin 5 – ISENSE
Primary current sense.
Pin 6 – Vin
Sense signal input representing the instantaneous rectified
line voltage. VIN is used for line regulation. The internal
impedanace is 20 kW and the scale factor is 0.0043. It also
provides input undervoltage and overvoltage protection.
This pin also provides the supply current to the IC during
start-up.
9.2 Start-up
Prior to start-up the VIN pin charges up the VCC capacitor,
through the diode between VIN and VCC. When VCC is fully
charged to a voltage higher than VCC(ST) threshold, then the
VIN_SW turns on and the analog-to-digital converter begins to
sense the input voltage. The iW1692 commences soft-start
function as soon as the voltage on VIN pin is above VINST.
The iW1692 incorporates an internal soft-start function. The
soft-start time is set at 3.0 ms. Once the VIN pin voltage has
reached its turn-on threshold, the iW1692 starts switching,
but limits the on-time to a percentage of the maximum ontime. During the first 1 ms, the on-time is limited to 25%.
During the next 1 ms, the on-time is limited to 50% and
during the last 1 ms, the on-time is limited to 75%.
If at any time the VCC voltage drops below VCC(UVL) threshold
then all the digital logic is fully reset. At this time the VIN_SW
switches off so that the VCC capacitor can be charged up
again.
VIN Impedance = 20kΩ
VCC(ST)
ENABLE
200µs
Figure 9.2.1 Start-up Sequencing Diagram
9.3 Understanding Primary Feedback
Figure 9.3.1 illustrates a simplified flyback converter. When
the switch Q1 conducts during tON, the current ig is directly
drawn from rectified sinusoid vg. The energy Eg is stored
in the primary winding. The rectifying diode D1 is reverse
biased and the load current IO is supplied by the secondary
capacitor CO. When Q1 turns off, D1 conducts and the stored
energy Eg(t) is delivered to the output.
iin(t)
+
ig(t)
id(t)
D1
NS
NP
vg(t)
vin(t)
VO
+
CO
IO
NAUX
–
VAUX
TS(t)
Q1
Figure 9.3.1 Simplified Flyback Converter
In order to regulate the output voltage within a tight
specification, the information about the output voltage and
load current needs to be accurately sensed. In the DCM
flyback converter, this information can be read via the
auxiliary winding or the primary magnetizing inductance
(LM). During the Q1 on-time, the load current is supplied from
the output filter capacitor CO. The voltage across the primary
winding is vg(t), assuming the voltage dropped across Q1 is
zero. The current in Q1 ramps up linearly at a rate of:
dig (t )
dt
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=
vg (t )
LM
(9.1)
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Low-Power Off-line Digital PWM Controller
At the end of on-time, the current has ramped up to:
ig (t ) =
vg (t ) × tON (t )
LM
(9.2)
9.4 Understanding CC and CV mode
This current represents a stored energy of:
Eg =
LM
× ig (t ) 2
2
(9.3)
When Q1 turns off, ig(t) in LM forces a reversal of polarities on
all windings. Ignoring the communication-time caused by the
leakage inductance LK at the instant of turn-off, the primary
current transfers to the secondary at an amplitude of:
id (t ) =
NP
× ig (t )
NS
(9.4)
The real-time waveform analyzer in the iW1692 reads this
information cycle by cycle and then generates a feedback
voltage VFB. The VFB signal precisely represents the output
voltage and is used to regulate the output voltage.
Assuming the secondary winding is master, the auxiliary
winding is slave.
See equation 9.5
The constant current mode (CC mode) is useful in battery
charging applications. During this mode of operation
the iW1692 will regulate the output current at a constant
maximum level regardless of the output voltage drop, while
avoiding continuous conduction mode.
To achieve this regulation the iW1692 senses the load
current indirectly through the primary current. The primary
current is detected by the ISENSE pin through a resistor from
the MOSFET source to ground (RSS). This resistor value is
given by:
RSS =
N × KC
2 × I OUTMAX
(9.6)
N is the ratio of primary turns to secondary turns of the
transformer and KC is given as 0.264 V.
9.5 Constant Voltage Operation
VAUX
After soft-start is completed, the digital control block measures
the output conditions. If the ISENSE signal is not consistently
over 0.9 V, then the device will operate in constant voltage
mode.
0V
VAUX = -VG x
NAUX
NP
If no voltage is detected on VSENSE after 20 pulses, it is
assumed that the auxiliary winding of the transformer is
either open or shorted and the iW1692 shuts down.
Figure 9.3.2 Auxiliary Voltage Waveforms
As long as calculated TON for CV is less than the TON in CC
the IC operates in constant voltage mode.
The auxiliary voltage is given by:
VAUX =
N AUX
(VO + ∆V )
NS
(9.5)
and reflects the output voltage as shown in Figure 9.3.2.
The voltage at the load differs from the secondary voltage by
a diode drop and IR losses. The diode drop is a function of
current, as are IR losses. Thus, if the secondary voltage is
always read at a constant secondary current, the difference
between the output voltage and the secondary voltage is a
fixed ΔV. Furthermore, if the voltage can be read when the
secondary current is small, ΔV is small.
9.6 Constant Current Operation
The iW1692 has been designed to work in constant-current
mode for battery charging applications. If the output voltage
drops, but does not go below 20% of the nominal designed
value, the device operates in this mode.
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9.10 Voltage Protection Functions
CV mode
The iW1692 includes functions that protect against input
and output overvoltage.
CC mode
Output Voltage
VNOM
Output Current
IOUT(CC)
The input voltage is monitored by the VIN pin and the output
voltage is monitored by the VSENSE pin. If the voltage at these
pins exceed their undervoltage or overvoltage thresholds for
more than 6 cycles, the iW1692 shuts-down immediately.
However, the IC remains biased which discharges the VCC
supply. Once VCC drops below the UVLO threshold, the
controller resets itself and then initiates a new soft-start
cycle. The controller continues attempting start-up, but does
not fully start-up until the fault condition is removed.
The output voltage can be high enough to damage the
output capacitor when the feedback loop is broken. The
iW1692 uses the primary feedback only with no secondary
feedback loop. When the VSENSE pin is shorted to GND (by
shorting/open sense resistor). The controller will shut off with
6 consecutive pulses after start-up.
Figure 9.6.1 Modes of operation
9.7 Variable Frequency Mode
The iW1692 is designed to operate in discontinuous
conduction (DCM) mode at a fixed frequency of 40 kHz in
both CC and CV modes. To avoid operation in continuous
conduction (CCM) mode, the iW1692 checks for the falling
edge of the VSENSE input on every cycle. If a falling edge of
VSENSE is not detected during the normal 25μs period, the
switching period is extended until the falling edge VSENSE
does occur. If the switching period reaches 75μs without
VSENSE being detected, the iW1692 immediately shuts off.
9.8 PFM Mode at Light Load
The iW1692 operates in a fixed frequency PWM mode
when IOUT is greater than approximately 5% of the specified
maximum load current. As the output load IOUT is reduced,
the on-time tON is decreased. At the moment that tON drops
below tON_MIN, the controller transitions to Pulse Frequency
Modulation (PFM) mode. Thereafter, the on-time is modulated
by the line voltage and the off-time is modulated by the load
current. The device automatically returns to PWM mode
when the load current increases.
9.11 Cable Drop Compensation
The iW1692-30 incorporates an innovative method to
compensate for any IR drop in the secondary circuitry
including cable and cable connector. A 5 W AC adapter with
5 VDC output has 6% deviation at 1 A load current due to
the drop across the DC cable without cable compensation.
The iW1692-30 cancels this error by providing a voltage
offset to the feedback signal based on the amount of load
current detected. The iW1692-30 has 300mV of cable drop
compensation at maximum current. The iW1692-00 does
not include any cable drop compensation.
9.9 Internal Loop Compensation
The iW1692 incorporates an internal Digital Error Amplifier
with no requirement for external loop compensation. The
loop stability is guaranteed by design to provide at least 45
degrees of phase margin and –20dB of gain margin.
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Low-Power Off-line Digital PWM Controller
10.0 Design Example
10.1 Design Procedure
Parameter
This design example gives the procedure for a flyback
converter using iW1692. Refer to figure 12.0.1 for the
application circuit. The design objectives for this adapter
are given in table 10.1. It meets UL, IEC, and CEC
requirements.
Symbol
VIN
85 - 264 VRMS
Frequency
fIN
47 - 64 Hz
No Load Input
PIN
200 mW
Input Voltage
Output Voltage
VOUT_CABLE
4.95 - 5.05 V
Output Current
IOUT
1 A
Output Ripple
VRIPPLE
<100 mV
POUT
5 W
h
65%
Power Out
Determine the Design Specifications
(Vout, Iout_max, Vin_max, Vin_min, efficiency, and ripple)
CEC Efficiency
Determine Cable Drop Compensation
Table 10.1 iW1692 Design Specification Table
10.2 Cable Drop Compensation
Determine Rvin Resistors
Cable Drop Compensation is an option included in the
iW1692-30. This option helps maintain the output voltage
at the end of the cable that the power supply is designed
for. During CV (constant voltage) mode the output current
changes as the voltage remains constant. This is true for
the output voltage at the output of the power supply board;
however, in certain applications the device to be charged
is not directly connected to the power supply, but rather,
is connected via a cable. This cable is seen by the power
supply as a resistance. So as the output current increases
the output voltage at the end of the cable begins to drop. With
the cable compensation option the iW1692 can compensate
for the resistance of the cable by incrementally increasing
the output voltage seen on the power supply board to cancel
out the selected cable resistance.
Determine Turns Ratio
Determine Input Bulk Capacitance
Determine Current Sensing Resistor
Determine Magnetizing Inductance
Determine Primary Turns
Determine Secondary Turns
No
Can you wind this transformer ?
Yes
Determine Vsense Turns and Resistors
Determine Bias Turns
Is the real cable drop compensation value OK ?
Yes
Determine Output Capacitance
Determine Snubber Network
Determine Ton Delay Compensation
Finish
Figure 3.0.1: Design Flow Chart
Figure 10.0.1 iW1692 Design Flow Chart
Range
No
To find the right cable compensation type for a given cable
pick the cable drop compensation number that is closest to
the voltage drop of the cable under maximum output current.
Use equation 10.1 for VOUT, where VFD is the forward voltage
of the output diode:
VOUT = VOUT _ CABLE + VCABLE _ DROP _ COMPENSATION + V fd (10.1)
Using equation 10.1 we know for this design VOUT is 5.5 V,
assuming no cable drop compensation is chosen and the
forward drop on the output diode (VFD) is 500 mV.
10.3 Input Selection
VIN resistors are chosen primarily to scale down the input
voltage for the IC. The scale factor for the input voltage in the
IC is 0.0043 and the internal impedance of this pin is 20 kΩ.
Therefore, the VIN resistors should equate to:
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RVin =
20k W
− 20k W = 4.63M W
0.0043
(10.2)
From equation 10.2, ideally RVIN should be 4.63 MΩ because
R10 and R11 add up to approximately 4.6 MΩ. By selecting
the value of RVIN, the (VIN·TON)MAX_LIMIT and (VIN·TON)PFM are
determined:
(VIN ⋅ TON )MAX _ LIMIT
(VIN ⋅ TON )PFM
= 0.0043 ×
= 0.0043 ×
900V ⋅m s
 20k W 


 RVin + 20k W  (10.3)
185V ⋅m s
 20k W 


 RVin + 20k W  The product of VIN and TON is typically chosen by equation
10.9 for CC limit performance. For this example we choose
750 V·μs.
700V ⋅ms < (VIN × TON )MAX < 850V ⋅m s
Assuming TON_MAX is 9.7µs and TDEAD is typically about 4.8 ms,
solving for the minimum turns ratio yields.
TRESET _ MAX = 25m s − 9.7m s − 4.8m s
TRESET _ MAX = 10.5m s
Ntr _ MIN =
(10.4)
Keep in mind by changing RVIN to be something other than
4.63 MΩ the minimum and maximum input voltage for startup will also change.
Since the iW1692 uses the exact scaled value of VIN for its
calculations, C6 should be included to filter out any noise that
may appear on the VIN signal. This is especially important for
line-in surge conditions.
Ntr _ MAX =
(VIN × TON )PFM
TRESET _ MIN × VOUT
(10.5)
To avoid continuous conduction the turns ratio must be high
enough so that TRESET does not exceed TPERIOD – TON – TDEAD.
TPERIOD is given by the PWM switching frequency of 40 kHz.
TRESET_MAX is given by:
TRESET _ MAX = TPERIOD − TON _ MAX − TDEAD
(10.6)
Ntr _ MIN =
(VIN × TON )MAX
TRESET _ MAX × VOUT
(10.7)
(VIN×TON)PFM is limited by the iW1692 to be 185 V·μs, and
TRESET_MIN is required by the IC to be 2.3 μs.
Ntr _ MAX
185V ⋅m s
=
= 15
2.3m s× 5.5V
750V ⋅m sec
(10.5m sec )× 5.5V
(10.8)
= 13
(10.11)
10.5 Input Bulk Capacitor
The input bulk capacitance (C1 // C2) is chosen to maintain
enough input power to sustain constant output power even
as the input voltage is dropping. In order for this to be true
the minimum total input bulk capacitance must be:
C1 + C2 =
PIN =

 VINDC _ MIN
 arcsin  2 ×VINAC _ MIN
2 × PIN × 
2π








(10.12)
2
2
(2VINAC
_ MIN − VINDC _ MIN ) × f line
VOUT × I OUT
hPowerSupply
VINAC_MIN is the minimum input voltage (rms) to be inputted
into the power supply and ƒline is the lowest line frequency for
the power supply (in this case 47 Hz). VINDC_MIN is calculated
based on the (VIN × TON)MAX product.
VINDC _ MIN =
Thus, the minimum turns ratio is given by:
(10.10)
Pick a number between the maximum and minimum turns
ratio; in the example the turn ratio is 13. A turns ratio in the
range of 11 to 15 is suggested for optimal performance.
10.4 Turns Ratio
The maximum allowable turns ratio between the primary and
secondary winding is determined by the minimum detectable
reset time of the transformer, during PFM mode
(10.9)
(VIN × TON )MAX
TON _ MAX
(10.13)
First we must find TON_MAX to get VINDC_MIN. In order for the
power supply to function in discontinuous conduction mode
TON_MAX should be smaller than the switching period minus
the transformer reset time. Given that the transformer reset
time is:
TRESET =
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(VIN × TON )MAX
Ntr ⋅ VOUT
(10.14)
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Low-Power Off-line Digital PWM Controller
Then the maximum on-time must be:
TON _ MAX = TPERIOD −
(VIN × TON )MAX
Ntr ⋅ VOUT
VIsense _ CC =
− TDEAD
(10.15)
TDEAD is about 4.8 μs. Knowing TPERIOD has to be 25 μs,
because of the 40 kHz switching frequency:
TON _ MAX = 25m s −
750V ⋅m s
− 4.8m s = 9.7m s
13 × 5.5V
(10.16)
From this result we can now get VINDC_MIN from equation
10.13:
VINDC _ MIN =
(VIN × TON )MAX
TON _ MAX
= 77.2V
(10.17)
Substituting VINDC_MIN into equation 10.12 we get:
(
C1 + C2 =
 arcsin 77.2V
2 ×85V
2 × 6.41W × 

2π

2
2
(2 × (85V ) − (77.2V ) ) × 47 Hz
= 12.06mF
(10.18)
Increase the value of C1 // C2 to account for efficiency
losses. For this example, 13.6 µF is chosen.
10.6 Current Sense Resistor
The ISENSE resistor determines the maximum current output
of the power supply. The output current of the power supply
is determined by:
I OUT = 12 × N tr × I PRI _ PK ×
TRESET
TPERIOD
(10.19)
When the maximum current output is achieved the voltage
seen on the ISENSE pin (VISENSE) should reach its maximum.
Thus, at constant current limit:
I PRI _ PK =
VIsense _ CC
RIsense
(10.20)
2 × I OUT × RIsense TPERIOD
×
Ntr
TRESET
(10.21)
During constant current mode, where output current is at
its maximum, the first term in Equation 10.21 is constant.
Therefore, we can call this KC. Substituting this back into
equation 10.21 we get:
For iW1692 KC is 0.264 V, therefore RIsense depends on the
maximum output current by:
RIsense =
Ntr × K C
× hx
2 × I OUT
(10.23)
Using this equation and Ntr from section 10.4:
RIsense =
13 × 0.264V
× 87% = 1.5W
2 × 1A
(10.24)
We recommend using ±1% tolerance resistors for RIsense.
10.7 Magenitizing Inductance
Although the constant current limit does not depend on the
magnetizing inductance, there are still restrictions on the
magnetizing inductance. The maximum LM is limited by the
amount of power that needs to come out of the transformer
in order for the power supply to regulate. This is given by:
(VIN × TON )2MAX × 40kHz
LM _ MAX =
2 × PXFMR _ MAX
PXFMR _ MAX
(10.25)
(VOUT − V fd )× IOUT
=
hX
The minimum LM is limited by the maximum allowable
primary peak current (IPRI_PK). 0.9 V on the ISENSE pin should
correspond to the maximum allowable primary peak current.
Therefore, the maximum primary peak current is:
I PRI _ PK <
0.9V
RIsense
(10.26)
Thus, LM is limited by:
LM _ MIN =
Substituting this into equation 10.19 gives:
VIsense _ CC =
(10.22)
A feature of the iW1692 is the lack of dependence on the
magnetizing inductance for the CC curve.
)


TPERIOD
× KC
TRESET
(VIN ⋅ TON )MAX
0.9V RIsense
(10.27)
There is also a lower limit on ISENSE signal of 0.2 V. This gives
a second maximum value on LM; compare this with the value
obtained from equation 10.25 and pick the smaller of the two
values.
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iW1692
Low-Power Off-line Digital PWM Controller
LM _ MAX =
10.8 Primary Winding
2
2 × PXFMR _ MAX × RIsense
(0.2V )2 × 40kHz
(10.28)
Assuming that the efficiency of the transformer is about 87%,
we can obtain the amount of power that needs to come out
of the transformer as:
POUT
.87
= 5W
.87
= 5.75W
(10.29)
Substituting this into equation 10.25 we get:
LM _ MAX =
(750V ⋅m s )2 × 40kHz
2 × 5.75W
= 1.96mH
(10.30)
To get the minimum value of the primary inductance, use the
value for RISENSE from equation 10.24.
I PRI _ PK <
0.9V
= .6 A
1.5W
(10.31)
Substituting this primary peak current into equation 10.27:
LM _ MIN =
750V ⋅m sec
= 1.25mH
0.9V 1.5W
(10.32)
Choose a primary inductance somewhere between 1.91 mH
and 1.42 mH; we chose 1.5 mH.
Given a nominal LM, we can now find the minimum turns ratio
between primary and secondary that ensures the power
supply does not function at variable frequency (VF) mode
before a certain desired voltage VOUT_VF. Under VF mode
the constant current IOUT may not be as accurate as in pulse
width modulation mode.
VOUT _ VF × I OUT × 2 × LM × TPERIOD
Ntr _ VF =
hx
VOUT _ VF × TRESET
(10.33)
VOUT _ SHUTDOWN × I OUT × 2 × LM × TPERIOD
hx
2 × VINAC _ MIN
N PRI ≥
(VIN ⋅ TON )MAX
BMAX × Ae
(10.34)
Where: BMAX is maximum flux density and Ae is the crosssectional area of the core.
Picking (VIN×TON)MAX to be 750 V·μsec and getting the
maximum flux density and core area from the transformer
datasheet, we can calculate the minimum number of turns
for the primary winding. Substitute BMAX as 320mT and the
area of the core to be 19.2 mm2 we solve equation 10.35 to
get:
N PRI ≥
750V ⋅m s
320mT × 19.2mm 2
= 122.1turns
(10.36)
To avoid hitting the maximum flux density, pick a value for NPRI
to be higher than this. In this example 144 turns is picked.
10.9 Secondary Winding
From the primary winding turns, we obtain the secondary
winding.
N SEC . =
N PRI
Ntr
(10.37)
Thus, in our example:
N SEC =
144
= 11 turns
13
(10.38)
At this point it is advantageous to make sure the primary
winding and secondary winding chosen is actually feasible
to wind.
VCC is the supply to the iW1692 and should be between 12
V and 16 V. Capacitor C7 stores the VCC charge during IC
operation and the controller checks this voltage and makes
sure it’s within range. The zener, Z1 protects the IC from
getting a VCC over voltage. Thus the number of auxiliary
windings needs to ensure that VCC does not exceed 16 V.
N BIAS =
(10.35)
10.10 Bias Winding
and:
TON =
In order to keep the transformer from saturation, the maximum
flux density must not be exceeded. Therefore the minimum
primary winding on the transformer must meet:
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(
N SEC × VCC + V fd
VOUT
)
(10.39)
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iW1692
Low-Power Off-line Digital PWM Controller
The number of auxiliary windings can be calculated using
equation 10.39.
N BIAS =
11turns × 12.5V
= 25turns
5.5V
(10.40)
Here we’ve actually chosen a lower number for the bias
winding, 22 turns.
10.11 VSENSE Resistors and Winding
The output voltage regulation is mainly determined by the
feedback signal VSENSE.
VSENSE = VOUT _ PCB × K SENSE
(10.41)
Where:
K SENSE =
N
R4
× Vsense
R4 + R3 N SEC
(10.42)
Internally, VSENSE is compared to a reference voltage
VSENSE(NOM). From equation 10.41 we get:
K SENSE
1.538V
=
= 0.3
5V − 0V
(10.43)
Solving for R4 in equation 10.42 assuming R3 is 20 kΩ, and
NVSENSE is 24 turns we get R4 should be around 3 kΩ.
Since the iW1692 uses the VSENSE signal to determine the
regulation point, this signal can not be too noisy. Thus, C8 is
used to help filter the VSENSE signal.
10.12 Output Capacitors
The output capacitors are important for controlling the
output voltage ripple of the power supply. This is because
the amount of charge stored on a capacitor is related to the
voltage seen across the capacitor thus, how much charge is
lost before the next switching cycle is the ripple on the output
voltage. Assuming an ideal capacitor where ESR (equivalent
series resistance) and ESL (equivalent series inductance)
are negligible then:
COUT =
QOUT
VOUT _ RIPPLE _ PK
(10.44)
Since charge is equal to current times time.
COUT =
I OUT × TOFF _ MAX
VOUT _ RIPPLE _ PK
(10.45)
Assuming we want to get under 50 mV of ripple on the output,
we substitute this into equation 10.45 to get:
COUT =
1A × 25m sec
= 500mF
50mV
(10.46)
In this calculations ESR and ESL are ignored; the reason
this calculation is still valid is because of the second stage
LC filter, L3 and C11. These two components reduce the
ESR and ESL ripple.
10.13 Snubber Network
The snubber network is implemented to reduce the voltage
stress on the MOSFET immediately following the turn off of
the gate drive. The goal is to dissipate the energy from the
leakage inductance of the transformer. For simplicity and
a more conservative design first assume the energy of the
leakage inductance is only dissipated through the snubber.
Thus:
1
2 × Llk
2
× I pri
_ pk =
1
 2
2 × C3 × V pk
2 
− Vval

(10.47)
LLK can be measured from the transformer, IPRI_PK is 0.9 V
divided by RISENSE, and VPK is the peak VDS of the MOSFET.
Choose C3, keeping in mind that the larger the value of C3
you choose, the lower the voltage stress is that is applied
to the MOSFET. However, capacitors are more expensive
the larger their capacitance. Choose C3 based on these two
criteria and select VPK and VVAL. Now a resistor needs to be
selected to dissipate VPK to VVAL during the on-time of the
gate driver. The dissipation of this resistor is given by:
−Tperiod
Vval
R5 ⋅C3
=e
V pk
(10.48)
Using equation 10.48 solve for R5. This will give a
conservative estimate of what C3 and R5 should be.
Included in the snubber network is also a resistor (R6) in
series with the diode (D6). D6 directs the current to C3
when the MOSFET is turned off; however there is some
reverse current that goes through the diode immediately
after the MOSFET is turned back on. This reverse current
occurs because there is a short period of time when the
diode still conducts after switching from forward biased to
reverse biased. This conduction will distort the falling edge
of the VSENSE curve and affect the operation of the IC. So,
the resistor, R6, is there to diminish the reverse current that
goes through D6 immediately after the MOSFET is turned
on.
The maximum off-time during maximum output current is 25 μs.
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iW1692
Low-Power Off-line Digital PWM Controller
10.14 ON-Time Delay Filter
iW1692 also contains a feature that allows for adjustment
to match high line and low line constant current curves. The
mismatch in high line and low line curves is due to the delay
from the IC propagation delay, driver turn on delay, and the
MOSFET actually turn on delay. The driver turn on delay is
further increased by R9; this is to lessen the amount of stress
on the MOSFET during turn on. To adjust for these delays the
iW1692 factors these delays into its calculations and slightly
over compensates for them to provide flexibility. R15 and C5
provide extra delay in the circuit to tweak the compensation.
To determine values R15 and C5 follow these steps:
1. Measure the difference between high line and low line
constant current limit without R15 and C5.
2. Find the curve that best matches this difference from
Figure 11.0.7.
3. Find the LM that matches the power supply. Match the
tRC.
4. Find R15 and C5 from equation 10.49:
t RC = R15 × C5 (10.49)
We observe that the difference between high line and low
line constant current limit is 20 mA. Matching the primary
inductance 2 mH and the curve, we find tRC to be 4.4×10-8
s. We then pick R15 to be 1 kΩ and substitute into equation
10.50.
4.4 ⋅10−8 sec = 1k W × C5 (10.50)
Solving for C5 in equation 10.54, we get 44 pF. The result
should be a match between high line and low line constant
current curves. See figure 11.0.7 for details.
10.15 PCB Layout
In the iW1692, there are two signals that are important to
control output performance; these are the ISENSE signal and
the VSENSE signal. The ISS resistor should be close to the
source of the MOSFET to avoid any trace resistance from
contaminating the ISENSE signal. Also the ISENSE signal should
be placed close to the ISENSE pin. The VSENSE signal should be
placed close to the transformer to improve the quality of the
sensing signal.
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iW1692
Low-Power Off-line Digital PWM Controller
11.0 Design Example Performance Characteristics
74
Efficiency (%)
70
66
64
60
56
52
90 VAC
264 VAC
0
250
500
750
Output Current (mA)
1000
Figure 11.0.1 VSENSE Efficiency at 90 VAC and 264 VAC
Figure 11.0.4 VSENSE Short Before Start-up (no load)
Figure 11.0.2 Regulation without Cable Drop Compensation
Figure 11.0.5 ISENSE Short at 90 VAC
Figure 11.0.3 Regulation with Cable Drop Compensation
Figure 11.0.6 output Short Fault (50% load)
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iW1692
Low-Power Off-line Digital PWM Controller
11.0 Design Example Performance Characteristics
180
50 mA
40 mA
30 mA
20 mA
10 mA
(R15 x C5), τRC (ns)
150
120
90
60
30
0
0
0.75
1.50
2.25
Magnetizing Inductance LM (mH)
3.0
Figure 11.0.7. TON Compensation Chart
12.0 Application Circuit
F1
10 Ω
D1 - D4
IN4007
L
L1
1 mH
N
C1
6.8 µF/400 V
R9
100 Ω
Q1
R15
1 kΩ
+
+
R1
4.7 kΩ
C2
6.8 µF/400 V
R13
56 kΩ
OUTPUT
5
ISENSE
R11
2.2 MΩ
R6
150Ω
C5
47 pF
+
+
R14
560Ω
5V/1A
RTN
C11
330 µF/10V
D6
R16
100 Ω
R3
20kΩ
VSENSE 1
GND
C3
1 nF/500 V
C10
650 µF/10 V
VCC 4
VIN 6
2
R18
1.5 Ω
R5
100 kΩ
R10
2.43 MΩ
U1
iW1692
3
L3
1µH
T1-A
Z1
15V
R4
C7
C6
C8
3.0 kΩ
68 pF 470 pF 470 nF
C9
4.7µF
T1-B
D5
FR102
R12
1Ω
Figure 12.0.1. Typical Application Circuit
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iW1692
Low-Power Off-line Digital PWM Controller
13.0 Physical Dimensions
6-Lead Small Outline Transistor Package
5
6
4
Symbol
D
MIN
MAX
A
-
1.45
A1
0.00
0.15
A2
0.90
1.30
B
0.30
0.50
C
D
0.08
0.22
2.90 BSC
2.80
3.00
E
E1
1
2
3
e
e1
A1
A2
B
COPLANARITY
0.10
A
SEATING
PLANE
α
E
2.80 BSC
E1
1.65 BSC
e
0.95 BSC
e1
L
C
Millimeters
1.90 BSC
L
0.30
0.60
α
0°
8°
Compliant to JEDEC Standard MO-178AB
Controlling dimensions are in millimeters
Figure 13.0.1. Physical dimensions, 6-lead SOT-23 package
14.0 Ordering Information
Part Number
Mark
Option
Package
Operating Temp. Range
Description
iW1692-00
Cxxx
Cable Drop Compensation, 0 mV
SOT23-6L
-40°C ≤ TA ≤ 85°C
Tape & Reel1
iW1692-30
Dxxx
Cable Drop Compensation, 300 mV
SOT23-6L
-40°C ≤ TA ≤ 85°C
Tape & Reel1
Note 1: Tape & Reel packing quantity is 3,000 units.
Note 2: In the mark column, “xxx” represents the lot ID code. Refer to ILG-005 device marking specification for
more detailed information.
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iW1692
Low-Power Off-line Digital PWM Controller
About iWatt
iWatt Inc. is a fabless semiconductor company that develops intelligent power management ICs for computer, communication,
and consumer markets. The company’s patented pulseTrain™ technology, the industry’s first truly digital approach to power
system regulation, is revolutionizing power supply design.
Trademark Information
© 2007 iWatt, Inc. All rights reserved. iWatt, the iW light bulb, and pulseTrain are trademarks of iWatt, Inc. All other trademarks
and registered trademarks are the property of their respective companies.
Contact Information
Web: http://www.iwatt.com
E-mail: [email protected]
Phone: 408-374-4200
Fax: 408-341-0455
iWatt Inc.
101 Albright Way
Los Gatos CA 95032-1827
Disclaimer
iWatt reserves the right to make changes to its products and to discontinue products without notice. The applications
information, schematic diagrams, and other reference information included herein is provided as a design aid only and are
therefore provided as-is. iWatt makes no warranties with respect to this information and disclaims any implied warranties of
merchantability or non-infringement of third-party intellectual property rights.
Certain applications using semiconductor products may involve potential risks of death, personal injury, or severe property
or environmental damage (“Critical Applications”).
iWatt SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED TO
BE SUITABLE FOR USE IN LIFE‑SUPPORT APPLICATIONS, DEVICES OR SYSTEMS, OR OTHER CRITICAL
APPLICATIONS.
Inclusion of iWatt products in critical applications is understood to be fully at the risk of the customer. Questions concerning
potential risk applications should be directed to iWatt, Inc.
iWatt semiconductors are typically used in power supplies in which high voltages are present during operation. High-voltage
safety precautions should be observed in design and operation to minimize the chance of injury.
MK-4008-B
11/20/07
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