APPLICATION NOTE
Powering Atmel MPUs with ActivePMU PMICs
Atmel | SMART SAMA5D3 - SAM9G15/25/35/45/46
SAM9M10/11 - SAM9N12 - SAM9CN11/12 - SAM9X25/35 Series
Scope
To support enhanced power supply applications on its Atmel ® | SMART
SAMA5D3x and several SAM9x (1) series embedded MPUs, Atmel has selected
two ActivePMU™ Power Management Integrated Circuits (PMICs) from the
active-semi® portfolio:
ACT8865—seven-channel (3 DC/DC converters + 4 LDO regulators) PMU
ACT8945A—seven-channel (3 DC/DC converters + 4 LDO regulators) PMU
with integrated linear Li-Po/Li-Ion battery charger
This application note provides developers with the following content:
Recommended application schematics with associated functional
descriptions
A description of the PMIC Power-Saving Mode and its use with Atmel MPU
low-power modes
A high level description of an available Linux driver
Reference Documents
Type
Title
Atmel Lit. No.
Datasheet
Datasheet
Datasheet
Datasheet
Datasheet
Datasheet
Datasheet
Datasheet
Datasheet
Datasheet
Datasheet
Datasheet
Datasheet
ACT8865 datasheet (available at www.active-semi.com)
ACT8945A datasheet (available at www.active-semi.com)
SAM9G15 Datasheet
SAM9G25 Datasheet
SAM9G35 Datasheet
SAM9G45 Datasheet
SAM9G46 Datasheet
SAM9M10 Datasheet
SAM9M11 Datasheet
SAM9N12/SAM9CN11/SAM9CN12 Datasheet
SAM9X25 Datasheet
SAM9X35 Datasheet
SAMA5D3 Series Datasheet
–
–
11152
11032
11053
6438
11028
6355
6437
11063
11054
11055
11121
1.
In this application note, “SAM9x” represents exclusively the Atmel MPUs SAM9G15, SAM9G25, SAM9G35,
SAM9G45, SAM9G46, SAM9M10, SAM9M11, SAM9N12, SAM9CN11, SAM9CN12, SAM9X25, and SAM9X35.
SMART
Atmel-11299C-ATARM-Powering-Atmel-eMPUs-with-ActivePMU-PMICs-ApplicationNote_30-Apr-15
Table of Contents
Scope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Reference Documents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.
Power Supply Overview of Atmel MPU Systems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1
1.2
1.3
1.4
2.
Application with Backup Capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Application Without Backup Capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Active-Semi PMICs and Atmel MPUs Low-Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.1
4.2
4.3
5.
ACT8865 Reference Schematic and Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
ACT8945A Reference Schematic and Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Passive Components Selection and PCB Layout Recommendation . . . . . . . . . . . . . . . . . . . . . . . . . 8
Digital Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Functional Description of Typical Use Cases . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.1
3.2
4.
3
4
5
6
ACT8865 and ACT8945A: Reference Schematics and Description . . . . . . . . . . . . . . . . 7
2.1
2.2
2.3
2.4
3.
Atmel MPU Power Rails . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Supply Topologies and Power Distribution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Clock Circuits Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Supplies Monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Active-Semi PMIC Power-Saving Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
SAMA5D3x Series Low-Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
SAM9x Series Low-Power Modes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Linux Driver Content and Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5.1
5.2
5.3
5.4
5.5
5.6
Linux Voltage and Current Regulator Framework . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ACT8865 Regulator Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Kernel Configurations to Enable ACT8865 Driver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Declaring the Regulator Device Node . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Regulator Consumer Driver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Regulator Sysfs Entries. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
20
20
20
20
22
23
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
2
Powering Atmel eMPUs with ActivePMU PMICs [APPLICATION NOTE]
Atmel-11299C-ATARM-Powering-Atmel-eMPUs-with-ActivePMU-PMICs-ApplicationNote_30-Apr-15
1.
Power Supply Overview of Atmel MPU Systems
1.1
Atmel MPU Power Rails
Atmel MPUs of both the SAMA5D3x and SAM9x (1) series have multiple supply rails corresponding to the operating
voltages of their internal circuits (e.g., CORE logic = 1.2V or 1.0V) and to the operating voltages of the external
components connected to them (e.g., DDR2 power supply = 1.8V).
These rails and their respective operating ranges are listed in Table 1-1. An approximate current consumption is
provided for each rail in order to size the corresponding regulator. Accurate numbers and descriptions are
provided in the device datasheet.
In most non-secure applications, the MPU subsystem (device + external memories) can be operated from three
primary rails:
3.3V, 1.8V and 1.2V (SAMA5D3x)
3.3V, 1.8V and 1.0V (SAM9x)
In secure applications of the SAMA5D3x device, or any application that requires writing into the fuse box of
SAMA5D3x, an additional power rail at 2.5V is needed to supply the VDDFUSE input pin.
Additionally, Atmel MPUs have a special VDDBU pin to power their backup domain (e.g., 32 kHz crystal oscillator,
RTC, System Controller). When needed, and because of its ultra-low power consumption, this power domain can
be maintained during powerdown periods with a storage element such as a 3.0V lithium coin cell battery or a
super-capacitor. Otherwise, applications can operate VDDBU on the main 3.3V power rail.
Table 1-1.
SAMA5D3x and SAM9x Series Power Supply Inputs
SAMA5D3x
Power Rail
Description
SAM9x
Range
Consumption
Range
Consumption
VDDCORE
Core Logic
1.10–1.32V, 1.20V
0.2A
0.90–1.10V, 1.00V
0.2A
VDDUTMIC
USB Device and host UTMI+
core logic
1.10–1.32V, 1.20V
0.02A
0.90–1.10V, 1.00V
0.02A
VDDPLLUTMI
UTMI PLL on SAM9
–
–
0.90–1.10V, 1.00V
0.02A
VDDPLLA
PLLA cell
1.10–1.32V, 1.20V
0.02A
0.90–1.10V, 1.00V
0.02A
VDDIODDR
External Memory Interface I/O
lines
1.70–1.90V, 1.80V
1.14–1.32V, 1.20V
0.05A
0.03A
–
–
–
–
1.70–1.90V, 1.80V
0.05A
1.65–1.95V, 1.80V
3.00–3.60V, 3.30V
0.03A
1.65–1.95V, 1.80V
3.00–3.60V, 3.30V
0.03A
VDDIOM0
VDDIOM
or
VDDIOM1/VDDNF
NAND and HSMC Interface I/O
lines
VDDIOP0
Peripheral I/O lines
1.65–3.60V
0.03A
1.65–3.60V
0.03A
VDDIOP1
Peripheral I/O lines
1.65–3.60V
0.03A
1.65–3.60V
0.03A
VDDIOP2
Peripheral I/O lines
–
–
1.65–3.60V
0.03A
VDDUTMII
USB Device and host UTMI+
interface
3.00–3.60V, 3.30V
0.02A
3.00–3.60V, 3.30V
0.02A
1.
In this application note, “SAM9x” represents exclusively the Atmel MPUs SAM9G15, SAM9G25, SAM9G35, SAM9G45, SAM9G46, SAM9M10, SAM9M11,
SAM9N12, SAM9CN11, SAM9CN12, SAM9X25, and SAM9X35.
Powering Atmel eMPUs with ActivePMU PMICs [APPLICATION NOTE]
Atmel-11299C-ATARM-Powering-Atmel-eMPUs-with-ActivePMU-PMICs-ApplicationNote_30-Apr-15
3
Table 1-1.
SAMA5D3x and SAM9x Series Power Supply Inputs (Continued)
SAMA5D3x
Power Rail
Description
Main oscillator
VDDOSC
UTMI PLL on SAMA5
SAM9x
Range
Consumption
Range
Consumption
1.65–3.60V, 3.30V
0.001A
1.65–3.60V, 3.30V
0.001
VDDANA
Analog-to-Digital Converter
3.00–3.60V, 3.30V
0.01A
3.00–3.60V, 3.30V
0.01A
VDDFUSE
Programmable Fuse Box
2.25–2.75V, 2.50V
0.05A
–
–
VDDBU
Backup domain
1.65–3.60V
0.0001A
1.80–3.60V
0.0001A
In all modes other than Backup mode of the MPU, every power supply input must be powered to operate the
device. The only exception to this rule is the VDDFUSE input which can be left unpowered if the fuse box of
SAMA5D3x is not used in Write mode.
1.2
Power Supply Topologies and Power Distribution
1.2.1
3-channel Topology
In the simplest applications of Atmel MPUs, a 3-rail power supply topology (3.3V / 1.8V / 1.2V or 1.0V) can be used
as shown Figure 1-1. However, this supply schematic has the following limitations:
The fuse box cannot be accessed in Write mode because VDDFUSE = 0V.
The analog section of the device (VDDANA) is powered from the (noisy) digital 3.3V rail.
Figure 1-1.
3-channel Power Distribution Example on SAMA5D3x Series Equipped with an 1.8V External Memory
1.8V
VDDIODDRx
REG1
1.2V
VDDCOREx
VDDUTMIC
VDDPLLA
REG2
VDDIOPx
VDDIOM
3.3V
REG3
VDDOSC
VDDUTMII
VDDANA
100R
VDDFUSE
VDDBU
3.0V
1.2.2
SAMA5D3
5-channel Topology and Active-Semi PMICs
A 5-channel power supply topology can be used to lift the aforementioned limitations on VDDFUSE and VDDANA.
In the following application schematic, the power supply based on Active-Semi PMICs follows this architecture:
4
3.3V (analog)
3.3V (digital)
1.8V (digital)
1.2V or 1.0V (digital)
Powering Atmel eMPUs with ActivePMU PMICs [APPLICATION NOTE]
Atmel-11299C-ATARM-Powering-Atmel-eMPUs-with-ActivePMU-PMICs-ApplicationNote_30-Apr-15
2.5V (analog)
For maximum efficiency, the three digital power supplies channels are generated by three integrated step-down
converters. The 3.3V and 2.5V analog rails are supplied by two integrated low-dropout (LDO) regulators. Power
distribution to the MPU and its external components mainly depends on the external components themselves. As
an example, a SAMA5D3x + LPDDR2 design operates VDDIODDR from the 1.2V rail whereas this power pin is
fed by the 1.8V rail on a SAMA5D3x + DDR2 design.
Active-Semi PMICs have four integrated LDO regulators (OUT4–OUT7) with low noise and high PSRR
performance. OUT4 defaults to 2.5V at startup and is intended to supply the VDDFUSE power input of SAMA5D3x
devices in applications accessing the fuse box in Write mode (e.g., secure applications). This supply channel can
be reassigned to another external component or can be switched off by software in other types of applications.
This output starts by default and must therefore be decoupled. OUT5 defaults to 3.3V at startup and is intended to
feed the VDDANA power input of the MPU. For both OUT4 and OUT5 channels, the MPU power consumption on
these rails leaves a large amount of output current available for other external components. However, wiring an
external component on OUT5 along with the VDDANA input prevents this component from being powered off
during operation as the VDDANA input can not be left unpowered.
The remaining LDO channels (OUT6, OUT7) default to OFF at startup. They can be turned on and adjusted under
software control through the I2C link to supply a wide range of external components ranging from digital ICs to
analog/RF ICs such as an audio codec or an RF transceiver.
The power supply sequencing of the five supply channels is ensured by the Active-Semi PMICs as per
recommendations in the Atmel device datasheet. Therefore the turn-on sequence is the following:
1.
3.3V (both LDO5 and DCDC3)
2.
1.8V (DCDC1)
3.
1.2V or 1.0V (DCDC2)
4.
2.5V (LDO4)
Figure 1-2.
Power Distribution Example on SAMA5D3x Series with ACT8865 (1.8V DDR Case)
1.8V
VDDIODDRx
DCDC1
1.2V
DCDC2
3.3V
DCDC3
VDDCOREx
VDDUTMIC
VDDPLLA
VDDIOPx
VDDIOM
VDDOSC
VDDUTMII
2.5V
VDDFUSE
LDO4
3.3V
VDDANA
LDO5
LDO6
VDDBU
LDO7
ACT8865
1.3
3.0V
SAMA5D3x
Clock Circuits Power Supply
Atmel MPUs have separate power supply inputs for their oscillators and PLL circuits. This allows to decouple these
analog circuits from the digital (core and I/Os) activity of the device and thus generate less jittered clocks. Atmel
highly recommends to feed these power supply inputs with low noise sources for applications where clock jitter is
Powering Atmel eMPUs with ActivePMU PMICs [APPLICATION NOTE]
Atmel-11299C-ATARM-Powering-Atmel-eMPUs-with-ActivePMU-PMICs-ApplicationNote_30-Apr-15
5
important (e.g., Hi-speed USB). The simplest way to do this is to filter the digital rails with an LC network as shown
in Figure 1-3. Choosing a 20 kHz corner frequency is a good trade-off between component size/cost and the
necessary high frequency attenuation for clock circuits. The inductors must be sized for low DC resistance and
good DC superimposition characteristics (TDK MLZ series and Taiyo Yuden CBM series are possible choices).
The serial resistor in the filter schematic must be adjusted to take the inductor DCR into account. Example of
inductors: Taiyo Yuden CBMF1608T100K (10 µH, 0.36 Ω, 115 mA, 0603) and TDK MLZ1608N100L (10 µH, 0.6 Ω,
60 mA, 0603).
Figure 1-3.
Recommended Filter on Clock Circuits Power Supply
SAMA5D3x
VDD_3V3
or
VDD_1V8
2.2
SAM9x5
10µH
VDDOSC
VDD_3V3
or
VDD_1V8
2.2
10µH
VDDOSC
4.7µF 10nF
2.2
4.7µF 10nF
10µH
VDD_1V2
2.2
VDDPLLA
10µH
VDDPLLA
VDD_1V0
4.7µF 10nF
4.7µF 10nF
2.2
10µH
VDDPLLUTMI
4.7µF 10nF
1.4
Power Supplies Monitoring
Atmel MPU power rails are not internally monitored. For sensitive applications, it is recommended to monitor the
system input voltage (to detect an input power loss detection) and the regulated channel outputs. Active-Semi
PMICs have an input supply monitor and a power-fail detector on each regulated output which can generate an
interrupt upon a power-fail detection.
6
Powering Atmel eMPUs with ActivePMU PMICs [APPLICATION NOTE]
Atmel-11299C-ATARM-Powering-Atmel-eMPUs-with-ActivePMU-PMICs-ApplicationNote_30-Apr-15
2.
ACT8865 and ACT8945A: Reference Schematics and Description
2.1
ACT8865 Reference Schematic and Description
ACT8865 Reference Schematic
active-semi
VSYS
31
C1
4.7µF
C2
4.7µF
VP1
26
VP2
16
VP3
25
NC2
C3
4.7µF
R4
1R
VDD_3V3
23
R6
1.5k
R7
1.5k
C8
1µF
R8
10k
CD 1nF DNP
32
30
VDDREF
VDD_1V8
L1 2.2µH
C8
10µF
C9
10µF
C10
100nF
VDD_1V2
L2 2.2µH
SW2
24
OUT2
11
nRSTO
nIRQ
13
nPBSTAT
C12
10µF
C13
10µF
C14
100nF
12
MPU_PIOy
22
21
MPU_TWD
MPU_TWCK
CST
100nF
R95 0R
RA5 0R
VSEL
17
PWREN
OUT4
3
OUT5
4
OUT6
7
C17
100nF
OUT7
8
VDD_AUX1
DNP
C8
2.2µF
C8
2.2µF
C9
2.2µF
C10
2.2µF
33
Q3
BSN20
14
PB2
18
PB1
EXPAD
NC1
C25
100nF
VDD_AUX2
nPBIN
GNDP3
9
PWRHLD
GNDP2
10
GNDP1
DNP
R12 50k
R19
100k
C16
10µF
VDD_3V3A
R95 RA5
Q2
BSS138
MPU_SHDN
C15
10µF
VDD_2V5
20
28
SAMA5
SAM9-x5
Q1
BSS138
SDA
SCL
GNDA
Mount
only one
R20
100k
VDD_3V3
L3 2.2µH
VSYS
RST
50k
VSYS
R19
47k
15
SW3
19
OUT3
2
option
(auto-start)
R18
1k
C5
4.7µF
REFBP
27
RD 1K
C4
4.7µF
SW1
1
OUT1
C8
47nF
MPU_NRST
MPU_PIOx
VSYS
5
INL45
6
INL67
ACT8865
29
Figure 2-1.
POWER-ON RESET
In this schematic, the power input is VSYS which can range from 3.5V to 5.5V to start the IC. VSYS feeds the
DCDC power inputs (VP1, VP2 and VP3), the LDO regulators power inputs (INL45, INL67) and the reference
voltage power input (VDDREF). This last pin is RC filtered to attenuate high frequency noise on this sensitive part
of the PMIC. VDD_1V8, VDD_1V2, VDD_3V3, VDD_2V5, and VDD_3V3A are to be connected to the power
supply inputs of the MPU. VDD_AUX1 and VDD_AUX2 are two available channels for the applications.
Powering Atmel eMPUs with ActivePMU PMICs [APPLICATION NOTE]
Atmel-11299C-ATARM-Powering-Atmel-eMPUs-with-ActivePMU-PMICs-ApplicationNote_30-Apr-15
7
2.2
ACT8945A Reference Schematic and Description
Figure 2-2.
ACT8945A Reference Schematic
Wall Adapter Input
VWall (5V)
33
C5
4.7µF
VBUS
ACT8945A
21
Q1
Si2301BDS
R1
11k
R2
3.9k
ACIN
20
31
32
39
C7
10µF
C1
4.7µF
C2
4.7µF
C3
4.7µF
C4
4.7µF
35
16
6
28
nSTAT
29
BAT
30
BAT
LBI
R4
1.5M
VDD_3V3
23
R6
1.5k
VSYS
VSYS
VP1
VP2
VP3
INL
VBAT
R3 2.2M
CD 1nF DNP
VSYS
active-semi
CHGIN
R7
1.5k
R9 8.2k
R5
2.4k
R8
10k
1
ISET
TH
38
C6
4.7µF
VDD_1V8
L1 2.2µH
SW1
2
OUT1
22
CHGLEV
nRSTO
12
nIRQ
13
nPBSTAT
19
nLBO
MPU_PIOw
Li+ Battery
24
REFBP
C11
47nF
VBAT
C8
10µF
C9
10µF
C10
100nF
11
MPU_NRST
RD 1K
MPU_PIOx
MPU_PIOy
MPU_PIOz
36
27
SDA
26
MPU_TWD
MPU_TWCK
SCL
15
25
SW3
17
OUT3
10
OUT4
4
OUT5
5
OUT6
8
OUT7
7
VSYS
Mount
only one
DNP
RA5 0R
DNP
C25
100nF
VDD_3V3
L3 2.2µH
C15
10µF
nPBIN
C16
10µF
C17
100nF
VDD_AUX1
NC1
R19
50k
C26
100nF
VDD_AUX2
Q3
BSN20
41
PB2
40
PB1
MPU_SHDN
R19
100k
C14
100nF
VDD_3V3A
EXPAD
9
GNDP3
R12 50k
PWRHLD
GNDP12
option
(auto-start)
14
VSYS
GNDA
Q1
BSS138
R18
1k
C13
10µF
VDD_2V5
R20
100k
Q2
BSS138
C12
10µF
VSEL
18
PWREN
37
R19
47k
R95 0R
R95 RA5
3
VSYS
SAMA5
SAM9-x5
VDD_1V2
L2 2.2µH
SW2
34
OUT2
C18
2.2µF
C19
2.2µF
C20
2.2µF
C21
2.2µF
POWER-ON RESET
In this schematic, the power inputs are the Li-Ion or Li-Po battery (VBAT), the Wall adapter (VWall) and the USB
voltage VBUS. ACT8945A contains a battery charger and an automatic power switch function that allows the
integrated regulators (DCDCs and LDOs) to run from a single voltage (VSYS) that is built from one if these three
inputs. VSYS feeds the DCDC power inputs (VP1, VP2 and VP3) and the LDO regulators power input INL.
VDD_1V8, VDD_1V2, VDD_3V3, VDD_2V5, and VDD_3V3A are to be connected to the power supply inputs of
the MPU. VDD_AUX1 and VDD_AUX2 are two available channels for the applications.
2.3
Passive Components Selection and PCB Layout Recommendation
The passive components selection around the DCDCs and LDOs of Active-Semi PMICs is described in these
components’ datasheets. It is very important to follow these recommendations and to properly decouple the
regulator inputs of these PMICS to limit the DCDCs switching currents into the ground and power planes.
A recommended PCB layout/placement is provided with the Active-Semi Evaluation Kit. This is a good starting
point to place and route these PMICs. Moreover, Atmel recommends placing these PMICs as close as possible to
the power source (input connector or regulator output) to limit again switching currents into the ground and power
planes. In case of inductive power source (long wires), it is good practice to decouple this input with large
capacitors (> 47 µF).
8
Powering Atmel eMPUs with ActivePMU PMICs [APPLICATION NOTE]
Atmel-11299C-ATARM-Powering-Atmel-eMPUs-with-ActivePMU-PMICs-ApplicationNote_30-Apr-15
2.4
Digital Interfaces
This section describes the following signals shared between the PMIC and the MPU:
I2C serial lines SDA and SCL
nRSTO, nPBSTAT, nIRQ outputs
These signals are all of open-drain type and must be pulled-up to the appropriate power rail. As an example, the
schematic in Figure 2-1 references some of these signals to the VDD_3V3 rail. Designers may use the
programmable pull-up resistor integrated inthe MPU I/O lines to save external resistors.
Two other inputs are available:
2.4.1
VSEL—selection of the VDDCORE voltage
CHGLEV—selection of the charge current
I2C Interface
The Active-Semi PMICs are controlled as slave I2C devices. They can be connected to any of the Two-Wire
Interface (TWI) peripherals of the Atmel device. Depending on the programmed speed and the PCB layout
parasitics, external pull-up resistors may be needed on the TWD and TWCK lines to ensure rising edges on these
signals are fast enough. On the programming side, the TWI peripheral should be configured in Master mode as
follows:
7-bit slave address
one byte internal address
one data byte
transfer speed up to 400 kHz (Fast mode)
IMPORTANT
2.4.2
In the application, if the I2C lines connected to the PMIC are shared with other
devices, it is important that these devices are powered by default at startup
(use one of OUT1–OUT5 rails). Otherwise, connection of these lines to an
unpowered device could create leakages from the MPU I/O pin to the
unpowered device I/O pin and could even stuck the I2C lines.
nRSTO Output
The nRSTO signal is the active-low system reset signal. It should be connected to the NRST input of the MPU. As
a reminder, this input is internally pulled-up (70 kΩ typical) to the VDDIOP0 rail. The PMIC asserts nRSTO low in
the following cases:
during a start-up sequence
during a shutdown sequence (either an automatic or a manual shutdown)
upon a reset request on the nPBIN input
When the nPBIN pin is tied to ground through 0 Ω (see PB2 in the reference schematic), a system reset is issued.
The nRSTO line is asserted low as soon as the nPBIN is tied to ground and remains low 64 ms after the nPBIN is
released.
2.4.3
nPBSTAT Output
The nPBSTAT output reflects the status of the nPBIN pin in VDDIO level (VDDIO being a generic name for the rail
that supplies the MPU I/O pin to which nPBSTAT is connected to). In the reference schematic, nPBSTAT defaults
to VDD_3V3 and when PB1 is pressed nPBSTAT is asserted low by the PMIC. This line can be used as an
interrupt source of the MPU or be polled by the MPU to implement “short” or “long” press detections and
consequently start specific software routines. Note that pressing PB2 would also assert nPBSTAT (in addition to
nRSTO).
Powering Atmel eMPUs with ActivePMU PMICs [APPLICATION NOTE]
Atmel-11299C-ATARM-Powering-Atmel-eMPUs-with-ActivePMU-PMICs-ApplicationNote_30-Apr-15
9
2.4.4
nIRQ Output
The nIRQ line allows the PMIC to interrupt the MPU on various alarm cases:
The programmable voltage system monitor detects a low input voltage.
One or several regulated outputs drop(s) below the power-good threshold.
A charger related event is detected (e.g., input charger connection/disconnection, safety timeout).
nIRQ can be wired on any GPIO configured by software as an interrupt source. It is generally not useful to wire it
on the MPU FIQ input.
2.4.5
VSEL Input
This input selects either 1.0V (VSEL = high) or 1.2V (VSEL to ground) as the output voltage for the DCDC2
(OUT2). Depending on the selected Atmel device SAM9x or SAMA5D3x, designers can set the default voltage on
VDD_1V2 by wiring this pin either to VSYS or to ground.
2.4.6
CHGLEV Input (ACT8945A)
This input selects the level of charging current. When high, the nominal charging current is used (e.g., 450 mA
when the USB input is detected). When low, ACT8945A uses the “preconditioning” current, typically the nominal
current divided by 5 (e.g., 90 mA for the USB case). It is recommended to pull down this input to ensure a low-level
on this pin under reset conditions of the MPU. If not pulled down, the MPU I/O that defaults to the “input-pull-up”
state when nRSTO is low will apply a ‘1’ to this input and hence will force the nominal charging current. In most
cases, this is not an acceptable behavior as the nominal charging current should be first negotiated between a
device and its host. The recommended maximum pull down resistor value is 8.2 kΩ.
10
Powering Atmel eMPUs with ActivePMU PMICs [APPLICATION NOTE]
Atmel-11299C-ATARM-Powering-Atmel-eMPUs-with-ActivePMU-PMICs-ApplicationNote_30-Apr-15
3.
Functional Description of Typical Use Cases
This section describes how Active-Semi PMICs can power on and power off the MPU power supplies. Two typical
application case studies are used to support the functional description:
1.
The first one is an application that switches between running and sleeping periods. The backup domain
(VDDBU) of the MPU is powered by a storage element (e.g., a battery) and the power supplies are switched
OFF when the MPU is in Backup mode. This case uses the shutdown controller of the MPU to enter and
leave the Backup mode. See Figure 3-1.
2.
The second one is an application that does not have a backup capability and where VDDBU is connected to
VDD_3V3 (could be VDD_1V8). When this application shuts down, the backup content (e.g., RTC, registers)
is obviously lost. See Figure 3-5.
As ACT8865 and ACT8945A only differ in the integration of a Battery Charger + Automatic Power Switch function,
most of the following descriptions are common to both ICs. For the sake of simplicity, these application cases
focus on non-battery powered applications (ACT8865). Each important phase illustrated in the timing diagrams
(e.g., first start-up, software shutdown) is described in detail in the following sections. The application input voltage
is called VSYS which is either the PMIC input voltage (ACT8865) or the automatic power-switch output
(ACT8945A).
3.1
Application with Backup Capability
Figure 3-1.
Typical Application Timing Diagram: Application With Backup Capability (Case 1)
VSYS
VDDBU
(e.g., 3.0V Battery)
App. Status
Software Shutdown routine
with shutdown command
OFF
Supply Start.
Processor Reset
Application is running...
Application is in Backup Mode.
RTC is running...
Supply Start.
Proc. Reset
Application
is running...
Backup mode exit
upon wake-up event
(e.g., RTC alarm)
PWRHLD
(SHDN)
nPBIN
PB1 pressed
nPBIN activated
by SHDN
VDD_3V3
VDD_1V8
VDD_1V2
VDD_2V5
VDD_3V3A
nRSTO
nPBSTAT
~70 ms
long button press
detected by SW
~70 ms
Powering Atmel eMPUs with ActivePMU PMICs [APPLICATION NOTE]
Atmel-11299C-ATARM-Powering-Atmel-eMPUs-with-ActivePMU-PMICs-ApplicationNote_30-Apr-15
11
3.1.1
First Power-On
From an OFF state and when VSYS is greater than 3.5V, the application is powered up by asserting the nPBIN to
ground through a 50 kΩ resistor, either manually with a user button (PB1) or automatically at VSYS ramp-up with
the optional CST/RST network from VDDREF input (or VSYS in ACT8945A) to Q3 gate. ACT8865/ACT8945A
require their PWRHLD input to be held to ‘1’ before the nPBIN pin is released. This is achieved by connecting the
PWRHLD pin to the SHDN output of Atmel MPU through the Q1/Q2 network. This “buffer” network prevents the
VDDBU power supply from back-powering the main power supply when this latter is OFF or disconnected (1). The
SHDN pin, designed to control an external regulator enable pin, defaults to ‘1’ (VDDBU level) before the system
starts. At power-on, the PMIC sequences the ramp-up of the five rails (VDD_3V3 and VDD_3V3A, VDD_1V8,
VDD_1V2 and VDD_2V5) and de-asserts the nRSTO line after a typical 64 ms delay. The remaining channels
(OUT6–OUT7) are enabled by software through the I2C serial port.
Figure 3-2.
Typical First Power-On Waveforms (Automatic Start with CST and RST)
VDD_3V3
All Channels
3.1.2
2.0V
Power-On From Backup Mode
If the MPU is in Backup mode, i.e., with only VDDBU pin powered from a storage element, the system can wake up
upon either an event on the WKUP0 pin or an RTC alarm event. When such an event occurs, the MPU drives the
SHDN pin up to ‘1’ (VDDBU level). This transition on the SHDN output is applied to the gate of Q3 through
R18/C25 to create a pulse low on nPBIN (through 50 kΩ resistor) which makes the PMIC start. The high level on
SHDN is also applied to the PWRHLD input of the PMIC as required.
1.
12
As a general rule to avoid extra leakages in the VDDBU power domain, the I/Os of the MPU belonging to the VDDBU power domain (WKUP0 and SHDN) must
not be directly connected to the I/Os of the PMIC. In case of direct connection, leakage paths from the VDDBU power domain to the main power domain can be
created through the ESD protection diodes of these I/Os.
Powering Atmel eMPUs with ActivePMU PMICs [APPLICATION NOTE]
Atmel-11299C-ATARM-Powering-Atmel-eMPUs-with-ActivePMU-PMICs-ApplicationNote_30-Apr-15
3.1.3
Software Power-Off
When running, the system can be shut down by first stopping the OUT6 and OUT7 LDO regulators through the I2C
interface and then de-asserting the PWRHLD pin of the PMIC. This de-assertion is done by issuing the shutdown
command in the Shutdown Control Register of the MPU (SHDW_CR.SHDW = 1) which drives the SHDN pin down
to ‘0’.
When the PWRHLD input falls, the PMIC shuts down which means the nRSTO line is asserted low and the
regulators OUT1–OUT5 are simultaneously stopped.
Assertion of the shutdown command makes the MPU enter Backup mode. To exit this mode, the application must
have configured the wake-up source (WKUP0 pin event or RTC alarm event) before asserting the shutdown
command. Refer to the Shutdown Controller (SHDWC) section and the Electrical Characteristics section (Lowpower Modes) of the Atmel device datasheet for further details.
Figure 3-3.
Note:
Typical Software Power-Off Waveforms
The ACT8865/ACT8945A PMICs have a special MSTROFF bit which can use an I2C command to perform
a power-off. When sending this command over the I2C bus, the nRSTO line falls abnormally before the
“stop-condition” of the I2C transfer. Atmel does not recommend to use this method. In case this feature is to
be used, it is advisable to install a few microseconds delay network (RD/CD) on the nRSTO line of the PCB.
Powering Atmel eMPUs with ActivePMU PMICs [APPLICATION NOTE]
Atmel-11299C-ATARM-Powering-Atmel-eMPUs-with-ActivePMU-PMICs-ApplicationNote_30-Apr-15
13
3.1.4
Power-Off Upon Input Power Loss
I n c a s e o f i n p u t p o w e r l o s s ( V S Y S ) , t h e s ys t e m p o w e r - o f f c a n a l s o b e m a n a g e d b y t h e P M I C .
ACT8865/ACT8945A integrate a programmable system voltage monitor that compares the VDDREF (ACT8865)
or VSYS (ACT8945A) input to a programmable threshold set to 3.0V by default. If the input power falls below this
threshold, one of two possible actions occurs:
An “Under Voltage Alarm” interrupt is sent to the MPU through the nIRQ line and a software power-off is
started by the application. In particular, for SAMA5D3x devices equipped with an external LPDDR2 memory,
this flag can be used to avoid an “Uncontrolled Power-Off” of the LPDDR2 device.
The PMIC initiates an automatic power-off sequence (without MPU intervention).
The behavior of the PMIC in response to the system voltage monitor is programmed by the nSYSMODE[] bit (see
ACT8865/ACT8945A datasheets).
Figure 3-4.
14
Typical Power-Off Waveforms in Case of Input Power Loss
Powering Atmel eMPUs with ActivePMU PMICs [APPLICATION NOTE]
Atmel-11299C-ATARM-Powering-Atmel-eMPUs-with-ActivePMU-PMICs-ApplicationNote_30-Apr-15
3.2
Application Without Backup Capability
Figure 3-5.
Typical Application Timing Diagram: Application Without Backup Capability (Case 2)
VSYS
Software Shutdown routine
with Shutdown Controller
VDDBU
(= VDD3V3)
App. Status
OFF
Supply Start.
Processor Reset
Application is running...
Supply Start.
Proc. Reset
OFF
Application
is running...
PWRHLD
(SHDN)
nPBIN
PB1 pressed
PB1 pressed
VDD_3V3
VDD_1V8
VDD_1V2
VDD_2V5
VDD_3V3A
nRSTO
nPBSTAT
~70ms
3.2.1
long button press
detected by SW
~70ms
First Power-On
As with the previous application case, the system is powered up by asserting the nPBIN to ground through a 50 kΩ
resistor. This assertion is either manual (PB1) or automatic (optional CST/RST network) and leads to the sequenced
start-up of the five rails (VDD_3V3 and VDD_3V3A, VDD_1V8, VDD_1V2 and VDD_2V5). The SHDN pin supplied
by VDDBU (= VDD_3V3) is at 0V before the PMIC starts. When VDD_3V3 rises, the SHDN pin rises to ‘1’ and
drives the PWRHLD input of the PMIC to ‘1’ as required.
3.2.2
Software Power-Off
To shut down the PMIC, the application must first stop the auxiliary LDO regulators (OUT6 and OUT7) through the
I 2C interface and then de-assert the PWRHLD pin of the PMIC. As in the previous application case, this is
achieved by issuing the shutdown command in the Shutdown Control Register (SHDW_CR.SHDW = 1) of the
MPU. When this command is issued, SHDN falls which makes the PWRHLD input fall. The PMIC ties the nRSTO
line to ground and the DC/DC converters are then simultaneously stopped.
Powering Atmel eMPUs with ActivePMU PMICs [APPLICATION NOTE]
Atmel-11299C-ATARM-Powering-Atmel-eMPUs-with-ActivePMU-PMICs-ApplicationNote_30-Apr-15
15
On SAMA5D3x and SAM9x series, the VDDBU input is monitored by a Power-OnReset circuit with a negative-going threshold around 1.45V (exact threshold values
in the device datasheet). During the power down sequence, SHDN is forced to 0
and VDDBU (VDD_3V3) falls. When VDDBU reaches the power-on reset (POR)
threshold, the SHDN pin goes to its reset value which is “output at 1”. Without
precaution, this transition could make the PMIC restart. To avoid this, it is
recommended to add a resistive divider on the SHDN output to limit the level on
Q1’s gate to about 0.7V (see Figure 3-6). The penalty is additional power
consumption for the resistor bridge which is negligible compared to the application
current consumption on VDD_3V3.
TIP
Figure 3-6.
Resistive Divider on SHDN Output
ACT8865 / ACT8945A
SAMA5D3
VDD_3V3
PWRHLD
L3 2.2µH
VDDBU
5V
SW3
Power-On
Reset
C15
10µF
VSYS
R19
47k
10k
C16
10µF
C17
100nF
OUT3
SHDN
3.3V
Q1’s 1.65V
gate
R20
100k
PWRHLD
Q1
BSS138
R12 50k
nPBIN
Q2
BSS138
10k
0.72V
VDDBU 3.3V
(VDD_3V3)
1.45V (POR VTH)
Shutdown
Controller
SHDN
R18
1k
C25
100nF
PB1
R19
100k
PB2
Q3
BSN20
POWER-ON RESET
Figure 3-7.
3.2.3
Software Power-Off Waveforms with Resistive Divider on SHDN Output
Power-Off Upon Input Power Loss
Please refer to Section 3.1.4 “Power-Off Upon Input Power Loss” on page 14.
16
Powering Atmel eMPUs with ActivePMU PMICs [APPLICATION NOTE]
Atmel-11299C-ATARM-Powering-Atmel-eMPUs-with-ActivePMU-PMICs-ApplicationNote_30-Apr-15
1.45V
4.
Active-Semi PMICs and Atmel MPUs Low-Power Modes
4.1
Active-Semi PMIC Power-Saving Mode
ACT8865 and ACT8945A integrated DCDCs feature a Power-Saving Mode (PSM) to reduce their power
consumption at light output load. By default at startup, the DCDCs operate in fixed frequency Pulse Width
Modulation (PWM) mode. This mode achieves the best ripple and regulation performance. Typically, when
operated in PWM mode, the three DC/DC converters current consumption is about 20 mA @ 5V input voltage or
15 mA @ 3.7V.
To operate the DCDCs in PSM, the application needs to clear the MODE[] bits of registers REG1, REG2 and
REG3 in the PMIC user interface. The current consumption is then reduced to 330 µA @ 5V input or
300 µA @ 3.7V. The penalty of this mode is a slightly higher output voltage ripple (about 10 mVpp compared to
less than 5 mVpp in PWM) and higher transient output voltage under load steps. Figure 4-1 reports output voltage
ripple on VDD_1V2 for both PSM and PWM mode. These curves are obtained with the following conditions:
VIN = 5V, VDD_1V2 = 1.2V. The red curve is the switching node (SW2), and the blue curve is the output voltage
AC-coupled at 10 mV/division.
Figure 4-1.
Ripple Performance in Power-Saving Mode (Left) and in PWM Mode (Right)
Powering Atmel eMPUs with ActivePMU PMICs [APPLICATION NOTE]
Atmel-11299C-ATARM-Powering-Atmel-eMPUs-with-ActivePMU-PMICs-ApplicationNote_30-Apr-15
17
Figure 4-2 reports transient load regulation on VDD_1V2 for both PSM and PWM mode. The load step (red curve)
is 0–100 mA in PSM and 0–500 mA in PWM mode. The rise and fall time of the load current is 1 µs. These curves
are obtained with the following conditions: VIN = 5V, VDD_1V2 = 1.2V. The blue curve is the output voltage ACcoupled at 50 mV/division.
Figure 4-2.
Transient Load Performance in Power-Saving Mode (Left) and in PWM Mode (Right)
When the MODE[] bits of registers REG1, REG2 and REG3 are cleared, the DCDCs automatically transition from
PWM mode to PSM at light load current and conversely transition back to PWM mode if the load current is
increased (wake-up cases).
18
Powering Atmel eMPUs with ActivePMU PMICs [APPLICATION NOTE]
Atmel-11299C-ATARM-Powering-Atmel-eMPUs-with-ActivePMU-PMICs-ApplicationNote_30-Apr-15
4.2
SAMA5D3x Series Low-Power Modes
Table 4-1 summarizes the low-power modes of SAMA5D3x devices with indicative power consumption figures at
25 °C. In Idle mode and in Ultra Low-Power mode, the power supplies are still ON with reduced power
consumption and it is therefore relevant to set the DC/DC converters in PSM.
Table 4-1.
Active Power Supplies in SAMA5D3x Low-Power Modes
Power Rail
Backup Mode
Idle Mode
Ultra Low-Power Mode
VDD_3V3
OFF
Application dependent
200 µA(3)
VDD_1V8
OFF
Application dependent
200 µA(3)
VDD_1V2
OFF
24 mA(1)
520 µA(2)
VDDBU
Notes:
1.
2.
3.
1.2 µA typical
MCK at 133 MHz
MCK at 750 kHz
Typical conditions
For maximum regulation performance, the PSM should be activated as late as possible in the process of entering
the Ultra Low-Power mode of the MPU. In a similar way, the PWM mode should be restored as soon as possible
when re-entering Run mode.
4.3
SAM9x Series Low-Power Modes
Table 4-2 summarizes the low-power modes of SAM9x devices with indicative power consumption figures.
Table 4-2.
Active Power Supplies in SAM9x Low-Power Modes
Power Rail
Backup Mode
Idle Mode
Ultra Low-Power Mode
VDD_3V3
OFF
Application dependent
200 µA(3)
VDD_1V8
OFF
Application dependent
200 µA(3)
VDD_1V2 (1.0V)
OFF
55 mA(1)
30 mA(2)
VDDBU
Notes:
1.
2.
3.
8 µA typical
MCK at 133 MHz
MCK at 500 Hz
Typical conditions
For maximum regulation performance, the PSM should be activated as late as possible in the process of entering
the Ultra Low-Power mode of the MPU. In a similar way, the PWM mode should be restored as soon as possible
when re-entering Run mode.
Powering Atmel eMPUs with ActivePMU PMICs [APPLICATION NOTE]
Atmel-11299C-ATARM-Powering-Atmel-eMPUs-with-ActivePMU-PMICs-ApplicationNote_30-Apr-15
19
5.
Linux Driver Content and Description
5.1
Linux Voltage and Current Regulator Framework
The PMIC driver is implemented as a regulator driver under the voltage and current regulator framework. The
framework is designed to provide a standard kernel interface to control voltage and current regulators. It provides
the following four parts:
Regulator Driver—The regulator is defined as a device that supplies power to other devices. The framework
provides the interface to allow drivers to register the regulators and provide operations to the core.
Consumer Driver—The consumer is defined as a device that is supplied by a regulator. The framework
provides the interface to allow the consumer to complete the control over their supply voltage and current
limit.
Machine Special Setup Code—The framework provides interface to allow the machine special setup code to
create the voltage/current constraints for each regulator, and to create a regulator tree whereby some
regulators are supplied by others. It is substituted by the device tree in the latest version.
Userspace Interface—The framework also exports useful information to userspace via sysfs.
For more information about the Linux regulator framework, please see the Linux kernel document.
Documentation/power/regulator/overview.txt.
5.2
ACT8865 Regulator Driver
The ACT8865 regulator driver source code is available at:
drivers/regulator/act8865-regulator.c.
As mentioned above, the Active-Semi PMIC (ACT8865) is controlled as a slave I 2C device, so the ACT8865
regulator driver is implemented as an I 2 C client driver using the i2c_driver model. The code configures the
regulator_desc structure for each regulator and registers the regulators to the core by invoking
devm_regulator_register(). To ease the development, the register map library (regmap) and the helper functions
are used.
5.3
Kernel Configurations to Enable ACT8865 Driver
The ACT8865 driver is enabled through the kernel configuration.
Device Drivers --->
[*] Voltage and Current Regulator Support --->
<*> Active-semi act8865 voltage regulator
5.4
Declaring the Regulator Device Node
To make the regulators work, the ACT8865 device must be properly declared in the device tree files.
ACT8865 is declared as an I2C client device with the I2C slave address 0x5B assigned by the property ‘reg’.
More regulator properties defined as the regulator binding are available in the Linux kernel document.
Documentation/devicetree/bindings/regulator/regulator.txt.
Documentation/devicetree/bindings/regulator/act8865-regulator.txt
20
Powering Atmel eMPUs with ActivePMU PMICs [APPLICATION NOTE]
Atmel-11299C-ATARM-Powering-Atmel-eMPUs-with-ActivePMU-PMICs-ApplicationNote_30-Apr-15
For example, the regulator’s device node on the SAMA5D3x-EK is declared as follows:
i2c1: i2c@f0018000 {
status = "okay";
pmic: act8865@5b {
compatible = "active-semi,act8865";
reg = <0x5b>;
status = "okay";
regulators {
vcc_1v8_reg: DCDC_REG1 {
regulator-name = "VCC_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
vcc_1v2_reg: DCDC_REG2 {
regulator-name = "VCC_1V2";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1300000>;
regulator-always-on;
};
vcc_3v3_reg: DCDC_REG3 {
regulator-name = "VCC_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vddana_reg: LDO_REG1 {
regulator-name = "FUSE_2V5";
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <2500000>;
};
vddfuse_reg: LDO_REG2 {
regulator-name = "VDDANA";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
};
};
The values of the regulators’ properties are assigned by the hardware design, such as regulator-min-microvolt and
regulator-max-microvolt. It is advisable to name the ‘regulator-name’ property with the supply name in the
schematic to ease system analysis.
Powering Atmel eMPUs with ActivePMU PMICs [APPLICATION NOTE]
Atmel-11299C-ATARM-Powering-Atmel-eMPUs-with-ActivePMU-PMICs-ApplicationNote_30-Apr-15
21
5.5
Regulator Consumer Driver
The regulator consumer uses a regulator to change the power supply voltage or turn on/off the power. The
consumer selects the regulator to use through the regulator mapping.
This mapping can be achieved through the device tree using the below bindings in the consumer node.
- <name>-supply: phandle to the regulator node
The name is used as the power supply ID to have access to its supply regulator.
The regulator framework provides the consumer driver interfaces to set regulator voltage and enable/disable it.
The detailed description of consumer interfaces is available in the Linux kernel document.
Documentation/devicetree/bindings/regulator/consumer.txt.
On the SAMA5D3x-EK, the WM8904 audio codec is not supplied by any regulators from the ACT8865 PMIC, but
the WM8904 driver is a good regulator consumer example. WM8904 is supplied by multiple individual LDOs,
which belong to the non-controllable regulators using the fixed regulator driver.
The following steps describe how to operate the WM8904 regulator.
1.
2.
Enable the fixed regulator driver through the kernel configuration.
Device Drivers --->
[*] Voltage and Current Regulator Support --->
<*> Fixed voltage regulator support
Declare regulator nodes for used fixed-regulators.
wm8904_3v3_power: wm8904_3v3_reg {
compatible = "regulator-fixed";
regulator-name = "wm8904_3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
wm8904_1v8_power: wm8904_1v8_reg {
compatible = "regulator-fixed";
regulator-name = "wm8904_1v8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
3.
Add WM8904 consumer node property to point to the corresponding regulator node with the proper power ID
in the device tree.
i2c0: i2c@f0014000 {
wm8904: wm8904@1a {
compatible = "wm8904";
reg = <0x1a>;
DCVDD-supply = <&wm8904_1v8_power>;
DBVDD-supply = <&wm8904_3v3_power>;
AVDD-supply = <&wm8904_1v8_power>;
CPVDD-supply = <&wm8904_1v8_power>;
MICVDD-supply = <&wm8904_3v3_power>;
};
};
22
Powering Atmel eMPUs with ActivePMU PMICs [APPLICATION NOTE]
Atmel-11299C-ATARM-Powering-Atmel-eMPUs-with-ActivePMU-PMICs-ApplicationNote_30-Apr-15
5.6
Regulator Sysfs Entries
Useful regulator information can be read from the user space via sysfs. This method is useful to monitor device
power consumption and status.
Please refer to Documentation/ABI/testing/sysfs-class-regulator.
# cd /sys/class/regulator/
# ls
regulator.0 regulator.2 regulator.4 regulator.6
regulator.1 regulator.3 regulator.5 regulator.7
# ls regulator.2/
device
num_users
suspend_mem_state
max_microvolts
power
suspend_standby_state
microvolts
state
type
min_microvolts
subsystem
uevent
name
suspend_disk_state
# cat regulator.2/name
VCC_1V2
# cat regulator.2/type
voltage
# cat regulator.2/state
enabled
# cat regulator.2/max_microvolts
1300000
# cat regulator.2/min_microvolts
1100000
# cat regulator.2/microvolts
1250000
Powering Atmel eMPUs with ActivePMU PMICs [APPLICATION NOTE]
Atmel-11299C-ATARM-Powering-Atmel-eMPUs-with-ActivePMU-PMICs-ApplicationNote_30-Apr-15
23
Revision History
Table 5-1.
Doc. Rev.
Revision History
Date
Changes
Table 1-1, “SAMA5D3x and SAM9x Series Power Supply Inputs”: changed VDDUTMIC and
VDDOSC.
C
30-Apr-15
Figure 1-3, “Recommended Filter on Clock Circuits Power Supply”: removed VDDUTMIC and
associated components.
Figure 2-2, “ACT8945A Reference Schematic”: NC1 now pin 40. PWREN now pin 18.
Removed NC2.
24
B
03-Oct-14
Section 4.1 “Active-Semi PMIC Power-Saving Mode”: in second paragraph, replaced “The
current consumption is then reduced to 620 µA @ 5V input or 520 µA @ 3.7V” with “The
current consumption is then reduced to 330 µA @ 5V input or 300 µA @ 3.7V”
A
30-Jul-14
First release
Powering Atmel eMPUs with ActivePMU PMICs [APPLICATION NOTE]
Atmel-11299C-ATARM-Powering-Atmel-eMPUs-with-ActivePMU-PMICs-ApplicationNote_30-Apr-15
ARM Connected Logo
XXXXXX
Atmel Corporation
1600 Technology Drive, San Jose, CA 95110 USA
T: (+1)(408) 441.0311
F: (+1)(408) 436.4200
|
www.atmel.com
© 2015 Atmel Corporation. / Rev.: Atmel-11299C-ATARM-Powering-Atmel-eMPUs-with-ActivePMU-PMICs-ApplicationNote_30-Apr-15
Atmel®, Atmel logo and combinations thereof, Enabling Unlimited Possibilities®, and others are registered trademarks or trademarks of Atmel Corporation in U.S. and
other countries. ARM®, ARM Connected® logo, and others are the registered trademarks or trademarks of ARM Ltd. Other terms and product names may be
trademarks of others.
DISCLAIMER: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right
is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN THE ATMEL TERMS AND CONDITIONS OF SALES LOCATED ON THE
ATMEL WEBSITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. IN NO EVENT
SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, CONSEQUENTIAL, PUNITIVE, SPECIAL OR INCIDENTAL DAMAGES (INCLUDING, WITHOUT LIMITATION, DAMAGES
FOR LOSS AND PROFITS, BUSINESS INTERRUPTION, OR LOSS OF INFORMATION) ARISING OUT OF THE USE OR INABILITY TO USE THIS DOCUMENT, EVEN IF ATMEL HAS
BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Atmel makes no representations or warranties with respect to the accuracy or completeness of the contents of this
document and reserves the right to make changes to specifications and products descriptions at any time without notice. Atmel does not make any commitment to update the information
contained herein. Unless specifically provided otherwise, Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel products are not intended,
authorized, or warranted for use as components in applications intended to support or sustain life.
SAFETY-CRITICAL, MILITARY, AND AUTOMOTIVE APPLICATIONS DISCLAIMER: Atmel products are not designed for and will not be used in connection with any applications where
the failure of such products would reasonably be expected to result in significant personal injury or death (“Safety-Critical Applications”) without an Atmel officer's specific written
consent. Safety-Critical Applications include, without limitation, life support devices and systems, equipment or systems for the operation of nuclear facilities and weapons systems.
Atmel products are not designed nor intended for use in military or aerospace applications or environments unless specifically designated by Atmel as military-grade. Atmel products are
not designed nor intended for use in automotive applications unless specifically designated by Atmel as automotive-grade.