506BT - ON Semiconductor

MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DFN8 5x6, 1.27P Dual Flag (SO8FL−Dual)
CASE 506BT
ISSUE E
DATE 26 FEB 2013
1
SCALE 2:1
2X
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED
BETWEEN 0.15 AND 0.30 MM FROM THE TERMINAL TIP.
4. PROFILE TOLERANCE APPLIES TO THE EXPOSED PAD AS WELL
AS THE TERMINALS.
5. DIMENSIONS D1 AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS.
6. SEATING PLANE IS DEFINED BY THE TERMINALS. A1 IS DEFINED
AS THE DISTANCE FROM THE SEATING PLANE TO THE LOWEST
POINT ON THE PACKAGE BODY.
7. A VISUAL INDICATOR FOR PIN 1 MUST BE LOCATED IN THIS AREA.
0.20 C
D
A
B
D1
8
7
6
ÏÏ
ÏÏ
PIN ONE
IDENTIFIER
NOTE 7
1
2
2X
0.20 C
5
E1 E
4X
c
3
GENERIC
MARKING DIAGRAM*
h
A1
4
1
XXXXXX
AYWZZ
TOP VIEW
0.10 C
DETAIL A
A
0.10 C
NOTE 4
C
SIDE VIEW
DETAIL A
D2
D3
4X
e
1
L
K
4
DETAIL B
4X
b1
N
4X
G
*This information is generic. Please refer
to device data sheet for actual part
marking.
MILLIMETERS
MAX
MIN
MAX
0.90
−−−
1.10
−−−
−−−
0.05
0.33
0.42
0.51
0.33
0.42
0.51
0.20
−−−
0.33
5.15 BSC
4.70
4.90
5.10
3.90
4.10
4.30
1.50
1.70
1.90
6.15 BSC
5.70
5.90
6.10
3.90
4.15
4.40
1.27 BSC
0.45
0.55
0.65
−−−
−−−
12 _
0.51
−−−
−−−
0.56
−−−
−−−
0.48
0.61
0.71
3.25
3.50
3.75
1.80
2.00
2.20
ALTERNATE
CONSTRUCTION
DETAIL B
M
XXXXXX= Specific Device Code
A
= Assembly Location
Y
= Year
W
= Work Week
ZZ
= Lot Traceability
SEATING
PLANE
NOTE 6
DIM
A
A1
b
b1
c
D
D1
D2
D3
E
E1
E2
e
G
h
K
K1
L
M
N
8
5
8X
K1
BOTTOM VIEW
SOLDERING FOOTPRINT*
E2
4.56
2X
0.75
b
0.10
C A B
0.05
C
2X
2.08
8X
0.56
NOTE 3
4.84
4X
1.40
2.30
6.59
3.70
0.70
4X 1.00
1.27
PITCH
5.55
DIMENSION: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
98AON50417E
Electronic versions are uncontrolled except when
accessed directly from the Document Repository. Printed
STATUS: ON SEMICONDUCTOR STANDARD
versions are uncontrolled except when stamped
“CONTROLLED COPY” in red.
NEW STANDARD:
© Semiconductor Components Industries, LLC, 2002
Case Outline Number:
http://onsemi.com
DFN8 5X6, 1.27P DUAL FLAG (SO8FL−DUAL)
DESCRIPTION:
October, 2002
− Rev. 0
PAGE 1 OFXXX
2
1
DOCUMENT NUMBER:
98AON50417E
PAGE 2 OF 2
ISSUE
REVISION
DATE
O
RELEASED FOR PRODUCTION. REQ. BY M. RAMOS.
16 APR 2010
A
CORRECTED SOLDER FOOTPRINT. REQ. BY I. CAMBALIZA.
16 FEB 2011
B
CORRECTED ERROR IN SOLDER FOOTPRINT SHAPE. REQ. BY I. CAMBALIZA.
29 JUN 2011
C
CORRECTED MARKING DIAGRAM TO ADD LOT TRACEABILITY. REQ. BY J.
CARTER.
12 APR 2012
D
ADDED DIMENSION K1 TO BOTTOM VIEW AND TABLE. REQ. BY D. TRUHITTE.
11 JAN 2013
E
MODIFED DIMENSIONS D1 & E1 AND ADDED NOMINAL VALUES. REQ. BY I.
MARIANO.
26 FEB 2013
ON Semiconductor and
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© Semiconductor Components Industries, LLC, 2013
February, 2013 − Rev. E
Case Outline Number:
506BT