LV8804FV

LV8804FV
Bi-CMOS LSI
PC and Server
http://onsemi.com
Fan Motor Driver
Application Note
Overview
LV8804FV is a 3-phase sensorless motor driver IC.
3-phase driver allows low power consumption and low vibration. And Hall sensorless drive allows
reduction of the size of a motor system.
This IC is suitable for use in products which require high reliability and long life such as note server fan
and refrigerator fan.
Function
 Direct PWM three-phase sensorless motor driver
 Built-in current limit circuit (Operates when RF resistance is 0.25
 NchDMOS output transistor
 Built-in lock protection and auto-recovery circuit
 FG (rotation count) output signal pin
 Built-in TSD (thermal shutdown) circuit
 Minimum speed setting (MINSP pin)
 Motor startup with soft-start (SOFTST pin)
ohm and Io=1A)
Typical Applications
 Server
 Refrigerator
 Desktop Computer
Pin Assignment
Package Dimensions
unit : mm (typ)
5.2
0.5
4.4
6.4
20
12
0.15
0.22
(1.3)
0.1
1.5 MAX
0.5
(0.35)
SANYO : SSOP20J(225mil)
Caution: The package dimension is a reference value, which is not a guaranteed value.
Semiconductor Components Industries, LLC, 2013
May, 2015
1/29
LV8804FV Application Note
Recommended Soldering Footprint
(Unit:mm)
Reference
Symbol
SSOP20J (225mil)
eE
5.80
e
0.50
b3
0.32
l1
1.00
Block Diagram
2/29
LV8804FV Application Note
Specifications
Absolute Maximum Ratings at Ta = 25C
Parameter
Symbol
Conditions
Ratings
Unit
VCC maximum supply voltage
VCC max
16
V
VG maximum supply voltage
VG max
21
V
OUT pin maximum output current
IOUT max
1.2
A
SOFTST pin withstand voltage
VSOFTST max
6
V
FR pin withstand voltage
VFR max
6
V
CTL pin withstand voltage
VCTL max
6
V
MINSP pin withstand voltage
VMINSP max
6
V
FG output pin withstand voltage
VFG max
16
V
FG pin maximum output current
IFG max
5
mA
Allowable Power dissipation
Pd max1
Independent IC
0.3
W
Pd max2
Mounted on specified board *
UO, VO, and WO pins
0.95
W
Operating temperature
Topr
-30 to +95
C
Storage temperature
Tstg
-55 to +150
C
* : When mounted on the designated 76.1mm × 114.3mm × 1.6mm, glass epoxy board (single-layer)
Caution 1) Absolute maximum ratings represent the value which cannot be exceeded for any length of time.
Caution 2) Even when the device is used within the range of absolute maximum ratings, as a result of continuous usage
under high temperature, high current, high voltage, or drastic temperature change, the reliability of the IC may
be degraded. Please contact us for the further details.
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating
Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
Recommended Operating Conditions at Ta  25C
Ratings
Parameter
Symbol
Conditions
Unit
min
typ
max
VCC supply voltage
VCC
6
15
V
CTL input voltage range
VCTL
0
VREG
V
MINSP input voltage range
VMINSP
0
VREG
V
Electrical Characteristics at Ta  25C, VCC = 12V, unless otherwise specified
Ratings
Parameter
Symbol
Conditions
Unit
min
Circuit current 1
typ
max
ICC1
3
VVG
17
4
mA
Charge pump block
Charge pump output voltage
V
Regulator block
5V regulator voltage
VVREG
4.75
5
5.25
V
Output on resistance
High-side output transistor on resistance
Ron (H)
IO = 0.7A, VG = 17V
0.6
1.0

Low-side output transistor on resistance
Ron (L)
IO = 0.7A, VCC = 12V
0.6
1.0

Sum of high-/low-side output transistor
Ron (H+L)
IO = 0.7A, VCC = 12V, VG = 17V
1.2
2

on resistance
Startup oscillator (OSC) pin
OSC pin charge current
IOSCC
-3.25
-2.5
-1.75
OSC pin discharge current
IOSCD
1.75
2.5
3.75
A
A
Control voltage input (CTL) pin
Motor drive on voltage input range
VCTLON
Motor drive off voltage input range
VCTLOFF
0
3.5
3
V
VREG
V
Continued on next page.
3/29
LV8804FV Application Note
Continued from preceding page.
Ratings
Parameter
Symbol
Conditions
Unit
min
typ
max
Minimum speed setting pin
Minimum speed releasing voltage input
VMINSP2
4
VREG
V
4
VREG
V
0
1
V
0.25
0.35
V
0.225
0.25
0.275
V
V
range
Forward/reverse switching pin
High-level input voltage range
VFRH
Order of current application :
UOUTVOUTWOUT
Low-level input voltage range
VFRL
Order of current application :
UOUTWOUTVOUT
FG output pin
FG output pin low-level voltage
VFG
When IO is 2mA
VRF
Limit current set to 1A when RF is 0.25.
Current limiter circuit
Limiter voltage
Constraint protection circuit
CT pin high-level voltage
VCTH
2.25
2.8
2.95
CT pin low-level voltage
VCTL
0.43
0.5
0.65
V
CT pin charge current
ICTC
-2.9
-2.5
-2.2
A
CT pin discharge current
ICTD
0.23
0.25
0.32
A
ICT charge/discharge ratio
RCT
7
10
13
Soft start circuit
Soft start releasing voltage
VSOFTST
2.25
2.5
2.75
V
SOFTST pin charge current
ISOFTST
0.4
0.6
0.8
A
150
180
210
C
Thermal protection circuit
Thermal protection circuit operating
TSD
Design target *
temperature
*Design target value and no measurement is made. The thermal protection circuit is incorporated to protect the IC from burnout or thermal destruction.
Since it operates outside the IC's guaranteed operating range, the customer's thermal design should be performed so that the thermal protection circuit will not
be activated when the fan is running under normal operating conditions.
4/29
LV8804FV Application Note
4
5.25
VREG[V]
ICC[mA]
3.5
3
5
2.5
4.75
2
6
8
10
12
14
VCC[V]
Figure 1 Ciurcuit consumption cueernt
vs Supply voltage
-30
16
5.25
0
30
60
Temperature[℃]
Figure 2 VREG pin output voltage
vs Temperature
90
3.3
CTL[V]
VREG[V]
3.2
5
3.1
3
2.9
CTL
4.75
0
2.5
5
7.5
10
12.5
load current[mA]
Figure 3 VREG pin output voltage
vs load current
15
6
3.5
0.75
FG L-level[V]
1
CTL[V]
4
3
2.5
MINSP
2.8
8
10
12
14
VCC[V]
Figure 4 CTL pin output voltage
vs VCC
16
0.5
0.25
0
2
-30
0
30
60
Temperature[℃]
Figure 5 CTL pin output voltage
vs Temperature
90
0
1
2
3
4
Io[mA]
Figure 6 FG Low level voltage
vs output current(Io)
5
5/29
LV8804FV Application Note
1.25
High level threshold voltage
hysteresis width
Low level threshold voltage
1
2
1.5
0.75
UH+VL
VH+WL
UH+WL
WH+UL
FR[V]
Ron[Ω]
2.5
VH+UL
WH+VL
0.5
0.5
0.1
0.3
0.5
0.7
0.9
Io[A]
Figure 7 output on resistance
vs output current (Io)
1
0
1.1
6
8
10
12
14
VCC[V]
Figure 8 FR pin Hi-Lo level threshold voltage
vs VCC
16
limiter voltage[V]
0.275
0.25
0.225
6
8
10
12
14
VCC[V]
Figure 9 RF pin limiter voltage
vs VCC
16
6/29
LV8804FV Application Note
Pin Function
Pin No.
1
Pin name
SOFTST
Function
Equivalent circuit
Soft start time setting.
The motor can be started smoothly by
connecting a capacitor between this pin and
ground.
2
FG
FG pulse output. This pin outputs a Hall
sensor system equivalent pulse signal.
3
CT
Motor lockup detection time setting.
When the motor lockup condition is detected,
the protection time period before the
protection circuit is activated is set by
connecting a capacitor between this pin and
ground.
4
OSC
Motor startup frequency setting. A capacitor
must be connected between this pin and
ground. The startup frequency is adjusted by
controlling the charge/discharge current and
capacitance of the capacitor.
5
GND
GND pin.
6
VG
Charge pump step-up voltage output.
A capacitor must be connected between this
pin and the VCC pin or ground.
7
CP
Charge pump step-up pulse output pin.
A capacitor must be connected between this
pin and the CPC pin (pin 14).
8
CPC
Charge pump step-up pin.
A capacitor must be connected between this
pin and the CP pin (pin 13).
13
VCC
Power supply for the IC and motor.
Capacitors must be connected between
these pins and ground.
12
UO
Output pins. Connect these pins to the U, V,
11
VO
and W of the motor coil.
10
WO
9
RF
Output current detection pins. The drive
current is detected by connecting a resistor
between these pins and ground.
Continued on next page.
7/29
LV8804FV Application Note
Continued from preceding page.
Pin No.
Pin name
Function
14
COM
Motor middle point connection.
15
COMIN
Motor position detection comparator filter
Equivalent circuit
pin. A capacitor must be connected between
this pin and the FIL pin (pin 16).
16
FIL
Motor position detection comparator filter
pin. A capacitor must be connected between
this pin and the COMIN pin (pin 15).
17
VREG
Regulator voltage (5V) output.
A capacitor must be connected between
these pins and ground.
18
F/R
Motor rotation direction switching. A
high-level input causes current to flow into
the motor in the order of U, V, and W and a
low-level input in the order of U, W, and V.
Changing the order of current application
turns the motor in the opposite direction.
19
CTL
Motor control voltage input.
When the control voltage is higher than 3V
(3V  CTL voltage), the motor stops.
The motor speed is controlled by varying the
control voltage within the range of 3V to 1V
(3V  CTL voltage  1V). When the control
voltage becomes lower that 1V (1V  CTL
voltage), the current limit set by the RF
resistor is reached.
20
MINSP
Minimum speed setting voltage input.
The minimum speed of the motor can be set
by resistor-dividing the regulator voltage and
feeding the resultant voltage that is within the
range of 1V to 3V (1 V  MINSP  3V).
8/29
LV8804FV Application Note
1. Operation overview
LV8804 is a PWM three-phase sensor less motor driver.
In the sensor less drive, the timing of motor commutation switch is determined by comparing back EMF signal
generated from a motor and the voltage of CON pin (motor middle point voltage).
After power activation, supply any DC input to CTL pin to impress output voltage to the motor coil.
 The FG signal of the frequency is output according to motor rotation.
 Speed of motor rotation is controllable by changing DC input voltage of CTL pin.
 Motor can start up slowly by connecting a capacitance between SOFTST pin and GND pin.
 Motor locking time is settable by connecting a capacitance between CT pin-GND.
UOUT
VOUT
WOUT
back EMF
back EMF
back EMF
UOUT+ back EMF
VOUT+ back EMF
WOUT+ back EMF
Soft-switch area
UOUT
VOUT
WOUT
9/29
LV8804FV Application Note
Output waveform
Full speed drive (PWM100%)
The waveform of output voltage of UOUT pin and FG pin are as follows. This graph shows the waveform when
motor drives at full speed.
The waveform of output voltage for UOUT, VOUT and WOUT are the same.
UOUT 5V/div
2ms/div
Soft-switching area
UOUT 5V/div
UOUT 5V/div
50us/div
UOUT 5V/div
20us/div
UOUT 5V/div
50us/div
20us/div
There are soft switching zone in UOUT signal. Soft switching smoothes out a motor coil current and enables
silent drive.
PWM drive
UOUT 10V/div
2ms/div
The waveform of output voltage of UOUT pin and FG pin are as shown above. This is when the speed of motor
is controlled by PWM.
PWM area
UOUT 10V/div
2ms/div
There are soft switching zones and PWM zones in UOUT signal.
10/29
LV8804FV Application Note
2. Sensor less control
LV8804 is a sensorless motor driver which detects back EMF signal during motor rotation to detect a rotor
position. According to a detected rotor position, a specified output transistor turns on or off, which enables
motor rotation.
When starting up a motor, it is impossible to detect the rotor position because back EMF signal is not generated.
Therefore, motor starts up by turning on and off a specified output transistor by an oscillation frequency defined
by a capacitor between OSC pin and GND pin (startup mode). Then after the startup, a rotor position is
detected by back EMF signal (driving mode).
Principle for Motor starting operation
1) Start up mode  2) Driving mode
Switching pattern of output transistor when the motor start up
Phase-U
1
2
3
4
5
6
Phase-V
Phase-W
Phase-U
Detective
point
Phase-W
Detective
point
* M: output Tr OFF
Phase-V
Detective
point
H: upper output Tr ON
Phase-U
Detective
point
Phase-W
Detective
point
Phase-V
Detective
point
L: lower output Tr ON
In the above figure, UOUT is OFF (Middle), VOUT turns on lower output Tr (Low) and WOUT turn on upper
output Tr (High). The back EMF signal of motor coil is detected by comparing back EMF signal of UOUT and
voltage of COM pin (motor middle point). And output energization pattern is changed as follows:
234561.
If the back EMF signal of motor coil cannot be detected after pattern “1”, output transistor moves on to the next
pattern “2” at the switching timing defined by a capacitor between OSC pin and GND pin. If back EMF signal of
motor coil is detected at WOUT, output energization pattern changes to “345612”.
The timing when the change of output energization takes place varies depends on motor types.
Hence it is necessary to set up an optimum OSC capacitor for the motor. (Refer to “Start up pin setting”)
11/29
LV8804FV Application Note
3.1 How to set pin
Startup pin
In order to adjust startup characteristics of a motor, it is necessary to set OSC pin (OSC-GND capacitor) and
COMIN pin FIL pin (COMIN-FIL capacitor) with optimal capacitances.
The best capacitance depends on motor and condition (power supply, coil current, number of rotation). Hence
be sure to make an adjustment to each motor to find an optimal capacitance.
3.1.1 OSC-GND capacitance setup
(Recommendation value 470pF - 4700pF)
Startup frequency is defined by OSC capacitance.
The output energizing pattern is changed at the time of startup by the 1/134 of OSC frequency.
OSC frequency is determined by repeating charge and discharge to OSC capacitor.
The formula for obtaining OSC frequency is as follows.
Fosc =
Toscc =
Toscd =
1
Toscc+Toscd
(Vosch-Voscｌ)×Cosc
Ioscc
(Vosch-Voscｌ)×Cosc
Ioscd
OSC pin frequency: fosc
OSC capacitor charge time: Toscc
OSC capacitor discharge time: Toscd
OSC capacitance: Cosc
OSC pin high-level voltage: Vosch=1.1V(TYP)
OSC pin low-level voltage: Voscl=0.6V(TYP)
OSC pin charge current: Ioscc
OSC pin discharge current: Ioscd
In general, low OSC capacitance tends to be used if a usage motor runs at a high speed. And high OSC
capacitance is used if a usage motor runs at low speed.
 When a capacitance is high and:
- Startup is slow and fails.
- Startup time varies widely.
Example: fan motor startup test of LV8805
Condition:
Vcc=12V
Goal number of revolutions=4500 rpm*
COMIN-FIL capacitance =2200 pF
Test count=100 times
OSC capacitance=1500 pF
SOFTST capacitance =1 uF
When a capacitance of COS is optimum:
80
69
70
67
70
3σ=0.0611277
average time=1.58371
60
N[times ]
50
40
30
COS capacitance =3300pF
80
3σ=0.0307372
average time=1.57888
60
25
20
50
40
30
21
20
4
0
2
10
0
0
0
1
1.54-1.56
0
1.52-1.54
10
6
4
1
0
1.66-1.68
1.64-1.66
1.62-1.64
1.60-1.62
1.58-1.60
1.66-1.68
1.64-1.66
1.62-1.64
1.60-1.62
1.58-1.60
1.56-1.58
1.54-1.56
starting time[sec]
1.56-1.58
0
0
1.52-1.54
N[times]
When a capacitance of COS is not optimum:
COS capacitance =1500pF
starting time[sec]
Fig. Startup test of a fan motor using LV8805
◎If such behavior is witnessed, use a lower capacitor instead.
*refer to “8. Relation between FG frequency and number of rotation”
12/29
LV8804FV Application Note
 When a capacitance is low and:
- Startup fails.
- Beat lock* occurs.
500us/div
FG 5V/div
IOUT 0.5A/div
UOUT 10V/div
Fig. The output waveform with beat lock
◎If such behavior is witnessed, use a higher capacitor.
Select a capacitance values that allows the shortest possible startup time to achieve target speed and minimal
variations in startup time.
The optimum OSC constant depends on the motor characteristics and startup current, so be sure to recheck
them when either motor or circuit specifications is changed.
(* Refer to “3.2 Beat lock”)
3.1.2 COMIN-FIL capacitance setup
(Recommendation value: 1000 ~ 10000pF)
Compare the back EMF signal from motor and the voltage of CON pin (motor middle point voltage) to detect
the rotor position. The switch timing of motor commutation is determined according to the detected rotor
position. Based on the information, energization timing of motor is determined.
Insert a filter capacitor between the COMIN pin and FIL pin to prevent startup failure caused by noise.
 When a capacitance is high and:
- The timing of output energization is slow during motor rotation.  Driving efficiency falls.
1ms/div
The width of this zone
fluctuates.
UOUT 10V/div
Repeat
The waveform of motor
current is distorted.
IOUT 0.5A/div
Fig. normal waveform
Fig. waveform when FIL-COMIN capacitance is too large.
◎If such behavior is witnessed, use a lower capacitor instead.
 When a capacitance is low and:
- Beat lock* occurs.
- If the capacitor is connected to CT pin, it is hard to switch to Lock protection ** mode.
◎If such behavior is witnessed, use a higher capacitor instead.
A capacitor is selected by checking a usage motor. Run the motor to see whether there is any issue with
startup.
(* Refer to 3.2 Beat lock on next page.)
(** Refer to 3.5 CT pin setup.)
13/29
LV8804FV Application Note
3.2 Beat lock
Beat lock may occur when a motor is stopped abruptly during motor operation or OSC capacitor is too low.
Output waveform under the influence of beat lock is as shown below.
2ms/div
500us/div
FG 5V/div
FG 5V/div
IOUT 0.5A/div
UOUT 10V/div
IOUT 0.5A/div
Beat lock
Motor stop
Fig. The beat lock caused by a motor quick stop
UOUT 10V/div
Fig. The beat lock weave form.
{Behavior}
 There is intense switching sound from transistor and then the motor stops.
 Waveform of OUT pin and FG pin shows the influence of noise.
 Motor cannot restart automatically after motor rotation stops.
Countermeasures:
1) False detection of the internal comparator is prevented by adjusting a capacitor between COMIN and FIL.
Basically, the number of false detection by the internal comparator decreases with a higher capacitor between
COMIN and FIL.
However, care must be taken for the adjustment since excessively high capacitance will give rise to
deterioration in efficiency and delays in the output power-on timing while the motor is running at high speed.
2) Increase the OSC capacitance. By doing so, OSC frequency decreases, which prevents false detection by
the internal comparator due to delay in the output power-on timing. Consequently, beat lock is prevented.
3) Connect a resistor between COMIN pin and GND pin. By doing so, offset is added to the zero-cross
detection comparator. This addition of offset decreases the false detection by the comparator.
As a result, beat lock is prevented.
Offset voltage is obtained by the following formula:
(The resistance between COM and COMIN is about 10kohm, which is determined by the internal circuit.)
Example: VCC=12V, The resistance between COMIN and GND =1M ohm
Approximately 60 mV of offset voltage is generated.
Recommended value of the resistance is approximately 1Mohm.
If a usage motor is replaced, please check the motor startup behavior again.
14/29
LV8804FV Application Note
3.3 RF pin setting
RF resistance is determined by CTL voltage against revolution count of motor when CTL voltage is changed
during motor operation.
This section describes the PWM control method of LV8804.
The block diagram of the control block of LV8804 is as shown below.
LV8804　BLOCK
TOTAL　GAIN＝0.125V/V
VCC
R2
VCTL
R1
12kΩ
COMPARATOR
48kΩ
CTLREF
3V
-
V
+
+
GAIN=0.25V/V
COMPARATOR
-
RF
+
VRF
0.25V
RF
V
×2
TOTAL GAIN＝0.125V/V
CONTROL　VOLTAGE
0.25V
VRF
0.125V
0.25V
0.125V
VCTL：+
VCTL：CTLREF=3V
INPUT2 INPUT1
1V
2V
INPUT１，２＝ΔVIN
（ΔVIN：CTLREF－VCTL）
EXAMPLE１　VCTL＝2V、CTLREF=3V
INPUT１=1V(ΔVIN=CTLREF-VCTL)
CONTROL　VOLTAGE＝1×0.125＝0.125V
Coil current=0.125V/0.25Ω=0.5A
PWM　Duty
VS
INPUT1
PWM　Duty
VS
INPUT2
EXAMPLE２　VCTL＝1V、CTLREF=3V
INPUT２=2V(ΔVIN=CTLREF-VCTL)
CONTROL　VOLTAGE＝2×0.125＝0.25V
Coil current=0.25V/0.25Ω=1A
In PWM control method, current is applied to motor coil until the voltage of RF pin becomes the same as that of
the control voltage determined by VCTL. Current supply to motor coil is stopped when the voltage of RF and
the control voltage turn the same value. This is repeated at every base-frequency of PWM: 50 kHz (determined
by internal circuit).This operation is called current feedback system.
The current of motor coil (Io) against RF resistance (RRF) and input voltage of VCTL (VIN) is obtained as
follows:
Io = (ΔVIN×0.125)/RRF (A)
ΔVIN = VCTLREF-VCTL (VCTLREF=3V)
As the upper figure shows, the control voltage is 125mV when VCTL is 2V. And the control voltage is 250mV
when VCTL is 1V.
15/29
LV8804FV Application Note
The higher the RF resistance is, the more moderate the variation of output current (Io) against variation of
control voltage becomes. In contrast, the lower the RF resistance is, the more precipitous the variation of
output current (Io) against the variation of control voltage becomes.
Given that a usage motor reaches the maximum number of rotation when the current of motor coil is 300mA,
according to the above formula, the number of rotation reaches maximum when RF resistance is 0.25 ohm and
VCTL is 2.4V.
As a result, control voltage range is 2.4V-3.0V.
The number of revolutions reaches maximum when RF resistance is 0.75 ohm and VCTL is 2.4V.
As a result, control voltage range is 1.2V-3.0V.
In summary, it is necessary to select RF resistance within the range of CTL voltage.
RF resistance should be 0.25 ohm or higher. (Since IO max. is 1.2A, the RF resistance must be set in such a
way that the current flowing to the motor does not exceed this maximum value.) Please also check the
operation of usage motors.
3.4 MINSP pin setting
As demonstrated in "RF pin setup", the motor current and the characteristic of motor speed control are
determined by adjusting the resistance of RF resistance.
By connecting a resistor of 0.25 between RF pin and GND, the limit of motor current is set to 1A and we
obtain the control characteristics as shown in the above diagram.
By increasing RF resistance, the limit current reduces; conversely, by reducing RF resistance, the limit current
increases.
By changing CTL voltage between 1V and 3V, the current flowing to the output is limited and the motor speed
is controlled.
To minimize speed, divide REG voltage (5V) by resistors to create a voltage of 1V to 3V input this voltage to
MINSP pin.
If the minimum speed is not set, MINSP pin (pin 9) and CTL pin (pin 8) must be short-circuited.
16/29
LV8804FV Application Note
3.5 CT pin setting
Output transistors are turned off when the motor is stopped by some external factors. (Lock protection)
LV8804 Lock protector circuit Timingchart
Motor rock
Motor
Motor
driving
Motor
stop
Motor restart
Motor stop
Motor try to start up
Motor try to
start up
Motor
driving
VCTH
CT pin
voltage
VCTL
Detecting time Lock protection ON time
OSC oscillate 138 cikle
Charging time
Start-up mode
Driving mode
Start charging
CT-GND capacitor
Lock protection OFF time
Discharging time
Lock protection mode
Start-up mode Driving mode
CT pin voltages reach Vctl and change start-up mode.
Then turn on output transistor and the motor restart.
Start chargingCT-GND capacitor.
CT pin voltages reach Vcth and
change lock protection mode.
Then turn off output transistor and
start discharging CT-GND capacitor.
CT-GND capacitor is charged during
starting mode.
CT-GND capacitance force into
discharge when change to drive mode
before CT pin voltages reach Vcth.
In case of keeping on motor lock, CT
pin voltages reach Vcth and change to
lock protection mode.
Lock protection ON/OFF time is set by capacitor connected between CT pin and GND pin.
Lock protection ON time is the time between the start of charge for CT-GND capacitor by CT pin charge current
and at the point where CT pin obtains high-level voltage (2.8Vtyp).
Lock protection OFF time is the time between the start of discharge for CT-GND capacitor by CT pin discharge
current and at the point where CT pin obtains low-level voltage (0.5Vtyp).
Recommended capacitance for CT pin is 0.47uF-1uF.
Lock protection time is calculated by the following formula.
Loc protection on time: Tlon
Loc protection off time: Tloff
CT pin high-level voltage: Vcth
CT pin low-level voltage: Vctl
CT pin capacitance: Cct
CT pin charge current: Ictc
CT pin discharge current: Ictd
When the power is ON or CTL pin is set from OFF to driving mode, IC always start from startup mode. Startup
can fail if the motor does not start up before “lock protect on time”.
The timing depends on the relation of startup between the IC and motors. Hence it is necessary to check the
startup behavior of usage motors. If CT pin is unused, connect this pin to GND.
17/29
LV8804FV Application Note
3.6 SOFTST pin setting
ソフトスタートと電流リミットの関係
VREG
VCC
SOFTST
+
+
-
1/10
+
2.65V
2.5V
0.25V
SOFTST
0V
TIME
SOFTST時間
Fig. Timing chart of SOFTST pin.
RF
Fig. Block diagram of SOFTST pin.
SOFTST端子電圧が2.5Vに達するまでは
AsSOFTST端子電圧によってリミッタ電圧が決定する。
soon as the capacitor connected to SOFTST pin is charged, the voltage of SOFTST pin increases.
And
SOFTST operation continues until the voltage of SOFTST pin reach to the point of “soft start cancel
SOFTST時間　voltage” (2.5Vtyp). The soft start time is adjustable by changing capacitor connected between SOFTST pin and
=ソフトスタート解除電圧×SOFTSTコンデンサ容量値/SOFTST端子充電電流
GND.
コンデンサ容量値　＝　1uFの場合　During
soft start operation where the voltage of SOFTST is lower than “soft start releasing voltage”; current
2.5V×1uF/0.6uA　≒　4.167sec　となる。
limit
drive is performed by the limit current obtained by the following formula.
リミット電流(ソフトスタート時）　＝　(SOFTST端子電圧/10）/RF抵抗値
RF抵抗＝1Ω,ソフトスタート開始１sec後のリミット電流
ILimit　＝　（0.6/10）/1　=　0.06A　From the above formula we know that current limit value increases along with the voltage increase of SOFTST
pin.
Motor rotation increases slowly because sharp current increase when starting up motor is under control.
Recommended capacitance of SOFTST pin is 0.47uF-1uF.
Softstart time is obtained by the following formula:
Softstart time: Tsoft
Softstart releasing voltage: Vsoft=2.5V (TYP)
SOFTST pin capacitance:Csoft
SOFTST pin charge current: Isoft=0.6uA (TYP)
Note that if SOFTST pin capacitance is too high, the starting torque of motor is insufficient since the increase of
motor current is moderate. As a result, lock protection may operate before the startup of motor. Therefore, it is
necessary to check the optimum capacitance with a usage motor.
Connect pull-up resistor to VREG pin when SOFTST pin is unused.
Pull-up resistor should be approximately 10kohm (Recommended value).
18/29
LV8804FV Application Note
3.7 Operating principle of charge pump and how to select a capacitor for VG pin and a capacitor
between CP pin and CPC pin
Charge pump is a circuit which generates voltage to drive output transistors in LV8804.
LV8804 is a sensor-less motor driver which detects back EMF signal during motor rotation to determine a rotor
position and runs the motor.
Back EMF from motor is detected by the internal comparator whose power source is the charge pump.
The operation principle of charge pump is as follows.
0V
VREG
CP
VCC
VREG VREG+VCC
VREG
CPC
repeat
VCC
CP
CPC
VCC
VG
Fig. １
VG
Fig. ２
First, the transistors in red circles in Fig. 1 turn on. Then the capacitor between CP pin and CPC pin is charged
and the voltage of CP pin turns 0V and CPC pin turns Vcc voltage, respectively.
Second, the transistors in red circles in Fig. 2 turn on. Then the electric charge in the capacitor between CP pin
and CPC pin transfers to VG pin. Since the voltage of CP pin becomes VREG voltage, the voltage of CPC pin
and GV pin is as follows: VREG voltage + Vcc voltage.
Last, through repeating the operations of Fig. 1 and Fig. 2, VG pin voltage increases and stabilizes at VREG
voltage+ Vcc voltage.
Actually, VG voltage is a little lower than VREG voltage+ Vcc voltage since efficiency is not 100% and there is
internal power consumption.
The function of capacitor between VG pin and VCC pin is to retain electric charge and to stabilize voltage.
(The capacitor connected to VG pin has the same function even when it is connected to GND.
The only difference is whether the initial voltage of VG pin is either GND or Vcc.)
When the capacitor between CP pin and CPC pin or VG pin is too low, voltage of VG pin decreases since
power supply cannot catch up with the power consumption by circuits.
Therefore, the minimum VG pin voltage should be above Vcc+4V.
Also make sure that no ripple of voltage is observed in VG pin through checking oscilloscope when the IC is in
operation.
Recommended capacitances of Charge pump are as follows:
The capacitance between CP pin and CPC pin: 0.033uF-0.1uF
The capacitance between VG pin and VCC pin: 0.1uF ~ above 0.22uF
The capacitors should be in the following relation:
The capacitance between CP pin and CPC pin ≤ The capacitance between VG pin and VCC pin
19/29
LV8804FV Application Note
4. Other protection circuits
4.1 Current limier
Current limiter is configured by adjusting the resistance between RF and GND.
When the pin voltage exceeds 0.25V, the current is limited, and regeneration mode is set. In the application
circuit, the current limit setting voltage is 0.25V; therefore the current limit operates at 1A.
The calculation formula is given below.
RF resistance = 0.25V/target current limit value
Current limit driving
OUT 10V/div
FG 5V/div
IOUT 0.2A/div
Red-circled IOUT is the current limited area.
4.2 Thermal protection circuit
o
LV8804 integrates thermal protection circuit. When Junction temperature, Tj exceeds 180 C, output transistor
turns off.
20/29
LV8804FV Application Note
5. Application Circuit Example
Pull-up to VREG
C6
R3
R2
FG
1
SOFTST
MINSP
20
2
FG
CTL
19
3
CT
FR
18
4
OSC
VREG
17
5
GND
FIL
16
6
VG
COMIN
15
7
CP
COM
14
8
CPC
VCC
13
CTL
Pull-up to VCC
SW
C5
C2
C7
C4
LV8804FV
C8
C3
VCC
C1
9
RF
UO
12
10
WO
VO
11
D2(*2)
D1(*1)
R1
WO
VO
UO
COM
LV8804FV parts list
R1
0.25 ohm
C1
10uF/25V
R2
1K ohm
C2
0.1uF
R3
10K ohm
C3
0.1uF
C4
1uF
C5
1uF
C6
1uF
C7
1000pF
C8
0.01uF
*This application circuit is only for example.
Please use this as reference when you design circuit for the first time.
21/29
LV8804FV Application Note
6. Caution for the usage of evaluation board
Parts that require connection as close as possible to the IC
 C1 (capacitor between Vcc-GND)
GND line pattern
 C2 (capacitor between VG-Vcc)
 C3 (capacitor between CP-CPC)
Signal GND
 C4 (capacitor between VREG-GND)
 C7 (capacitor between OSC-GND)
 C8 (capacitor between COMIN-FIL)
VCC
Power GND
+
Think line (high current line)
 Vcc, GND, UO, VO, WO, RF
Single point GND
(*1) Reverse connection protection diode (D1): This diode protects reverse connection.
Insert a diode between power supply and VCC pin to protect the IC from destruction due to reverse
connection. Connection of this diode is not necessary required.
(*2) LV8804 uses synchronous rectification for high efficiency drive. Synchronous rectification is effective for
cutting heat and higher efficiency. However, it may increase supply voltage.
If the supply voltage shall increase, make sure that it does not exceed the maximum ratings by inserting a
zener diode (D2) between power supply and GND.
(*3) The pins must be short-circuited on the print pattern.
 VCC pins (13pin)
 GND pins (5pin)
 VREG pins (17pin)
 RF pins (9pin)
(*4) VREG pins (17pin) are the control system power supply pin and regulator output pin, which create the
power supply of the control unit. Be sure to connect a capacitor between this pin and GND in order to
stabilize control system operation.
Since these pins are used to supply current for control and generate the charge pump voltage, connect a
higher capacitor than the capacitor connected to the charge pump.
(*5) The voltage of CTL pin (pin 19) should be changed by the Slew Rate of 0.5V/ms or higher.
If the slew rate is below 0.5V/ms, current may return to the power supply, which leads to IC destruction.
(*6) Pin protection resistor (R2): It is recommended that resistors higher than 1k ohm are connected serially to
protect pins against misconnection such as GND open and reverse connection.
Parts name and recommended value
Parts No.
Name
C1
Vcc-GND
C2
VG-Vcc(GND)
C3
CP-CPC
C4
VREG-GND
C5
CT-GND
C6
SOFTST-GND
C7
OSC-GND
C8
COMIN-FIL
R1
RF resistance
R2
Pin protection resistor
R3
Pull-up resistance
Recommended value
Over 10uF
Over 0.1uF
0.033uF(about 1/3 of C2)
Above 1uF(larger than C2,C3)
0.47uF~1uF
0.47uF~1uF
470~4700pF
1000~10000pF
Above 0.25ohm(current limit=1A)
1k ohm (about 1/10 of R3)
10k ohm
22/29
LV8804FV Application Note
7. Relation of thermal resistance
How to measure Tj
The surface temperature of IC is obtained from Tj of IC as follows:
In order to obtain a surface temperature of IC from a junction temperature of IC, a thermal resistance between
junction part and case: θjc [°C/W] are required.
θjc is a thermal increase per power dissipation.
The calculation of θjc is quite difficult, so it should be obtained through measurement.
Jθjc of SSOP-20 package is 27°C/W when measured with independent IC, 17°C/W: with the glass epoxy board
(size:76.1×114.3×1.6tmm)
The difference between the surface temperature of IC and junction temperature is obtained as follows:
Tj[°C] - Tc[°C]=Pd[W]×θjc[°C/W]
Tj: Junction temperature
Tc: Case temperature
Pd: Power dissipation of the IC
θjc: Thermal resistance between junction part and case
An approximate “Pd” value can be obtained by the following formula:
2
Pd = Vcc×Icc + Ron × Im Vcc: power supply
Icc: circuit current by VCC
Ron: Sum of the low and high side output transistor ON resistance
Im: Current of motor drive
Where VCC=12V, ICC=4mA, Ron=2 ohm and Im=0.5A, Pd is obtained as follows:
12V × 4mA + 2 ohm × 0.5A × 0.5A = 548mW
When measured with independent IC without a board, Tj - Tc is 13.15°C.
* Caution
θjc is dependent on a board. Hence it is recommended to measure θjc with a usage board.
8. Relation between FG frequency and number of rotation
The relation between FG frequency (FG), number of motor rotations (N[rpm]) and pole number of motor
magnetic (p) is as follows:
Based on the formula, number of motor rotations is obtainable from FG frequency.
Example: Where FG frequency=200Hz and pole number=4,
The maximum number of motor rotation controllable by LV8804 is:
Maximum
For example, the maximum number of motor rotation is approximately 15.6 k rpm when pole number is 4.
Make sure to use this device within this range of motor rotation.
23/29
LV8804FV Application Note
9 Evaluation board manual
Oscilloscope
CURRENT PROBE
AMPLIFIER 1
PROBE
INPUT
OUTPUT
FAN Motor
Function generator
Power supply
Table: Required Equipment
Equipment
Power supply
Function generator
Oscilloscope
Current probe
LV8804FV Evaluation Board
Motor
Efficiency
12V-1A
DC 0-VREG
4 channel
12V-3W
24/29
LV8804FV Application Note
Test Procedure:
1. Connect the test setup as shown above.
2. Initial check
Boot up at the VCC = 12V.
CTL=0V (PWM 100%)
Confirm that the motor rotates smoothly and in the right direction.
Switch the FR switch when the motor rotation direction is different.
3. Booting check (StartUp-mode)
Check whether a booting of a motor is stable. (Booting)
Boot up at the VCC = 6V and 12V.
When CTL voltage varies from 0V to 4V, check the change in the motor rotation speed.
And then, at each VCC and CTL voltage check whether a motor boots 100 times in 100times.
Check the some waveforms. (Booting waveforms)
Boot up at the VCC =12V.
Check the WO, VO and FG voltage waveform at scope CH1, CH2 and CH3, and the output current
waveform of WO at scope CH4 by the Oscilloscope.
ex) These waveforms are different by each motor.
StartUp-mode
T=0.5s/div
UO
5V/div
FG
5V/div
Current
of UO
1A/div
Turn on the power supply
4. Normal rotation check (Regular-Rotation-mode)
Check the some waveforms. (Rotation waveforms)
Supply the VCC=12V.
Check the WO, VO and FG voltage waveform at scope CH1, CH2 and CH3, and the output current
waveform of WO at scope CH4 by the Oscilloscope.
ex:) These waveforms are different by each motor.
Regular-Rotation-mode
T=2ms/div
UO
5V/div
FG
5V/div
Current
of UO
1A/div
25/29
LV8804FV Application Note
5. Lock detection check (Motor-Lock-mode)
Check the Lock detection behavior. (Lock)
Supply the VCC=12V.
Check if the signal of WO, VO and UO is off when Motor is manually stopped.
Then, check the WO, VO and FG voltage waveform at scope CH1, CH2 and CH3, and the output current
waveform of WO at scope CH4 by the Oscilloscope.
ex) These waveforms are different by each motor.
Motor-Lock-mode
T=0.5s/div
UO
5V/div
FG
5V/div
Current
of UO
1A/div
The Motor is stopped
6. Checking result
A sample of checking result is shown below.
VCC
12V
6V
CTL voltage
0V
1.5V
2.5V
0V
1.5V
2.5V
Booting
100/100
100/100
100/100
100/100
100/100
100/100
Rotation speed (rpm)
OK
OK
OK
OK
OK
OK
Rotation waveforms
OK
OK
OK
OK
OK
OK
Io
value
value
value
value
value
value
Lock
OK
OK
OK
OK
OK
OK
26/29
LV8804FV Application Note
Evaluation board circuit diagram
Pull-up to VREG
R3
10kΩ
C6
1uF
SOFTST
2
FG
20
CTL
19
R7
1kΩ
Pull-up to VCC
R6
CTL
0Ω
3
C5
1uF
CT
FR
18
SW
C7
1000pF
C2
0.1uF
MINSP
0Ω
R2
FG
1
4
OSC
VREG
17
5
GND
FIL
16
C4
LV8804FV
6
VG
COMIN
15
7
CP
COM
14
8
CPC
VCC
13
9
RF
UO
12
10
WO
VO
11
1uF
C8
0.01uF
C3
0.1uF
0Ω
D1(*1) VCC
C1
10uF
D2(*2)
R1
WO
VO
UO
COM
Bill of Materials for LV8804FV Evaluation Board
Designator
IC1
Quantity
Description
Value
Tolerance
Footprint
Manufacturer
Manufacturer Part
Number
Substitution
Allowed
Lead Free
SSOP20J
(225mil)
ON
Semiconductor
sany o
LV8804FV
No
y es
1
Motor Driv er
C1
1
VCC By pass
capacitor
10µF 25V
±10%
murata
GRM32DR71E106KA12
y es
y es
C4,C5,C6
3
capacitor
1µF
±10%
murata
GRM21BR11E105KA99
y es
y es
C2,C3
2
capacitor
0.1µF
±10%
murata
GRM188R11E104KA01D
y es
y es
C7
1
capacitor
1000pF
±10%
murata
GRM188R11E102KA01
y es
y es
C8
1
capacitor
0.01µF
±10%
murata
GRM2192C1H103JA01D
y es
y es
R1
4
resistor
1ohm
±5%
rohm
MCR10EZHFL1R00
y es
y es
R2
1
resistor
1kohm
±5%
rohm
RK73B1JT102J
y es
y es
R3
1
resistor
10kohm
±5%
rohm
RK73B1JT103J
y es
y es
R6,R7
2
resistor
0ohm
±6%
rohm
RK73B1J 0ΩJ
y es
y es
SW1-SW4
1
Switch
MIYAMA
MS-621-A01
y es
y es
TP1-TP12
8
Test points
MAC8
ST-1-3
y es
y es
zener diode
ON on
Semiconductor
semiconductor
1SMA5930BT3G
No
y es
D2
1
27/29
LV8804FV Application Note
Evaluation Board PCB Design
50mm
50mm
50mm
(Top side/ Pattern)
(Back side/ Pattern)
(Top side/ Resist&Silk)
(Top side/ Resist&Silk)
Allowable power disspation Pdmax_W
2.0
Specified circuit board :
50 x 50 x 1.6 mm3
Two layer glass epoxy board
1.45
1.0
0.64
0.0
-40
-20
0
20
40
60
80
100
120
Amblent temperatur, Ｔａ_℃
Pdmax - Ta
28/29
LV8804FV Application Note
ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number
of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at
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warranty, representation or guarantee regarding the suitabilityof its products for any particular purpose, nor does SCILLC assume any liability arising out of the
application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental
damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual
performance may vary over time. All operating parameters, including“Typicals” must be validated for each customer applicationby customer’s technical experts.
SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as
components in systems intended for surgical implant into the body, or other applicationsintended to support or sustain life, or for any other applicationin which
the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any
such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors
harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or
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29/29