A20737x Application Note (ANN - 20737x, March 2015) Description of BCM20737 BLE SoC from Broadcom, featured in AIR for WICED module A20737 INTRODUCTION F E A T U RE S Provided courtesy of Broadcom, the following application note (originally data sheet BCM 20737 from Broadcom) describes the BCM20737 Single-Chip BLE system-on-chip on which Anaren’s AIR for Wiced modules (A20737x) are based. • GENERAL DESCRIPTION The Broadcom® BCM20737 is an advanced Bluetooth low energy (aka Bluetooth Smart) SoC that supports wireless charging, includes advanced security features and introduces new software support for NFC pairing. The BCM20737 is designed to support the entire spectrum of Bluetooth Smart use cases for the medical, home automation, accessory, sensor, Internet Of Things, and wearable market segments. The BCM20737 radio has been designed to provide low power, low cost, and robust communications for applications operating in the globally available 2.4 GHz unlicensed Industrial, Scientific, and Medical (ISM) band. • • • • • • • • • • • • • • The single-chip Bluetooth low energy SoC is a monolithic component implemented in a standard digital CMOS process and requires minimal external components to make a fully compliant Bluetooth device. The BCM20737 is available in a 32-pin, 5 mm × 5 mm 32-QFN package as well as WLBGA SIP and die packages. • • • • • • A P P LIC AT IO N S • The following profiles are supporteda in ROM: • Battery status • Blood pressure monitor • Find me • Heart rate monitor • Proximity • Thermometer • Weight scale • Time • Alliance for Wireless Power (A4WP) wireless charging Support for RSA encryption/decryption and key exchange mechanisms (up to 4 kbit) Support for X.509 certificate exchange Support for NFC tag-based "tap-to-pair" Support for Bluetooth Smart Based Audio Bluetooth low energy (BLE)-compliant Infrared modulator IR learning Supports Adaptive Frequency Hopping Excellent receiver sensitivity 10-bit auxiliary ADC with nine analog channels On-chip support for serial peripheral interface (master and slave modes) Broadcom Serial Communications interface (compatible with Philips® I2C slaves) Programmable output power control Integrated ARM® Cortex™-M3 based microprocessor core Automation Profile Support for secure OTA On-chip power-on reset (POR) Support for EEPROM and serial flash interfaces Integrated low-dropout regulator (LDO) On-chip software controlled power management unit Package type: - 32-pin 32-QFN package (5 mm × 5 mm) RoHS compliant Additional profiles that can be supporteda from RAM include: • Blood glucose monitor • Temperature alarm • Location a.Full qualification and use of these profiles may require FW updates from Broadcom. Some of these profiles are under development/approval at the Bluetooth SIG and conformity with the final approved version is pending. Contact your supplier for updates and the latest list of profiles. 6635 Kirkville Road • East Syracuse, NY 13057 • Phone: 315-432-8909 • Fax: 315-432-9121 March 2015 Application Note ANN-20737x Figure 1: Functional Block Diagram Muxed on GPIO UART_TXD UART_RXD Tx RTS_N Rx CTS_N 1.2V VDD_CORE Domain WDT Processing Unit (ARM -CM3) SDA/ MOSI Test UART Periph 320K UART ROM BSC/SPI Master Interface (BSC is I2C compa ble) 60K RAM 1.2V SCL/ SCK MISO VDD_CORE VSS, VDDO, VDDC 28 ADC Inputs 1.2V 1.2V POR CT ADC 1.2V LDO 1.425V to 3.6V 3.6V MIA POR System Bus 32 kHz LPCLK Peripheral Interface Block hclk (24 MHz to 1 MHz) RF Control and Data 2.4 GHz Radio Bluetooth Baseband Core 24 MHz RF I/O T/R Switch I/O Ring Control Registers Volt. Trans GPIO Control/ Status Registers IR Mod. and Learning SPI M/S PMU Power WAKE 14 GPIOs 1.2V VDD_RF Domain IR I/O 9 ADC Inputs 24 MHz Ref Xtal Anaren® March 2015 • ANN-20737x VDD_IO Domain I/O Ring Bus Frequency Synthesizer AutoCal 1.62V to 3.6V High Current Driver Controls 32 kHz LPCLK 128 kHz LPO 128 kHz LPCLK ÷4 PWM 32 kHz 1.62V to 3.6V VDD_IO Page 2 Revision History Revision Date Change Description ANN-20737x 03/2015 Initial release. Content provided herein courtesy of Broadcom Anaren Inc. 6635 Kirkville Road East Syracuse, NY 13057 © 2015 by Anaren Inc. All rights reserved Printed in the U.S.A. This application note (including, without limitation, the Broadcom component(s) identified herein) is not designed, intended, or certified for use in any military, nuclear, medical, mass transportation, aviation, navigations, pollution control, hazardous substances management, or other high-risk application. ANAREN PROVIDES THIS APPLICATION NOTE “AS-IS,” WITHOUT WARRANTY OF ANY KIND. ANAREN DISCLAIMS ALL WARRANTIES, EXPRESSED AND IMPLIED, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT. Application Note ANN-20737x Table of Contents Table of Contents About This Document .................................................................................................................................. 8 Purpose and Audience ............................................................................................................................ 8 Document Conventions ........................................................................................................................... 8 Technical Support ........................................................................................................................................ 8 Section 1: Functional Description ..................................................................................... 9 Bluetooth Baseband Core ........................................................................................................................... 9 Frequency Hopping Generator................................................................................................................ 9 E0 Encryption .......................................................................................................................................... 9 Link Control Layer ................................................................................................................................... 9 Adaptive Frequency Hopping .................................................................................................................. 9 Bluetooth Low Energy Profiles .............................................................................................................. 10 Test Mode Support................................................................................................................................ 10 Infrared Modulator...................................................................................................................................... 11 Infrared Learning ........................................................................................................................................ 12 Wireless Charging ...................................................................................................................................... 12 Security ....................................................................................................................................................... 13 Support for NFC Tag Based Pairing ......................................................................................................... 13 Bluetooth Smart Audio .............................................................................................................................. 13 ADC Port...................................................................................................................................................... 14 Serial Peripheral Interface ......................................................................................................................... 15 Microprocessor Unit................................................................................................................................... 16 EEPROM Interface................................................................................................................................ 16 Serial Flash Interface ............................................................................................................................ 16 Internal Reset ........................................................................................................................................ 17 External Reset....................................................................................................................................... 17 Integrated Radio Transceiver .................................................................................................................... 18 Transmitter Path.................................................................................................................................... 18 Digital Modulator ............................................................................................................................ 18 Power Amplifier .............................................................................................................................. 18 Receiver Path........................................................................................................................................ 18 Digital Demodulator and Bit Synchronizer ..................................................................................... 18 Receiver Signal Strength Indicator................................................................................................. 18 Local Oscillator...................................................................................................................................... 18 Calibration ............................................................................................................................................. 19 Internal LDO Regulator ......................................................................................................................... 19 Peripheral Transport Unit .......................................................................................................................... 19 Broadcom Serial Communications Interface ......................................................................................... 19 Anaren® March 2015 • ANN-20737x Page 4 Application Note ANN-20737x Table of Contents UART Interface...................................................................................................................................... 20 Clock Frequencies...................................................................................................................................... 20 Crystal Oscillator ................................................................................................................................... 20 Peripheral Block ............................................................................................................................. 21 32 kHz Crystal Oscillator................................................................................................................ 21 GPIO Port .................................................................................................................................................... 22 PWM............................................................................................................................................................. 23 Power Management Unit............................................................................................................................ 24 RF Power Management ........................................................................................................................ 24 Host Controller Power Management ..................................................................................................... 24 BBC Power Management...................................................................................................................... 24 Section 2: Pin Assignments ............................................................................................. 25 Pin Descriptions ......................................................................................................................................... 25 Ball Maps..................................................................................................................................................... 30 Section 3: Specifications .................................................................................................. 31 Electrical Characteristics........................................................................................................................... 31 RF Specifications ....................................................................................................................................... 34 Timing and AC Characteristics ................................................................................................................. 36 UART Timing......................................................................................................................................... 36 SPI Timing............................................................................................................................................. 37 BSC Interface Timing ............................................................................................................................ 39 Section 4: Mechanical Information .................................................................................. 40 Tape Reel and Packaging Specifications.............................................................................................. 41 Section 5: Ordering Information ...................................................................................... 42 Appendix A: Acronyms and Abbreviations .................................................................... 43 Anaren® March 2015 • ANN-20737x Page 5 Application Note ANN-20737x List of Figures List of Figures Figure 1: Functional Block Diagram................................................................................................................... 2 Figure 2: Infrared TX ........................................................................................................................................ 11 Figure 3: Infrared RX ....................................................................................................................................... 12 Figure 4: Internal Reset Timing........................................................................................................................ 17 Figure 5: External Reset Timing ...................................................................................................................... 17 Figure 6: Recommended Oscillator Configuration—12 pF Load Crystal ........................................................ 20 Figure 7: 32 kHz Oscillator Block Diagram ...................................................................................................... 21 Figure 8: PWM Channel Block Diagram .......................................................................................................... 23 Figure 9: 32-pin QFN Ball Map ........................................................................................................................ 30 Figure 10: UART Timing .................................................................................................................................. 36 Figure 11: SPI Timing – Mode 0 and 2 ............................................................................................................ 37 Figure 12: SPI Timing – Mode 1 and 3 ............................................................................................................ 38 Figure 13: BSC Interface Timing Diagram ....................................................................................................... 39 Figure 14: 32-pin QFN ..................................................................................................................................... 40 Figure 15: Pin 1 Orientation ............................................................................................................................. 41 Anaren® March 2015 • ANN-20737x Page 6 Application Note ANN-20737x List of Tables List of Tables Table 1: ADC Modes........................................................................................................................................ 14 Table 2: BCM20737 First SPI Set (Master Mode) ........................................................................................... 15 Table 3: BCM20737 Second SPI Set (Master Mode) ...................................................................................... 15 Table 4: BCM20737 Second SPI Set (Slave Mode) ........................................................................................ 15 Table 5: Reference Crystal Electrical Specifications ....................................................................................... 21 Table 6: XTAL Oscillator Characteristics ......................................................................................................... 22 Table 7: Pin Descriptions ................................................................................................................................. 25 Table 8: GPIO Pin Descriptions ....................................................................................................................... 27 Table 9: Maximum Electrical Rating ................................................................................................................ 31 Table 10: Power Supply................................................................................................................................... 31 Table 11: LDO Regulator Electrical Specifications .......................................................................................... 32 Table 12: ADC Specifications .......................................................................................................................... 32 Table 13: Digital Levels.................................................................................................................................... 33 Table 14: Current Consumption ...................................................................................................................... 33 Table 15: Receiver RF Specifications .............................................................................................................. 34 Table 16: Transmitter RF Specifications .......................................................................................................... 34 Table 17: UART Timing Specifications ............................................................................................................ 36 Table 18: SPI Interface Timing Specifications ................................................................................................. 37 Table 19: BSC Interface Timing Specifications................................................................................................ 39 Table 20: BCM20737 5 × 5 × 1 mm QFN, 32-Pin Tape Reel Specifications ................................................... 41 Table 21: Ordering Information ........................................................................................................................ 42 Anaren® March 2015 • ANN-20737x Page 7 Application Note ANN-20737x About This Document About This Document Purpose and Audience This document provides a description of the major blocks, interfaces, pin assignments, and specifications of the BCM20736 single-chip Bluetooth low energy (BLE) SoC. It is provided for designers responsible for adding the BCM20736 BLE SoC to wireless input device applications including heart-rate monitors, blood-pressure monitors, proximity sensors, temperature sensors, wireless chargers, and battery monitors. Acronyms and Abbreviations In most cases, acronyms and abbreviations are defined on first use. Acronyms and abbreviations in this document are also defined in Appendix A: “Acronyms and Abbreviations,” on page 44. For a comprehensive list of acronyms and other terms used in Broadcom documents, go to: http://www.broadcom.com/press/glossary.php. Document Conventions The following conventions may be used in this document: Convention Description Bold User input and actions: for example, type exit, click OK, press Alt+C Mo nospace Code: #incl ude <i ostre am > HTML: <td rowspan = 3> Command line commands and parameters: wl [-l] <comm and> <> Placeholders for required elements: enter your <username> or wl <comma nd> [] Indicates optional command-line parameters: wl [-l ] Indicates bit and byte ranges (inclusive): [0:3] or [7:0] Technical Support Broadcom provides customer access to a wide range of information, including technical documentation, schematic diagrams, product bill of materials, PCB layout information, and software updates through its customer support portal (https://support.broadcom.com). For a CSP account, contact your Sales or Engineering support representative. In addition, Broadcom provides other product support through its Downloads and Support site (http://www.broadcom.com/support/). Anaren® March 2015 • ANN-20737x Page 8 Application Note ANN-20737x Functional Description S ec t i o n 1 : F u n c t i o n a l D e s c r i p t i o n Bluetooth Baseband Core The Bluetooth Baseband Core (BBC) implements all of the time-critical functions required for high performance Bluetooth operation. The BBC manages the buffering, segmentation, and data routing for all connections. It also buffers data that passes through it, handles data flow control, schedules ACL TX/RX transactions, monitors Bluetooth slot usage, optimally segments and packages data into baseband packets, manages connection status indicators, and composes and decodes HCI packets. In addition to these functions, it independently handles HCI event types and HCI command types. The following transmit and receive functions are also implemented in the BBC hardware to increase TX/RX data reliability and security before sending over the air: • Receive Functions: symbol timing recovery, data deframing, forward error correction (FEC), header error control (HEC), cyclic redundancy check (CRC), data decryption, and data dewhitening. • Transmit Functions: data framing, FEC generation, HEC generation, CRC generation, link key generation, data encryption, and data whitening. Frequency Hopping Generator The frequency hopping sequence generator selects the correct hopping channel number depending on the link controller state, Bluetooth clock, and device address. E0 Encryption The encryption key and the encryption engine are implemented using dedicated hardware to reduce software complexity and provide minimal processor intervention. Link Control Layer The link control layer is part of the Bluetooth link control functions that are implemented in dedicated logic in the Link Control Unit (LCU). This layer consists of the Command Controller, which takes software commands, and other controllers that are activated or configured by the Command Controller to perform the link control tasks. Each task performs a different Bluetooth link controller state. STANDBY and CONNECTION are the two major states. In addition, there are five substates: page, page scan, inquiry, and inquiry scan. Adaptive Frequency Hopping The BCM20737 gathers link quality statistics on a channel-by-channel basis to facilitate channel assessment and channel map selection. The link quality is determined by using both RF and baseband signal processing to provide a more accurate frequency hop map. Anaren® March 2015 • ANN-20737x Page 9 Application Note ANN-20737x Bluetooth Baseband Core Bluetooth Low Energy Profiles The BCM20737 supports Bluetooth low energy, including the following profiles that are supported1 in ROM: • Battery status • Blood pressure monitor • Find me • Heart rate monitor • Proximity • Thermometer • Weight scale • Time • Alliance for Wireless Power (A4WP) wireless charging • Automation profile • Support for secure OTA The following additional profiles can be supported1 from RAM: • Blood glucose monitor • Temperature alarm • Location • Custom profile Test Mode Support The BCM20737 fully supports Bluetooth Test mode, as described in the Bluetooth low energy specification. 1. Full qualification and use of these profiles may require FW updates from Broadcom. Some of these profiles are under development/approval at the Bluetooth SIG and conformity with the final approved version is pending. Contact your supplier for updates and the latest list of profiles. Anaren® March 2015 • ANN-20737x Page 10 Application Note ANN-20737x Infrared Modulator Infrared Modulator The BCM20737 includes hardware support for infrared TX. The hardware can transmit both modulated and unmodulated waveforms. For modulated waveforms, hardware inserts the desired carrier frequency into all IR transmissions. IR TX can be sourced from firmware-supplied descriptors, a programmable bit, or the peripheral UART transmitter. If descriptors are used, they include IR on/off state and the duration between 1–32767 µsec. The BCM20737 IR TX firmware driver inserts this information in a hardware FIFO and makes sure that all descriptors are played out without a glitch due to underrun (see Figure 2). Figure 2: Infrared TX Anaren® March 2015 • ANN-20737x Page 11 Application Note ANN-20737x Infrared Learning Infrared Learning The BCM20737 includes hardware support for infrared learning. The hardware can detect both modulated and unmodulated signals. For modulated signals, the BCM20737 can detect carrier frequencies between 10 kHz– 500 kHz and the duration that the signal is present or absent. The BCM20737 firmware driver supports further analysis and compression of learned signal. The learned signal can then be played back through the BCM20737 IR TX subsystem (see Figure 3). Figure 3: Infrared RX Wireless Charging The BCM20737 includes support for wireless charging in hardware, software, and firmware. It supports the protocol for implementing wireless charging solutions based on the specifications written by the Alliance for Wireless Power (A4WP). The A4WP protocol is embedded in the BCM20737. Hardware and firmware elements required for wireless charging are either implemented in the BCM20737 or can be obtained through a Broadcom technical support representative (see page 8). An end-to-end charging solution comprises of the following: • Power Transmitting Unit (PTU): The PTU transfers the power to the receiving unit. The receiving unit is any device (phone, wearable, or other embedded device) that needs to be charged. The PTU is typically plugged into a power source such as a wall outlet. The BCM20737 includes the peripherals needed to implement and drive a reference charging circuit and otherwise requires only a few external components. PTU reference designs based on the BCM20737, including bills of material (BOMs), are available through Broadcom technical support. Depending on charging power requirements, a Power Management Unit (PMU) such as the BCM8935X may be included in the design. However, most PTUs requiring < 5W will not need a PMU. The references designs leverage ADCs, PWMs, and other internal peripherals to help drive the charging circuitry for energy transfer as well as provide feedback for charging control. The application and algorithm that drive the reference designs are available on request. • Power Receive Unit (PRU): The PRU receives energy from the PTU to charge the local device, and is typically embedded in the local device. Like the PTU, a separate PMU may or may not be needed depending on power requirements. PRU reference designs based on the BCM20736, both with and without a PMU, are also available through Broadcom technical support. Anaren® March 2015 • ANN-20737x Page 12 Application Note ANN-20737x Security Security BCM20737 provides elaborate mechanisms for implementing security and authentication schemes using: • RSA (Public Key Cryptography) • X.509 (excluding parsing) • Hash functions: MD5, SHA-1, SHA-224, SHA-256, SHA-384, SHA-512 • Message authentication code: HMAC MD5, HMAC SHA-1 Note: Details on how to use this functionality via SDK are available in application notes on this topic. Support for NFC Tag Based Pairing BCM20737 provides support for "ease of pairing" and "secure key exchange" use cases using passive tags. Active tags can be used with the chip for OOB pairing. In a typical use case, the BCM20203 (NFC tag) can be used to provide "tap to pair" functionality for easy pairing. Note: Details on how to use this functionality via SDK are available in application notes on this topic. Bluetooth Smart Audio BCM20737 supports using the BLE link for audio streaming. This functionality can be used for audio applications in toys, wearable, and HID devices, as well as in hearing aids. Note: Details on how to use this functionality via SDK are available in application notes on this topic. Anaren® March 2015 • ANN-20737x Page 13 Application Note ANN-20737x ADC Port ADC Port The BCM20737 contains a 16-bit ADC (effective number of bits is 10). Additionally: • There are 9 analog input channels in the 32-pin package • The following GPIOs can be used as ADC inputs: – P0 – P1 – P8/P33 (select only one) – P11 – P12 – P13/P28 (select only one) – P14/P38 (select only one) – P15 – P32 • The conversion time is 10 μs. • There is a built-in reference with supply- or bandgap-based reference modes. • The maximum conversion rate is 187 kHz. • There is a rail-to-rail input swing. The ADC consists of an analog ADC core that performs the actual analog-to-digital conversion and digital hardware that processes the output of the ADC core into valid ADC output samples. Directed by the firmware, the digital hardware also controls the input multiplexers that select the ADC input signal Vinp and the ADC reference signals Vref. The ADC input range is selectable by firmware control: • When an input range of 0–3.6V is used, the input impedance is 3 MΩ. • When an input range of 0–2.4V is used, the input impedance is 1.84 MΩ. • When an input range of 0–1.2V is used, the input impedance is 680 kΩ. ADC modes are defined in Table 1. Table 1: ADC Modes Mode ENOB (Typical) Maximum Sampling Rate (kHz) Latencya (μs) 0 13 5.859 171 1 12.6 11.7 85 2 12 46.875 21 3 11.5 93.75 11 4 10 187 5 a. Settling time after switching channels. Anaren® March 2015 • ANN-20737x Page 14 Application Note ANN-20737x Serial Peripheral Interface Serial Peripheral Interface The BCM20737 has two independent SPI interfaces. One is a master-only interface and the other can be either a master or a slave. Each interface has a 16-byte transmit buffer and a 16-byte receive buffer. To support more flexibility for user applications, the BCM20737 has optional I/O ports that can be configured individually and separately for each functional pin as shown in Table 2, Table 3, and Table 4. The BCM20737 acts as an SPI master device that supports 1.8V or 3.3V SPI slaves. The BCM20737 can also act as an SPI slave device that supports a 1.8V or 3.3V SPI master. Table 2: BCM20737 First SPI Set (Master Mode) Pin Name SPI_CLK SPI_MOSI SPI_MISOa SPI_CSb Configured Pin Name SCL SDA – – – – – – – – P32 P33c a. SPIFFY1 MISO should always be P32. Boot ROM does not configure any others. b. Any GPIO can be used as SPI_CS when SPI 1 is in master mode, and when the SPI slave is not a serial flash. c. P33 is always SPI_CS when a serial flash is used for non-volatile storage. Table 3: BCM20737 Second SPI Set (Master Mode) Pin Name SPI_CLK SPI_MOSI SPI_MISO SPI_CSa Configured Pin Name P3 P0 P1 – – P4 P25 – P24 P27 – – a. Any GPIO can be used as SPI_CS when SPI is in master mode. Table 4: BCM20737 Second SPI Set (Slave Mode) Pin Name SPI_CLK SPI_MOSI SPI_MISO SPI_CS Configured Pin Name P3 P0 P1 P2 – P27 – – Anaren® March 2015 • ANN-20737x P24 P33 P25 P26 – – – P32 Page 15 Application Note ANN-20737x Microprocessor Unit Microprocessor Unit The BCM20737 microprocessor unit (µPU) executes software from the link control (LC) layer up to the application layer components. The microprocessor is based on an ARM® Cortex™ M3, 32-bit RISC processor with embedded ICE-RT debug and JTAG interface units. The µPU has 320 KB of ROM for program storage and boot-up, 60 KB of RAM for scratch-pad data, and patch RAM code. The SoC has a total storage of 380 KB, including RAM and ROM. The internal boot ROM provides power-on reset flexibility, which enables the same device to be used in different HID applications with an external serial EEPROM or with an external serial flash memory. At power-up, the lowest layer of the protocol stack is executed from the internal ROM memory. External patches may be applied to the ROM-based firmware to provide flexibility for bug fixes and feature additions. The device can also support the integration of user applications. EEPROM Interface The BCM20737 provides a Broadcom Serial Control (BSC) master interface. BSC is programmed by the CPU to generate four types of bus transfers: read-only, write-only, combined read/write, and combined write/read. BSC supports both low-speed and fast mode devices. BSC is compatible with an NXP® I2C slave device, except that master arbitration (multiple I2C masters contending for the bus) is not supported. The EEPROM can contain customer application configuration information including application code, configuration data, patches, pairing information, BD_ADDR, baud rate, SDP service record, and file system information used for code. Native support for the Microchip® 24LC128, Microchip 24AA128, and ST Micro® M24128-BR is included. Serial Flash Interface The BCM20737 includes an SPI master controller that can be used to access serial flash memory. The SPI master contains an AHB slave interface, transmit and receive FIFOs, and the SPI core PHY logic. Devices natively supported include the following: • Atmel® AT25BCM512B • MXIC® MX25V512ZUI-20G Other (larger) serial flash parts from MXIC, Numonyx, and Adesto with commands identical to these parts here are also supported. Anaren® March 2015 • ANN-20737x Page 16 Application Note ANN-20737x Microprocessor Unit Internal Reset Figure 4: Internal Reset Timing VDDO POR delay ~ 2 ms VDDO VDDO POR threshold VDDO POR VDDC POR threshold VDDC VDDC POR delay ~ 2 ms VDDC POR Crystal warm-up delay: ~ 5 ms Baseband Reset Start reading EEPROM and firmware boot Crystal Enable External Reset The BCM20737 has an integrated power-on reset circuit that completely resets all circuits to a known power-on state. An external active low reset signal, RESET_N, can be used to put the BCM20737 in the reset state. The RESET_N pin has an internal pull-up resistor and, in most applications, it does not require that anything be connected to it. RESET_N should only be released after the VDDO supply voltage level has been stabilized. Figure 5: External Reset Timing Pulse width >20 µs RESET_N Crystal warm-up delay: ~ 5 ms Baseband Reset Start reading EEPROM and firmware boot Crystal Enable Anaren® March 2015 • ANN-20737x Page 17 Application Note ANN-20737x Integrated Radio Transceiver Integrated Radio Transceiver The BCM20737 has an integrated radio transceiver that is optimized for 2.4 GHz Bluetooth wireless systems. It has been designed to provide low power, low cost, and robust communications for applications operating in the globally available 2.4 GHz unlicensed ISM band. It is fully compliant with Bluetooth Radio Specification 4.0 and meets or exceeds the requirements to provide the highest communication link quality of service. Transmitter Path The BCM20737 features a fully integrated transmitter. The baseband transmit data is GFSK modulated in the 2.4 GHz ISM band. Digital Modulator The digital modulator performs the data modulation and filtering required for the GFSK signal. The fully digital modulator minimizes any frequency drift or anomalies in the modulation characteristics of the transmitted signal. Power Amplifier The BCM20737 has an integrated power amplifier (PA) that can transmit up to +4 dBm for class 2 operation. Receiver Path The receiver path uses a low IF scheme to downconvert the received signal for demodulation in the digital demodulator and bit synchronizer. The receiver path provides a high degree of linearity, an extended dynamic range, and high-order, on-chip channel filtering to ensure reliable operation in the noisy 2.4 GHz ISM band. The front-end topology, which has built-in out-of-band attenuation, enables the BCM20737 to be used in most applications without off-chip filtering. Digital Demodulator and Bit Synchronizer The digital demodulator and bit synchronizer take the low-IF received signal and perform an optimal frequency tracking and bit synchronization algorithm. Receiver Signal Strength Indicator The radio portion of the BCM20737 provides a receiver signal strength indicator (RSSI) to the baseband. This enables the controller to take part in a Bluetooth power-controlled link by providing a metric of its own receiver signal strength to determine whether the transmitter should increase or decrease its output power. Local Oscillator The local oscillator (LO) provides fast frequency hopping (1600 hops/second) across the 79 maximum available channels. The BCM20737 uses an internal loop filter. Anaren® March 2015 • ANN-20737x Page 18 Peripheral Transport Unit Application Note ANN-20737x Calibration The BCM20737 radio transceiver features a self-contained automated calibration scheme. No user interaction is required during normal operation or during manufacturing to provide optimal performance. Calibration compensates for lter, matching network, and ampli er gain and phase characteristics to yield radio performance within 2% of what is optimal. Calibration takes process and temperature variations into account, and it takes place transparently during normal operation and hop sett ing times. Internal LDO Regulator The BCM20737 has an integrated 1.2V LDO regulator that provides power to the digital and RF circuits. The 1.2V LDO regulator operates from a 1.425V to 3.63V input supply with a 30 mA maximum load current. Note: Always place the decoupling capacitors near the pins as closely together as possible. Peripheral Transport Unit Broadcom Serial Communications Interface The BCM20737 provides a 2-pin master BSC interface, which can be used to retrieve con guration information from an external EEPROM or to communicate with peripherals such as track-ball or touch-pad modules, and 2 motion tracking ICs used in mouse devices. The BSC interface is compatible with I C slave devices. The BSC does not support multimaster capability or exible wait-state insertion by either master or slave devices. The following transfer clock rates are supported by the BSC: • 100 kHz • 400 kHz • 800 kHz (not a standard I • 1 MHz (Compatibility with high-speed I 2 C-compatible speed.) 2C-compatible devices is not guaranteed.) The following transfer types are supported by the BSC: • Read (Up to 16 bytes can be read.) • Write (Up to 16 bytes can be written.) • Read-then-Write (Up to 16 bytes can be read and up to 16 bytes can be written.) • Write-then-Read (Up to 16 bytes can be written and up to 16 bytes can be read.) Hardware controls the transfers, requiring minimal rmware setup and supervision. The clock pin (SCL) and data pin (SDA) are both open-drain I/O pins. Pull-up resistors external to the BCM20737 are required on both the SCL and SDA pins for proper operation. Anaren® March 2015 • ANN-20737x Page 19 Application Note ANN-20737x Clock Frequencies UART Interface The UART is a standard 2-wire interface (RX and TX) and has adjustable baud rates from 9600 bps to 1.5 kbps. The baud rate can be selected via a vendor-specific UART HCI command. The interface supports the Bluetooth 3.0 UART HCI (H4) specification. The default baud rate for H4 is 115.2 kbaud. Both high and low baud rates can be supported by running the UART clock at 24 MHz. The BCM20737 UART operates correctly with the host UART as long as the combined baud rate error of the two devices is within ±5%. Clock Frequencies The BCM20737 is set with crystal frequency of 24 MHz. Crystal Oscillator The crystal oscillator requires a crystal with an accuracy of ±20 ppm as defined by the Bluetooth specification. Two external load capacitors in the range of 5 pF to 30 pF (see Figure 6) are required to work with the crystal oscillator. The selection of the load capacitors is crystal-dependent. Table 5 shows the recommended crystal specifications. Figure 6: Recommended Oscillator Configuration—12 pF Load Crystal 22 pF XIN Crystal XOUT 20 pF Anaren® March 2015 • ANN-20737x Page 20 Application Note ANN-20737x Clock Frequencies Table 5 shows the recommended crystal specifica ons. Table 5: Reference Crystal Electrical Speci cations Parameter Condition s Minimum Typical Nominal frequency – – 24.000 Oscillation mode – Fundamental @25°C – ±10 – ppm – ±10 – ppm – – 50 – 12 – Frequency tolerance Tolerance stability over temp Equivalent series resistance @0°C to +70°C – Load capacitance – Maximum – Unit MHz – pF Operating temperature range – 0 – +70 °C Storage temperature range – –40 – +125 °C W Drive level – – – 200 Aging – – – ±10 ppm/year Shunt capacitance – – – 2 pF Peripheral Block The peripheral blocks of the BCM20737 all run from a single 128 kHz low-power RCoscillator. The oscillator can be turned on at the request of any of the peripherals. If the peripheral is not enabled, it shall not assert its clock request line. The keyboard scanner is a special case, in that it may drop its clock request line even when enabled, and then reassert the clock request line if a keypress is detected. 32 kHz Crystal Oscillator Figure 7 shows the 32 kHz crystal (XTAL) oscillator with external components and Table 6 lists the oscillator’s characteris cs. It is a standard Pierce oscillator using a comparator with hysteresis on the output to create a single-ended digital output. The hysteresis was added to eliminate any cha er when the input is around the threshold of the comparator and is ~100 mV. This circuit can be operated with a 32 kHz or 32.768 kHz crystal oscillator or be driven with a clock input at similar frequency. The default component values are: R1 = 10 MΩ, C1 = C2 = ~10 pF. The values of C1 and C2 are used to fine-tune the oscillator. Figure 7: 32 kHz Oscillator Block Diagram C2 R1 32.768 kHz XTAL C1 Anaren® March 2015 • ANN-20737x Page 21 Application Note ANN-20737x GPIO Port Table 6: XTAL Oscillator Characteristics Parameter Symbol Conditions Minimum Typical Maximum Unit Output frequency Foscout – – 3 2.768 – k Hz Frequency tolerance – Crystal dependent – 100 – ppm Start-up time T startup – – – 5 00 ms For crystal selection 0.5 – – XTAL drive level P drv W XTAL series resistance Rseries For crystal selection – – 70 kΩ XTAL shunt capacitance Cshunt For crystal selection – – 1.3 pF GPIO Port The BCM20737 has 14 general-purpose I/Os (GPIOs) in the 32-pin package. All GPIOssupport programmable pull-up and pull-down resistors,and all support a 2 mA drive strength except P26, P27, and P28,which provide a 16 mA drive strength at 3.3V supply. The following GPIOs are available: • P0–P4 • P8/P33 (Dual bonded, only one of two is available.) • P11/P27 (Dual bonded, only one of two is available.) • P12/P26 (Dual bonded, only one of two is available.) • P13/P28 (Dual bonded, only one of two is available.) • P14/P38 (Dual bonded, only one of two is available.) • P15 • P24 • P25 • P32 For a description of all GPIOs, see Anaren® March 2015 • ANN-20737x Table 8: “GPIO Pin Descriptions,” on page 27 . Page 22 Application Note ANN-20737x PWM PWM The BCM20737 has four internal PWM channels. The PWM module is described as follows: • PWM0–3 • The following GPIOs can be mapped as PWMs: • P26 • P27 • P14/P28 (Dual bonded, only one of two is available.) • P13 • Each of the PWM channels, PWM0–3, contains the following registers: – 10-bit initial value register (read/write) – 10-bit toggle register (read/write) – 10-bit PWM counter value register (read) • The PWM configuration register is shared among PWM0–3 (read/write). This 12-bit register is used: – To configure each PWM channel. – To select the clock of each PWM channel. – To change the phase of each PWM channel. Figure 8 shows the structure of one PWM channel. Figure 8: PWM Channel Block Diagram pwm_cfg_adr register pwm#_init_val_adr register pwm#_togg_val_adr register enable clk_sel o_flip 10 10 pwm#_cntr_adr 10 cntr value is CM3 readable pwm_out Example: PWM cntr w/ pwm#_init_val = 0 (dashed line) PWM cntr w/ pwm#_init_val = x (solid line) 10'H3FF pwm_togg_val_adr 10'Hx 10'H000 pwm_out Anaren® March 2015 • ANN-20737x Page 23 Application Note ANN-20737x Power Management Unit Power Management Unit The Power Management Unit (PMU) provides power management features that can be invoked by software through power management registers or packet-handling in the baseband core. RF Power Management The BBC generates power-down control signals for the transmit path, receive path, PLL, and power amplifier to the 2.4 GHz transceiver, which then processes the power-down functions accordingly. Host Controller Power Management Power is automatically managed by the firmware based on input device activity. As a power-saving task, the firmware controls the disabling of the on-chip regulator when in deep sleep mode. BBC Power Management There are several low-power operations for the BBC: • Physical layer packet handling turns RF on and off dynamically within packet TX and RX. • Bluetooth-specified low-power connection mode. While in these low-power connection modes, the BCM20737 runs on the Low Power Oscillator and wakes up after a predefined time period. The BCM20737 automatically adjusts its power dissipation based on user activity. The following power modes are supported: • Active mode • Idle mode • Sleep mode • HIDOFF (Deep Sleep) mode • Timed Deep Sleep mode The BCM20737 transitions to the next lower state after a programmable period of user inactivity. Busy mode is immediately entered when user activity resumes. In HIDOFF (Deep Sleep) mode, the BCM20737 baseband and core are powered off by disabling power to LDOOUT. The VDDO domain remains powered up and will turn the remainder of the chip on when it detects user events. This mode minimizes chip power consumption and is intended for long periods of inactivity. Anaren® March 2015 • ANN-20737x Page 24 Application Note ANN-20737x Pin Assignments S e c t i o n 2 : P i n A s s i g nm e n ts Pin Descriptions Table 7: Pin Descriptions Pin Number Pin Name I/O Power Domain Description RF I/O VDD_RF Radio I/O 6 RF antenna port RF Power Supplies 4 VDDIF I VDD_RF IFPLL power supply 5 VDDFE I VDD_RF RF front-end supply 7 VDDVCO I VDD_RF VCO, LOGEN supply 8 VDDPLL I VDD_RF RFPLL and crystal oscillator supply Power Supplies 11 VDDC I VDDC Baseband core supply 28 VDDO I VDDO I/O pad and core supply 14 VDDM I VDDM I/O pad supply Clock Generator and Crystal Interface 9 XTALI I VDD_RF Crystal oscillator input. See page 20 for options. 10 XTALO O VDD_RF Crystal oscillator output. 1 XTALI32K I VDDO Low-power oscillator (LPO) input is used. Alternative Function: • P11 • P27 32 XTALO32K O VDDO Low-power oscillator (LPO) output. Alternative Function: • P12 • P26 18 RESET_N I/O PU VDDO Active-low system reset with open-drain output & internal pull-up resistor 17 TMC I VDDO Test mode control High: test mode Connect to GND if not used. UART_RXD I VDDM UART serial input – Serial data input for the HCI UART interface. Leave unconnected if not used. Alternative function: • GPIO3 Core UART 12 Anaren® March 2015 • ANN-20737x Page 25 Application Note ANN-20737x Pin Descriptions Table 7: Pin Descriptions (Cont.) Pin Number Pin Name I/O Power Domain Description 13 UART_TXD O, PU VDDM UART serial output – Serial data output for the HCI UART interface. Leave unconnected if not used. Alternative Function: • GPIO2 SDA I/O, PU VDDM BSC 15 16 SCL I/O, PU VDDM Data signal for an external I2C device. Alternative function: • SPI_1: MOSI (master only) • GPIO0 • CTS • GPIO1 • RTS Clock signal for an external I2C device. Alternative function: • SPI_1: SPI_CLK (master only) LDO Regulator Power Supplies 2 LDOIN I N/A Battery input supply for the LDO 3 LDOOUT O N/A LDO output Anaren® March 2015 • ANN-20737x Page 26 Application Note ANN-20737x Pin Descriptions Table 8: GPIO Pin Descriptionsa After POR State Pin Number Pin Name Default Direction 19 P0 Input Input floating VDDO • • • • • • • GPIO: P0 A/D converter input Peripheral UART: puart_tx SPI_2: MOSI (master and slave) IR_RX 60Hz_main Not available during TMC=1 20 P1 Input Input floating VDDO • • • • • GPIO: P1 A/D converter input Peripheral UART: puart_rts SPI_2: MISO (master and slave) IR_TX 21 P3 Input Input floating VDDO • • • GPIO: P3 Peripheral UART: puart_cts SPI_2: SPI_CLK (master and slave) 22 P2 Input Input floating VDDO • • • • GPIO: P2 Peripheral UART: puart_rx SPI_2: SPI_CS (slave only) SPI_2: SPI_MOSI (master only) 23 P4 Input Input floating VDDO • • • • GPIO: P4 Peripheral UART: puart_rx SPI_2: MOSI (master and slave) IR_TX 24 P8 Input Input floating VDDO • • • GPIO: P8 A/D converter input External T/R switch control: ~tx_pd P33 Input Input floating VDDO • • • • • GPIO: P33 A/D converter input SPI_2: MOSI (slave only) Auxiliary clock output: ACLK1 Peripheral UART: puart_rx P11 Input Input floating VDDO • • • GPIO: P11 A/D converter input XTALI32K P27 PWM1 Input Input floating VDDO • GPIO: P27 • SPI_2: MOSI (master and slave) Current: 16 mA 1 Anaren® March 2015 • ANN-20737x Power Domain Alternate Function Description Page 27 Application Note ANN-20737x Pin Descriptions Table 8: GPIO Pin Descriptionsa (Cont.) After POR State Pin Number Pin Name Default Direction 32 P12 Input Input floating VDDO • • • P26 PWM0 Input Input floating VDDO • GPIO: P26 • SPI_2: SPI_CS (slave only) • SPI_1: MISO (master only) Current: 16 mA P13 PWM3 Input Input floating VDDO • • P28 PWM2 Input Input floating VDDO • GPIO: P28 • A/D converter input • LED1 • IR_TX Current: 16 mA P14 PWM2 Input Input floating VDDO • • GPIO: P14 A/D converter input P38 Input Input floating VDDO • • • • GPIO: P38 A/D converter input SPI_2: MOSI (master and slave) IR_TX 31 P15 Input Input floating VDDO • • • • GPIO: P15 A/D converter input IR_RX 60 Hz_main 27 P24 Input Input floating VDDO • • • • GPIO: P24 SPI_2: SPI_CLK (master and slave) SPI_1: MISO (master only) Peripheral UART: puart_tx 26 P25 Input Input floating VDDO • • • GPIO: P25 SPI_2: MISO (master and slave) Peripheral UART: puart_rx 29 30 Anaren® March 2015 • ANN-20737x Power Domain Alternate Function Description GPIO: P12 A/D converter input XTALO32K GPIO: P13 A/D converter input Page 28 Application Note ANN-20737x Pin Descriptions Table 8: GPIO Pin Descriptionsa (Cont.) Pin Number Pin Name Default Direction 25 Input P32 After POR State Input floating Power Domain VDDO Alternate Function Description • • • • • • GPIO: P32 A/D converter input SPI_2: SPI_CS (slave only) SPI_1: MISO (master only) Auxiliary clock output: ACLK0 Peripheral UART: puart_tx a. During power-on reset, all inputs are disabled. Anaren® March 2015 • ANN-20737x Page 29 Application Note ANN-20737x Ball Maps Ball Maps P12/P26/XO32 P15 P14/P38 P13/P28 VDDO P24 P25 P32 Figure 9: 32-pin QFN Ball Map 32 31 30 29 28 27 26 25 LDO_OUT 3 22 P2 VDDIF 4 21 P3 VDDFE 5 20 P1 RF 6 19 P0 VDDVCO 7 18 RST_N VDDPLL 8 17 TMC Anaren® March 2015 • ANN-20737x 9 10 11 12 13 14 15 16 SCL P4 SDA 23 VDDM 2 UART_TXD LDO_IN UART_RXD P8/P33 VDDC 24 XTALO 1 XTALI P11/P27/XIN32 Page 30 Application Note ANN-20737x Specifications S ecti o n 3 : Sp e c i f i c at i o n s Electrical Characteristics Table 9 shows the maximum electrical rating for voltages referenced to VDD pin. Table 9: Maximum Electrical Rating Rating Symbol Value Unit DC supply voltage for RF domain DC supply voltage for core domain DC supply voltage for VDDM domain (UART/I2C) DC supply voltage for VDDO domain DC supply voltage for VR3V DC supply voltage for VDDFE Voltage on input or output pin Operating ambient temperature range Storage temperature range – – – – – – – Topr Tstg 1.4 1.4 3.8 3.8 3.8 1.4 VSS – 0.3 to VDD + 0.3 –30 to +85 –40 to +125 V V V V V V V °C °C Table 10 shows the power supply characteristics for the range TJ = 0 to 125°C. Table 10: Power Supply Parameter Minimuma Typical Maximuma Unit DC supply voltage for RF DC supply voltage for Core DC supply voltage for VDDM (UART/I2C) DC supply voltage for VDDO DC supply voltage for LDOIN DC supply voltage for VDDFE 1.14 1.14 1.62 1.62 1.425 1.14 1.2 1.2 – – – 1.2b 1.26 1.26 3.63 3.63 3.63 1.26 V V V V V V a. Overall performance degrades beyond minimum and maximum supply voltages. b. 1.2V for Class 2 output with internal VREG. Anaren® March 2015 • ANN-20737x Page 31 Application Note ANN-20737x Electrical Characteristics Table 11 shows the digital level characteristics for (VSS = 0V). Table 11: LDO Regulator Electrical Specifications Parameter Conditions Min Typ Max Unit Input voltage range – 1.425 – 3.63 V Default output voltage – – 1.2 – V 1.4 V Output voltage Range 0.8 – Step size – 40 or 80 – mV Accuracy at any step –5 – +5 % Load current – – – 30 mA Line regulation Vin from 1.425 to 3.63V, Iload = 30 mA –0.2 – 0.2 Iload from 1 µA to 30 mA, Vin = 3.3V, Bonding R = 0.3Ω – 0.1 0.2 %VO/mA Quiescent current No load @Vin = 3.3V *Current limit enabled – 6 – µA Power-down current Vin = 3.3V, worst@70°C – 5 200 nA Load regulation %VO/V Table 12 shows the specifications for the ADC characteristics. Table 12: ADC Specifications Parameter Symbol Conditions Min Typ Max Unit Number of Input channels – – – 9 – – – – – 133.33 kch/s Vinp – 0 – 3.63 V Reference settling time – Changing refsel 7.5 – – ˜s Input resistance Rinp Effective, single ended – 500 – k˜ – – – 5 pF fC – 5.859 – 187 kHz – 5.35 – 170.7 ˜s R – – 16 – bits Effective number of bits – In specified performance range – – See Table 1 on page 14 Absolute voltage measurement error – Using on-chip ADC firmware driver – ±2 – % Current I – – 1 mA Power P Iavdd1p2 + Iavdd3p3 – – 1.5 – mW Leakage current Ileakage T = 25°C – – 100 nA – – – 200 µs INL In guaranteed performance range –1 – 1 Channel switching rate fch Input signal range Input capacitance Conversion rate Conversion time Resolution Power-up time Integral nonlinearity3 Cinp TC Tpowerup Anaren® March 2015 • ANN-20737x LSBa Page 32 Application Note ANN-20737x Electrical Characteristics Table 12: ADC Specifications (Cont.) Parameter Symbol Conditions Min Typ Max Unit Differential nonlinearitya DNL In guaranteed performance range –1 – 1 LSBa a. LSBs are expressed at the 10-bit level. Table 13 shows the specifications for the digital voltage levels. Table 13: Digital Levelsa Characteristics Symbol Min Typ Max Unit Input low voltage VIL – – 0.4 V VIH 0.75 × VDDO – – V Input low voltage (VDDO = 1.62V) VIL – – 0.4 V Input high voltage (VDDO = 1.62V) VIH 1.2 – – V Output low voltage VOL – – 0.4 V Output high voltage VOH VDDO – 0.4 – – V Input capacitance (VDDMEM domain) CIN – – pF Input high voltage b b 0.12 a. This table is also applicable to VDDMEM domain. b. At the specified drive current for the pad. Table 14 shows the specifications for current consumption. Table 14: Current Consumption a Operational Mode Conditions Receive Typ Max Unit Receiver and baseband are both operating, 100% 9.8 ON. 10.0 mA Transmit Transmitter and baseband are both operating, 100% ON. 9.1 9.3 mA Sleep Internal LPO is in use. 12.0 13.0 μA – 0.65 – a. Currents measured between power terminals (Vdd) using 90% efficient DC-DC converter at 3V. Anaren® March 2015 • ANN-20737x Page 33 BCM20737 Data Sheet RF Specifications RF Specifications Table 15: Receiver RF Specifications Parameter Mode and Conditions Min Typ Max Unit Frequency range – 2402 – 2480 MHz RX sensitivity (standard) 0.1%BER, 1 Mbps – TBD – dBm – TBD – dBm – –16 – – dBm – –10 – – dBm Receiver Section a RX sensitivity (low current) Input IP3 Maximum input Interference Performancea,b C/I cochannel 0.1%BER – – 21 dB C/I 1 MHz adjacent channel 0.1%BER – – 15 dB C/I 2 MHz adjacent channel 0.1%BER – – –17 dB C/I 3 MHz adjacent channel 0.1%BER – – –27 dB C/I image channel 0.1%BER – – –9.0 dB C/I 1 MHz adjacent to image channel 0.1%BER – – –15 dB Out-of-Band Blocking Performance (CW)a,b 30 MHz to 2000 MHz 0.1%BERc – –30.0 – dBm 2003 MHz to 2399 MHz 0.1%BERd – –35 – dBm 2484 MHz to 2997 MHz 0.1%BERd – –35 – dBm 3000 MHz to 12.75 GHz 0.1%BERe – –30.0 – dBm 30 MHz to 1 GHz – – – –57.0 dBm 1 GHz to 12.75 GHz – – – –55.0 dBm Spurious Emissions a. b. c. d. e. 30.8% PER. Desired signal is 3 dB above the reference sensitivity level (defined as –70 dBm). Measurement resolution is 10 MHz. Measurement resolution is 3 MHz. Measurement resolution is 25 MHz. Table 16: Transmitter RF Specifications Parameter Minimum Typical Maximum Unit Frequency range 2402 – 2480 MHz Output power adjustment range –20 – 4 dBm Default output power – 4.0 – dBm Output power variation – 2.0 – dB Transmitter Section Adjacent Channel Power Anaren® Feb 25, 2015 • 20737-DS100-R Page 34 Application Note ANN-20737x RF Specifications Table 16: Transmitter RF Specifications (Cont.) Parameter Minimum Typical Maximum Unit |M – N| = 2 – – –20 dBm |M – N| ˜ ˜3 – – –30 dBm 30 MHz to 1 GHz – – –36.0 dBm 1 GHz to 12.75 GHz – – –30.0 dBm 1.8 GHz to 1.9 GHz – – –47.0 dBm 5.15 GHz to 5.3 GHz – – –47.0 dBm – – ±150 kHz Frequency drift – – ±50 kHz Drift rate – – 20 kHz/50 µs Average deviation in payload (sequence used is 00001111) 225 – 275 kHz Maximum deviation in payload (sequence used is 10101010) 185 – – kHz Channel spacing – 2 – MHz Out-of-Band Spurious Emission LO Performance Initial carrier frequency tolerance Frequency Drift Frequency Deviation Anaren® March 2015 • ANN-20737x Page 35 Application Note ANN-20737x Timing and AC Characteristics Timing and AC Characteristics In this section, use the numbers listed in the Reference column of each table to interpret the following timing diagrams. UART Timing Table 17: UART Timing Specifications Reference Characteristics Min Max Unit 1 Delay time, UART_CTS_N low to UART_TXD valid – 24 Baud out cycles 2 Setup time, UART_CTS_N high before midpoint of stop bit – 10 ns 3 Delay time, midpoint of stop bit to UART_RTS_N high – 2 Baud out cycles Figure 10: UART Timing Anaren® March 2015 • ANN-20737x Page 36 Application Note ANN-20737x Timing and AC Characteristics SPI Timing The SPI interface supports clock speeds up to 12 MHz with VDDIO ≥ 2.2V. The supported clock speed is 6 MHz when 2.2V > VDDIO ≥ 1.62V. Figure 11 and Figure 12 show the timing requirements when operating in SPI Mode 0 and 2, and SPI Mode 1 and 3, respectively. Table 18: SPI Interface Timing Specifications Reference Characteristics Min Typ Max 1 Time from CSN asserted to first clock edge 1 SCK 100 ∞ 2 Master setup time – ½ SCK – 3 Master hold time ½ SCK – – 4 Slave setup time – ½ SCK – 5 Slave hold time ½ SCK – – 6 Time from last clock edge to CSN deasserted 1 SCK 10 SCK 100 Figure 11: SPI Timing – Mode 0 and 2 6 SPI_CSN SPI_CLK (Mode 0) 1 SPI_CLK (Mode 2) 2 SPI_MOSI - First Bit 3 Second Bit 4 SPI_MISO Not Driven First Bit Anaren® March 2015 • ANN-20737x Second Bit Last bit - Last bit Not Driven 5 Page 37 Application Note ANN-20737x Timing and AC Characteristics Figure 12: SPI Timing – Mode 1 and 3 6 SPI_CSN SPI_CLK (Mode 1) 1 SPI_CLK (Mode 3) 2 SPI_MOSI - Invalid bit 3 First bit 4 SPI_MISO Not Driven Invalid bit Anaren® March 2015 • ANN-20737x First bit Last bit - Last bit Not Driven 5 Page 38 Application Note ANN-20737x Timing and AC Characteristics BSC Interface Timing Table 19: BSC Interface Timing Specifications Reference Characteristics Min Max Unit 1 Clock frequency – 100 kHz 400 800 1000 2 START condition setup time 650 – ns 3 START condition hold time 280 – ns 4 Clock low time 650 – ns 5 Clock high time 280 – ns 6 Data input hold time 0 – ns 7 Data input setup time 100 – ns 8 STOP condition setup time 280 – ns 9 Output valid from clock – 400 ns 10 Bus free time 650 – ns a b a. As a transmitter, 300 ns of delay is provided to bridge the undefined region of the falling edge of SCL to avoid unintended generation of START or STOP conditions. b. Time that the cbus must be free before a new transaction can start. Figure 13: BSC Interface Timing Diagram Anaren® March 2015 • ANN-20737x Page 39 Application Note ANN-20737x Mechanical Information S e c ti o n 4 : M e c h a n i c a l I n f o r m a t i o n Figure 14: 32-pin QFN Anaren® March 2015 • ANN-20737x Page 40 Application Note ANN-20737x Mechanical Information Tape Reel and Packaging Specifications Table 20: BCM20737 5 × 5 × 1 mm QFN, 32-Pin Tape Reel Specifications Parameter Value Quantity per reel 2500 pieces Reel diameter 13 inches Hub diameter 7 inches Tape width 12 mm Tape pitch 8 mm The top left corner of the BCM20737 package is situated near the sprocket holes, as shown in Figure 15. Figure 15: Pin 1 Orientation Pin 1: Top left corner of package toward sprocket holes Anaren® March 2015 • ANN-20737x Page 41 Application Note ANN-20737x Ordering Information Section 5: Ordering Information Table 21: Ordering Information Part Number Package Ambient Operating Temperature BCM20736A0KML2G 32-pin QFN –30°C to +85°C Anaren® March 2015 • ANN-20737x Page 42 Application Note ANN-20737x Acronyms and Abbreviations A p p e ndi x A: Acr o n y m s a n d A b b re v i a t i o ns The following list of acronyms and abbreviations may appear in this document. Term Description ADC analog-to-digital converter AFH adaptive frequency hopping AHB advanced high-performance bus APB advanced peripheral bus APU audio processing unit ARM7TDMI-S® Acorn RISC Machine 7 Thumb instruction, Debugger, Multiplier, Ice, Synthesizable BSC Broadcom Serial Control BTC Bluetooth controller COEX coexistence DFU device firmware update DMA direct memory access EBI external bus interface HCI Host Control Interface HV high voltage IDC initial digital calibration IF intermediate frequency IRQ interrupt request JTAG Joint Test Action Group LCU link control unit LDO low drop-out LHL lean high land LPO low power oscillator LV LogicVision™ MIA multiple interface agent PCM pulse code modulation PLL phase locked loop PMU power management unit POR power-on reset PWM pulse width modulation QD quadrature decoder RAM random access memory RF radio frequency ROM read-only memory RX/TX receive, transmit SPI serial peripheral interface Anaren® March 2015 • ANN-20737x Page 43 Application Note ANN-20737x Term Description SW software UART universal asynchronous receiver/transmitter UPI µ-processor interface WD watchdog Anaren® March 2015 • ANN-20737x Acronyms and Abbreviations Page 44 Application Note ANN-20737x Anaren® Inc. reserves the right to make changes without further notice to any of its products to improve reliability, function, or design. Information furnished herein by Anaren courtesy of Broadcom is believed to be accurate and reliable. However, Anaren does not assume any liability arising out of the application or use of this information, nor the application or use of any product or circuit described herein, neither does it convey any license under its patent rights nor the rights of others. Anaren Inc. 6635 Kirkville Road East Syracuse, NY 13057 March 2015 Phone: 315-432-8909 Fax: 315-432-9121 Web: www.anaren.com