Application Note Thermal Design for AWT6264R Rev 0 RELEVANT PRODUCTS • AWT6264R INTRODUCTION ANADIGICS’ AWT6264 Mobile WiMAX Power Amplifier is a high performance device that delivers exceptional linearity and efficiency at high output power levels. The device operates over the voltage supply range of +3.0 VDC to +4.2 VDC and its output power handling capabilities increase as the supply voltage is raised towards the high end of this range. At higher output powers, thermal considerations need to be taken into account in order to maintain high level of device reliability. This application note addresses thermal design considerations for the AWT6264 by first measuring the junction-to-case thermal characteristics of the device, and performing a case-to-ambient thermal analysis. Thermal design examples and guidelines are then offered for specific applications and circuit boards used. THERMAL CHARACTERIZATION AND ANALYSIS Thermal characterizations of the AWT6264 were performed on an open cavity device (no mold compound) that was mounted to an evaluation board. The AWT6264 is a class A/B amplifier, and thus requires RF drive in order for the output stage to be fully operational. The thermal characterizations were performed using a DC bias of 3.3 V and 4.2 V and a 2.5 GHz CW (no modulation) signal of various power levels, in order to produce total currents between 300 mA and 500 mA in steps of 50 mA. This procedure was used to validate the consistency of the measured junction-case thermal resistance. In performing the thermal scans, the evaluation board temperature was raised until the case temperature (Tc) of the device was 85 °C, as measured at the bottom of the package. The peak thermal rise was detected at the output amplification stage, and was therefore used to derive the junction-case thermal resistance (θJ-C) for the device. Tables 1a and 2a show the thermal analysis based on infrared images of the device-under-test operating at 3.3 V and at 4.2 V. The data presents the derivations of the junction-case thermal resistance (θJ-C) under multiple drive conditions Tables 1b and 2b show the derivation of the junction temperatures (TJ) when Tc is at 30 °C and 85.4 °C. The typical value for TJ as presented was calculated based on devices with a typical output stage gain of 10.5 dB, an average θ J-C of 14.6 °C/W for a 3.3 V supply and 16.8 °C/W for a 4.2 V supply, and an output power of +25 dBm (nominal). 06/2010 Thermal Design for AWT6264R Table 1a: Thermal Analysis of an AWT6264 Device Operating at 3.3 V under Multiple Drive Conditions Thermal characterizations under drive conditions #1 #2 #3 #4 #5 Unit [email protected] 299.5 350.9 400.5 450.3 501.7 mA Typicalcurrent(1stand2ndstage) ICC1+ICC2(pin1) 66.6 71.6 77.2 83.5 91.9 mA Typicalcurrentatoutputstage ICC3(pin12) 232.9 279.3 323.3 366.8 409.8 mA Typicaldcpowerdissipationat theoutputstage(P3) 0.769 0.922 1.067 1.210 1.352 W MeasuredTjatoutputstage 96.4 97.2 97.5 98.2 99.3 °C DC Analysis Tc 85.4 Temperaturerisemeasured °C 11.0 11.8 12.1 12.8 13.9 °C 19.70 21.74 23.37 24.96 26.22 dBm 0.093 0.149 0.217 0.313 0.419 W RF Analysis RFoutputpower(PRF-OUT) TypicalRFgainoftheoutputstage 10.5 RFinputpowerattheoutputstage(PRF-IN3) dB 9.20 11.24 12.87 14.46 15.72 dBm 8.32 13.30 19.36 27.93 37.32 mW 0.683 0.786 0.869 0.925 0.971 W 16.1 15.0 13.9 13.8 14.3 °C/W Junction-case Thermal Resistance Analysis Powerdissipation (P3+PRF-IN3-PRF-OUT) Junction-casethermalresistance( J-C) 2 Application Note - Rev 0 06/2010 Thermal Design for AWT6264R The example calculation below is for the AWT6264 device at 30 °C at 3.3 VDC, POUT = +25 dBm: Power Dissipated in the Output Stage: PDISS = PIN – POUT = (VCC*ICC3) + PRF-IN3 – PRF-OUT = (3.3 * 0.373) + (27.93*10-3) - 0.313 = 0.946 W Thermal rise of junction for the packaged device = PDISS * θJ-C = 0.946 * 14.64 = 13.85 °C Calculated Junction Temperature with case at 30 °C = 30 °C + 13.9 °C = 43.9 °C Table 1b: Derivation of AWT6264 Junction Temperatures with 3.3 V supply CaseTemperature 30 85.4 °C [email protected](typical) 453.6 450.3 mA [email protected](typical) 373.0 366.8 mA OutputStagePowerDissipation(typical) 0.946 0.925 W TemperatureRisecalculatedusingavg. J-Cof14.6°C/W 13.9 13.5 °C calculated Junction Temperature TJ 43.9 98.9 °C Application Note - Rev 0 06/2010 3 Thermal Design for AWT6264R Table 2a: Thermal Analysis of an AWT6264 Device Operating at 4.2 V under Multiple Drive Conditions Thermal characterizations under drive conditions #1 #2 #3 #4 #5 Unit [email protected] 300.5 352.6 400.6 453.4 503.6 mA Typicalcurrent(1stand2ndstage) ICC1+ICC2(pin1) 68.4 72.8 77.8 83.7 89.7 mA Typicalcurrentatoutputstage ICC3(pin12) 232.1 279.8 322.8 369.7 413.9 mA TypicalDCpowerdissipationat theoutputstage(P3) 0.975 1.175 1.356 1.553 1.738 W MeasuredTjatoutputstage 102.1 104.1 105.1 105.9 107.1 °C DC Analysis Tc 85.4 Temperaturerisemeasured °C 16.7 18.7 19.7 20.5 21.7 °C 19.37 21.15 22.63 24.04 25.45 dBm 0.087 0.130 0.183 0.254 0.351 W RF Analysis RFoutputpower(PRF-OUT) TypicalRFgainoftheoutputstage 10.5 dB 8.87 10.65 12.13 13.54 14.95 dBm 7.71 11.61 16.30 22.60 31.30 mW Powerdissipation(P3+PRF-IN3-PRF-OUT) 0.895 1.057 1.193 1.313 1.418 W Junction-casethermalresistance( J-C) 18.7 17.7 16.5 15.6 15.3 °C/W RFinputpowerattheoutputstage(PRF-IN3) Junction-case Thermal Resistance Analysis 4 Application Note - Rev 0 06/2010 Thermal Design for AWT6264R The example below is for the AWT6264 device operating at 30 °C at 4.2 VDC:, POUT = +24.7 dBm Power Dissipated in the Output Stage: PDISS = PIN – POUT = (VCC*ICC3) + PRF-IN3 – PRF-OUT = (4.2 * 0.4504) + (26.30*10-3) - 0.295 = 1.623 W Thermal rise of junction for the packaged device = PDISS * θJ-C = 1.623 * 16.8 = 27.27 °C Calculated Junction Temperature with case at 30°C = 30 + 27.3 °C = 57.3 °C Table 2b: Derivation of AWT6264 Junction Temperatures with 4.2 V supply CaseTemperature 30 85.4 °C [email protected](typical) 450.4 453.4 mA [email protected](typical) 373.1 369.7 mA OutputStagePowerDissipation(typical) 1.623 1.396 W TemperatureRisecalculatedusingavg. J-Cof16.8°C/Wat4.2V 27.3 23.5 °C calculated Junction Temperature TJ 57.3 108.9 °C PRINTED CIRCUIT BOARD DESIGN CONSIDERATIONS THERMAL In general, it is essential to keep the junction temperature of the device as low as possible to ensure long operating life. This can be accomplished by providing good thermal relief and adequate heat sinking. When mounted to a printed circuit board (PCB), the delta between the device case temperature and the ambient temperature will be determined by several factors; board thickness and number of layers, copper plating thickness, size and number of via holes placed beneath the device package ground area, the PCB layout, the method of attachment of the PCB to the heat sink as well as the design of the heat sink. For typical applications, it is recommended to maximize the number of vias placed below the package ground area. ANADIGICS’ standard AWT6264 evaluation board (EVB) is fabricated using double sided Rogers R3003 PCB material which has a dielectric constant of 3.38, dielectric thickness of 0.008” (0.2 mm), and copper thickness of 0.0021” (0.054 mm). Table 3 shows the calculation of the junction temperature (TJ) based on the standard AWT6264 EVB operating at 3.3 V and 4.2 V with output power levels of +25 dBm and +27 dBm, respectively. The data has been verified by using thermal imagery of the die in the laboratory. The AWT6264 is packaged in a 4.0 mm x 4.0 mm laminate-based module with a backside ground pad of an area of 2.36 mm x 3.80 mm (0.093” x 0.150”). This ground pad provides RF, DC, and thermal ground for the package. Using vias that are fabricated with 0.012” (0.3 mm) and 0.010” (0.25 mm) diameter drilled and finished-hole dimensions, respectively, it is possible to place approximately 24 vias of a 4 x 6 pattern beneath the ground pad area of the package. The thermal resistance of a single copper via (not solder filled) can be calculated as: θVIA = L / (σ* π(Ro2 – (Ro – Rpl)) For a via path length L = 0.254 mm, with drilled hole radius Ro = 0.15 mm, copper plating Rpl = 0.036 mm, and copper thermal conductivity σ = 0.39 W/mm °C, the thermal resistance of each via is 21.7°C/W. Therefore, the thermal resistance of the PCB ground Application Note - Rev 0 06/2010 5 Thermal Design for AWT6264R pattern (θPCB) beneath the device ground pad is approximately 0.904 °C/W for the 24 copper plated vias. For solder-filled vias, the thermal resistance of each via is 18.4 °C/W. Thus, the θPCB will be 0.767 °C/W for 24 solder-filled vias. Table 3: Calculation of Junction Temperatures at Different Drive and Signal Conditions AWT6264 Evaluation Board VCC = 3.3 V POUT = 25 dBm VCC = 4.2 V POUT = 27 dBm AmbientTemperature 30°C 85°C 30°C 85°C Totalcurrent(typical) 454 484 566 601 mA OutputStageCurrent(typical) 373 399 466 501 mA Deltabetweenthedevicecase temperatureandambient temperaturewhendeviceis mountedtoanevaluationboard. (Devicepoweredupwith100% dutycycle) 13.8 15.0 25.2 27.7 °C J-C(average) 14.6 14.6 16.8 16.8 °C/W OutputStagePDISS 0.943 1.029 1.501 1.648 W OutputStageTJ 43.8 100.0 55.2 112.7 °C ADDITIONAL MANUFACTURING SUGGESTIONS Refer to ANADIGICS’ AN-0003 for additional information on soldering and manufacturing. 6 Unit Application Note - Rev 0 06/2010 ANADIGICS, Inc. 141 Mount Bethel Road Warren, New Jersey 07059, U.S.A. Tel: +1 (908) 668-5000 Fax: +1 (908) 668-5132 URL: http://www.anadigics.com IMPORTANT NOTICE ANADIGICS, Inc. reserves the right to make changes to its products or to discontinue any product at any time without notice. The product specifications contained in Advanced Product Information sheets and Preliminary Data Sheets are subject to change prior to a product’s formal introduction. Information in Data Sheets have been carefully checked and are assumed to be reliable; however, ANADIGICS assumes no responsibilities for inaccuracies. ANADIGICS strongly urges customers to verify that the information they are using is current before placing orders. warning ANADIGICS products are not intended for use in life support appliances, devices or systems. Use of an ANADIGICS product in any such application without written consent is prohibited. 7 Application Note - Rev 0 06/2010