IDT74ALVCH16952 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS AND BUS-HOLD IDT74ALVCH16952 DESCRIPTION: FEATURES: This 16-bit registered transceiver is built using advanced dual metal CMOS technology. The ALVCH16952 contains two sets of D-type flip-flops for temporary storage of data flowing in either direction. This device can be used as two 8-bit transceivers or one 16-bit transceiver. Data on the A or B bus is stored in the registers on the low-to-high transition of the clock (CLKAB or CLKBA) input provided that the clock-enable (CLKENAB or CLKENBA) input is low. Taking the output-enable (OEAB or OEBA) input low accesses the data on either port. The ALVCH16952 has been designed with a ±24mA output driver. This driver is capable of driving a moderate to heavy load while maintaining speed performance. The ALVCH16952 has “bus-hold” which retains the inputs’ last state whenever the input bus goes to a high impedance. This prevents floating inputs and eliminates the need for pull-up/down resistors. • 0.5 MICRON CMOS Technology • Typical tSK(o) (Output Skew) < 250ps • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • VCC = 3.3V ± 0.3V, Normal Range • VCC = 2.7V to 3.6V, Extended Range • VCC = 2.5V ± 0.2V µ W typ. static) • CMOS power levels (0.4µ • Rail-to-Rail output swing for increased noise margin • Available in SSOP, TSSOP, and TVSOP packages DRIVE FEATURES: • High Output Drivers: ±24mA • Suitable for heavy loads APPLICATIONS: • 3.3V high speed systems • 3.3V and lower voltage computing systems FUNCTIONAL BLOCK DIAGRAM 1 CLKEN BA 1 C LKBA 1 OEAB 1 CLKEN AB 1 C LKAB 1 OEBA 54 2 CLKEN BA 55 2 C LKBA 1 2 OEAB 3 2 CLKEN AB 2 2 C LKAB 56 2 OEBA 31 30 28 26 27 29 C 1A 1 5 CE D C 52 2A 1 1B1 C CE D 15 CE D 42 2B1 C CE D TO SEVEN OTHER CH ANN ELS TO SEVEN OTHER CH ANNELS The IDT logo is a registered trademark of Integrated Device Technology, Inc. INDUSTRIAL TEMPERATURE RANGE MARCH 1999 1 ©1999 Integrated Device Technology, Inc. DSC-4227/1 IDT74ALVCH16952 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS ABSOLUTE MAXIMUM RATINGS(1) PIN CONFIGURATION Symbol Description VTERM(2) Max Unit Terminal Voltage with Respect to GND –0.5 to +4.6 V 1OEAB 1 56 1OEBA VTERM(3) Terminal Voltage with Respect to GND –0.5 to VCC+0.5 V 1CLKAB 2 55 1CLKBA TSTG Storage Temperature –65 to +150 °C 1CLKENAB 3 54 1CLKENBA IOUT DC Output Current –50 to +50 mA GND 4 53 GND IIK ±50 mA 1A1 5 52 1B1 Continuous Clamp Current, VI < 0 or VI > VCC 1A2 6 51 1B2 IOK Continuous Clamp Current, VO < 0 –50 mA VCC VCC ICC ISS Continuous Current through each VCC or GND ±100 mA 7 50 1A3 8 49 1B3 1A4 9 48 1B4 1A5 10 47 1B5 GND 11 46 GND 1A6 12 45 1B6 1A7 13 44 1B7 1A8 14 43 1B8 2A1 15 42 2B1 2A2 16 41 2B2 Pin Names 2A3 17 40 2B3 xOEAB GND 18 39 GND xOEBA B-to-A Output Enable Input (Active LOW) 2A4 19 38 2B4 xCLKENAB A-to-B Clock Enable Input (Active LOW) 2A5 20 37 2B5 xCLKENBA xCLKAB 2A6 21 36 2B6 VCC 22 35 VCC NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. VCC terminals. 3. All terminals except VCC. PIN DESCRIPTION xCLKBA 2A7 23 34 2B7 2A8 24 33 2B8 GND 25 32 GND 2CLKENAB 26 31 2CLKENBA 2CLKAB 27 30 2CLKBA 2OEAB 28 29 2OEBA B-to-A Clock Enable Input (Active LOW) A-to-B Clock Input B-to-A Clock Input xAx A-to-B Data Inputs or B-to-A 3-State Outputs(1) xBx B-to-A Data Inputs or A-to-B 3-State Outputs(1) FUNCTION TABLE(1,2) Inputs CAPACITANCE (TA = +25°C, F = 1.0MHz) Parameter(1) Description A-to-B Output Enable Input (Active LOW) NOTE: 1. These pins have "Bus-Hold". All other pins are standard inputs, outputs, or I/Os. SSOP/ TSSOP/ TVSOP TOP VIEW Symbol INDUSTRIAL TEMPERATURE RANGE Conditions Typ. Max. Unit CIN Input Capacitance VIN = 0V 5 7 pF COUT Output Capacitance VOUT = 0V 7 9 pF COUT I/O Port Capacitance VIN = 0V 7 9 pF Outputs xCLKENAB xCLKAB xOEAB xAx xBx H X L X B(3) X L L X B(3) L ↑ L L L L ↑ L H H X X H X Z NOTES: 1. A-to-B data flow is shown: B-to-A data flow is similar but uses xCLKENBA, xCLKBA, and xOEBA. 2. H = HIGH Voltage Level L = LOW Voltage Level X = Don’t Care Z = High Impedance ↑ = LOW-to-HIGH Transition 3. Level of B before the indicated steady-state input conditions were established. NOTE: 1. As applicable to the device type. 2 IDT74ALVCH16952 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Operating Condition: TA = –40°C to +85°C Symbol VIH VIL Min. Typ.(1) Max. Unit VCC = 2.3V to 2.7V 1.7 — — V VCC = 2.7V to 3.6V 2 — — VCC = 2.3V to 2.7V — — 0.7 VCC = 2.7V to 3.6V — — 0.8 Parameter Input HIGH Voltage Level Input LOW Voltage Level Test Conditions V IIH Input HIGH Current VCC = 3.6V VI = VCC — — ±5 µA IIL Input LOW Current VCC = 3.6V VI = GND — — ±5 µA IOZH High Impedance Output Current VCC = 3.6V VO = VCC — — ±10 µA IOZL (3-State Output pins) VO = GND — — ±10 VIK Clamp Diode Voltage VCC = 2.3V, IIN = –18mA — –0.7 –1.2 V VH ICCL ICCH ICCZ ∆ICC Input Hysteresis Quiescent Power Supply Current VCC = 3.3V VCC = 3.6V VIN = GND or VCC — — 100 0.1 — 40 mV µA Quiescent Power Supply Current Variation One input at VCC - 0.6V, other inputs at VCC or GND — — 750 µA Min. Typ.(2) Max. Unit – 75 — — µA VI = 0.8V 75 — — VI = 1.7V – 45 — — 45 — — — ±500 NOTE: 1. Typical values are at VCC = 3.3V, +25°C ambient. BUS-HOLD CHARACTERISTICS Symbol IBHH Parameter(1) Test Conditions Bus-Hold Input Sustain Current VCC = 3V Bus-Hold Input Sustain Current VCC = 2.3V Bus-Hold Input Overdrive Current VCC = 3.6V VI = 2V IBHL IBHH IBHL IBHHO VI = 0.7V VI = 0 to 3.6V IBHLO NOTES: 1. Pins with Bus-Hold are identified in the pin description. 2. Typical values are at VCC = 3.3V, +25°C ambient. 3 — µA µA IDT74ALVCH16952 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE OUTPUT DRIVE CHARACTERISTICS Symbol VOH Test Conditions(1) Parameter Output HIGH Voltage Min. Max. Unit VCC – 0.2 — V IOH = – 6mA 2 — IOH = – 12mA 1.7 — 2.2 — VCC = 2.3V to 3.6V IOH = – 0.1mA VCC = 2.3V VCC = 2.3V VCC = 2.7V VCC = 3V VOL Output LOW Voltage 2.4 — VCC = 3V IOH = – 24mA 2 — VCC = 2.3V to 3.6V IOL = 0.1mA — 0.2 VCC = 2.3V IOL = 6mA — 0.4 IOL = 12mA — 0.7 VCC = 2.7V IOL = 12mA — 0.4 VCC = 3V IOL = 24mA — 0.55 V NOTE: 1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range. TA = – 40°C to + 85°C. OPERATING CHARACTERISTICS, TA = 25°C Symbol Parameter CPD Power Dissipation Capacitance Outputs enabled CPD Power Dissipation Capacitance Outputs disabled VCC = 2.5V ± 0.2V VCC = 3.3V ± 0.3V Test Conditions Typical Typical Unit CL = 0pF, f = 10Mhz 53 71 pF 34 40 SWITCHING CHARACTERISTICS(1) VCC = 2.5V ± 0.2V Symbol Parameter Min. fMAX VCC = 2.7V Max. Min. VCC = 3.3V ± 0.3V Max. Min. Max. Unit 150 — 150 — 150 — MHz tPLH tPHL Propagation Delay CLK to xAx or xBx 1 4.1 — 4.6 1 3.9 ns tPZH tPZL Output Enable Time xOEBA to xAx or xOEAB to xBx 1 5.4 — 5.3 1 4.4 ns tPHZ tPLZ Output Disable Time xOEBA to xAx or xOEAB to xBx 1 5.3 — 4.4 1.1 4 ns tSU Setup Time, data before CLK 1.7 — 1.9 — 1.5 — ns tH Hold Time, data after CLK 0.6 — 0.6 — 0.8 — ns tSU Setup Time, CLKEN before CLK 1.2 — 1 — 1 — ns tH Hold Time, CLKEN after CLK 1.1 — 0.9 — 1.1 — ns tW Pulse Duration, CLKEN HIGH 3.3 — 3.3 — 3.3 — ns tW Pulse Duration, CLK HIGH or LOW 3.3 — 3.3 — 3.3 — ns Output Skew(2) — — — — — 500 ps tSK(o) NOTES: 1. See TEST CIRCUITS AND WAVEFORMS. TA = – 40°C to + 85°C. 2 Skew between any two outputs of the same package and switching in the same direction. 4 IDT74ALVCH16952 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE TEST CIRCUITS AND WAVEFORMS TEST CONDITIONS Symbol VCC(1)= 3.3V±0.3V VCC(1)= 2.7V VCC(2)= 2.5V±0.2V Unit VLOAD 6 6 2 x Vcc V VIH 2.7 2.7 Vcc V VT 1.5 1.5 Vcc / 2 V VLZ 300 300 150 mV VHZ 300 300 150 mV CL 50 50 30 pF 500Ω (1, 2) VIH VT 0V ALVC Link DISABLE ENABLE GND tPZL OUTPUT SWITCH NORMALLY CLOSED LOW tPZH OUTPUT SWITCH NORMALLY OPEN HIGH 500Ω CL ALVC Link Test Circuit for All Outputs tPHL CONTROL INPUT D.U.T. RT tPLH Propagation Delay VOUT Pulse Generator tPHL OPPOSITE PHASE INPUT TRANSITION Open VIN tPLH OUTPUT VLOAD VCC VIH VT 0V VOH VT VOL SAME PHASE INPUT TRANSITION tPLZ VLOAD/2 VT VIH VT 0V VLOAD/2 VLZ VOL tPHZ VOH VHZ 0V VT 0V ALVC Link DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. Enable and Disable Times NOTE: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. NOTES: 1. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns. 2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2ns; tR ≤ 2ns. DATA INPUT SWITCH POSITION Test Switch TIMING INPUT Open Drain Disable Low Enable Low VLOAD ASYNCHRONOUS CONTROL Disable High Enable High GND SYNCHRONOUS CONTROL All Other Tests Open INPUT OUTPUT 1 tPLH1 VIH VT 0V tREM tSU tH Set-up, Hold, and Release Times VOH VT VOL tSK (x) LOW-HIGH-LOW PULSE OUTPUT 2 VT tW VOH VT VOL tPLH2 tH ALVC Link tPHL1 tSK (x) tSU VIH VT 0V VIH VT 0V VIH VT 0V VIH VT 0V HIGH-LOW-HIGH PULSE VT ALVC Link tPHL2 Pulse Width tSK(x) = tPLH2 - tPLH1 or tPHL2 - tPHL1 ALVC Link Output Skew - tSK(X) NOTES: 1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs. 2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank. 5 IDT74ALVCH16952 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE ORDERING INFORMATION IDT ALVC X XX Bus-Hold Temp. Range XXX Family XX XXX Device Type Package CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054 PV PA PF Shrink Small Outline Package Thin Shrink Small Outline Package Thin Very Small Outline Package 952 16-Bit Registered Transceiver with 3-State Outputs 16 Double-Density, ±24mA H Bus-hold 74 – 40°C to +85°C for SALES: 800-345-7015 or 408-727-6116 fax: 408-492-8674 www.idt.com 6 for Tech Support: [email protected] (408) 654-6459