TECHNICAL DATA IN74HC164А 8-Bit Serial-Input/Parallel-Output Shift Register High-Performance Silicon-Gate CMOS The IN74HC164A is identical in pinout to the LS/ALS164. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. The IN74HC164A is an 8-bit, serial-input to parallel-output shift register. Two serial data inputs, A1 and A2, are provided so that one input may be used as a data enable. Data is entered on each rising edge of the clock. The active-low asynchronous Reset overrides theClock and Serial Data inputs. Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 2.0 to 6.0 V Low Input Current: 1.0 A High Noise Immunity Characteristic of CMOS Devices ORDERING INFORMATION IN74HC164АN Plastic IN74HC164АD SOIC TA = -55 to 125 C for all packages PIN ASSIGNMENT LOGIC DIAGRAM FUNCTION TABLE Inputs PIN 14 =VCC PIN 7 = GND Outputs RESET CLOCK A1 A2 L X X X QA QB…QH L L… L H X X no change H H D D QAn…QGn H D H D QAn…QGn H H H H QAn…QGn H L L L QAn…QGn D = data input X = don’t care QAn - QGn = data shifted from the previous stage on a rising edge at the clock input. Rev. 00 IN74HC164А MAXIMUM RATINGS* Symbol Parameter Value Unit -0.5 to +7.0 V VCC DC Supply Voltage (Referenced to GND) VIN DC Input Voltage (Referenced to GND) -1.5 to VCC +1.5 V DC Output Voltage (Referenced to GND) -0.5 to VCC +0.5 V DC Input Current, per Pin 20 mA IOUT DC Output Current, per Pin 25 mA ICC DC Supply Current, VCC and GND Pins 50 mA PD Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ 750 500 mW -65 to +150 C 260 C VOUT IIN Tstg TL Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) * Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 10 mW/C from 65 to 125C SOIC Package: : - 7 mW/C from 65 to 125C RECOMMENDED OPERATING CONDITIONS Symbol VCC VIN, VOUT Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage, Output Voltage (Referenced to GND) TA Operating Temperature, All Package Types tr, tf Input Rise and Fall Time (Figure 1) VCC =2.0 V VCC =4.5 V VCC =6.0 V Min Max Unit 2.0 6.0 V 0 VCC V -55 +125 C 0 0 0 1000 500 400 ns This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND(VIN or VOUT)VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V CC). Unused outputs must be left open. Rev. 00 IN74HC164А DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND) VCC V 25 C to -55C 85 C 125 C Unit VOUT=0.1 V or VCC-0.1 V IOUT 20 A 2.0 4.5 6.0 1.5 3.15 4.2 1.5 3.15 4.2 1.5 3.15 4.2 V Maximum Low Level Input Voltage VOUT=0.1 V or VCC-0.1 V IOUT 20 A 2.0 4.5 6.0 0.3 0.9 1.2 0.3 0.9 1.2 0.3 0.9 1.2 V Minimum High-Level Output Voltage VIN= VIH or VIL IOUT 20 A 2.0 4.5 6.0 1.9 4.4 5.9 1.9 4.4 5.9 1.9 4.4 5.9 V 4.5 6.0 3.98 5.48 3.84 5.34 3.7 5.2 2.0 4.5 6.0 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 VIN=VIH or VIL IOUT 4.0 mA IOUT 5.2 mA 4.5 6.0 0.26 0.26 0.33 0.33 0.4 0.4 Symbol Parameter VIH Minimum High-Level Input Voltage VIL VOH Test Conditions VIN= VIH or VIL IOUT 4.0 mA IOUT 5.2 mA VOL Guaranteed Limit Maximum Low-Level Output Voltage VIN=VIH or VIL IOUT 20 A V IIN Maximum Input Leakage Current VIN=VCC or GND 6.0 0.1 1.0 1.0 A ICC Maximum Quiescent Supply Current (per Package) VIN=VCC or GND IOUT=0A 6.0 8.0 80 160 A Rev. 00 IN74HC164А AC ELECTRICAL CHARACTERISTICS(CL=50pF,Input tr=tf=6.0 ns) VCC Symbol fmax tPLH, tPHL tPHL tTLH, tTHL Guaranteed Limit V 25 C to -55C 85C 125C Unit Maximum Clock Frequency (50% Duty Cycle) (Figures 1 and 4) 2.0 4.5 6.0 6.0 30 35 4.8 24 28 4.0 20 24 MHz Maximum Propagation Delay,Clock to Q (Figures 1 and 4) 2.0 4.5 6.0 175 35 30 220 44 37 265 53 45 ns Maximum Propagation Delay,Reset to Q (Figures 2 and 4) 2.0 4.5 6.0 205 41 35 255 51 43 310 62 53 ns Maximum Output Transition Time, Any Output (Figures 1 and 4) 2.0 4.5 6.0 75 15 13 95 19 16 110 22 19 ns - 10 10 10 pF Parameter CIN Maximum Input Capacitance tSU Minimum Setup Time,A1 or A2 to Clock (Figure 3) 2.0 4.5 6.0 50 10 9 65 13 11 75 15 13 ns th Minimum Hold Time, Clock to A1 or A2 (Figure 3) 2.0 4.5 6.0 5 5 5 5 5 5 5 5 5 ns trec Minimum Recovery Time, Reset Inactive to Clock (Figure 2) 2.0 4.5 6.0 5 5 5 5 5 5 5 5 5 ns tw Minimum Pulse Width, Reset (Figure 2) 2.0 4.5 6.0 80 16 14 100 20 17 120 24 20 ns tw Minimum Pulse Width, Clock (Figure 1) 2.0 4.5 6.0 80 16 14 100 20 17 120 24 20 ns tr, tf Maximum Input Rise and Fall Times (Figure 1) 2.0 4.5 6.0 1000 500 400 1000 500 400 1000 500 400 ns CPD Power Dissipation Capacitance (Per Package) Typical @25C,VCC=5.0 V Used to determine the no-load dynamic power consumption: PD=CPDVCC2f+ICCVCC 140 pF Rev. 00 IN74HC164А Figure 1. Switching Waveforms Figure 2. Switching Waveforms Figure 3. Switching Waveforms Figure 4. Test Circuit TIMING DIAGRAM EXPANDED LOGIC DIAGRAM Rev. 00 IN74HC164А N SUFFIX PLASTIC DIP (MS - 001AA) A Dimension, mm 8 14 B 7 1 Symbol MIN MAX A 18.67 19.69 B 6.1 7.11 C F L C -T- SEATING PLANE N G M K J H D 0.25 (0.010) M T NOTES: 1. Dimensions “A”, “B” do not include mold flash or protrusions. Maximum mold flash or protrusions 0.25 mm (0.010) per side. 5.33 D 0.36 0.56 F 1.14 1.78 G 2.54 H 7.62 J 0 10 K 2.92 3.81 L 7.62 8.26 M 0.2 0.36 N 0.38 D SUFFIX SOIC (MS - 012AB) Dimension, mm A 14 8 H B 1 G P 7 R x 45 C -TK D SEATING PLANE J F M Symbol MIN MAX A 8.55 8.75 B 3.8 4 C 1.35 1.75 D 0.33 0.51 F 0.4 1.27 G 1.27 H 5.27 J 0° 8° K 0.1 0.25 M 0.19 0.25 P 5.8 6.2 R 0.25 0.5 0.25 (0.010) M T C M NOTES: 1. Dimensions A and B do not include mold flash or protrusion. 2. Maximum mold flash or protrusion 0.15 mm (0.006) per side for A; for B ‑ 0.25 mm (0.010) per side. Rev. 00