AS8SLC128K32

SRAM
AS8SLC128K32
128K x 32 SRAM
PIN ASSIGNMENT
(Top View)
SRAM MEMORY ARRAY
AVAILABLE AS MILITARY
SPECIFICATIONS
NC
A0
A1
A2
A3
A4
A5
CS3\
GND
CS4\
WE1\
A6
A7
A8
A9
A10
Vcc
68 Lead CQFP (Q)
9
8
7
6
5
4
3
2
1
68
67
66
65
64
63
62
61
• MIL-STD-883
Fast Access Times of 10 to 25ns
Overall Configuration: 128K x 32
4 Low Power CMOS 128K x 8 SRAMs in one MCM
+3.3V power supply
Internal Decoupling Capacitors
Low Operating Power, 1/2 Previous Generation
OPTIONS
• Operating Temperature Ranges
Military (-55oC to +125oC)
Industrial (-40oC to +85oC)
• Timing
10ns
12ns
15ns
17ns
20ns
25ns
MARKINGS
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
I/O 16
I/O 17
I/O 18
I/O 19
I/O 20
I/O 21
I/O 22
I/O 23
GND
I/O 24
I/O 25
I/O 26
I/O 27
I/O 28
I/O 29
I/O 30
I/O 31
Vcc
A11
A12
A13
A14
A15
A16
CS1\
OE\
CS2\
NC
WE2\
WE3\
WE4\
NC
NC
NC
•
•
•
•
•
•
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
I/O 0
I/O 1
I/O 2
I/O 3
I/O 4
I/O 5
I/O 6
I/O 7
GND
I/O 8
I/O 9
I/O 10
I/O 11
I/O 12
I/O 13
I/O 14
I/O 15
FEATURES
XT
IT
66 Lead PGA (P)
-10
-12
-15
-17
-20
-25
\
CS
CS4\
CS
CS2\
\
\
• Package
Ceramic Quad Flatpack
Pin Grid Array
• Low Power Data Retention Mode
NC
Q
P
\
\
NC
CS
CS1\
L
CS
CS3\
GENERAL DESCRIPTION
The AS8SLC128K32 is a high speed, 4MB CMOS SRAM
multichip module (MCM) designed for full temperature range, 3.3V
power supply, military, space, or high reliability mass memory and
fast cache applications.
The device input and output TTL compatible. Writing is executed
when the write enable (WE\) and chip enable (CS\) inputs are low.
Reading is accomplished when WE\ is high and CS\ and output enable
(OE\) are both low. Access time grades of 10ns, 12ns, 15ns, 17ns,
20ns and 25ns maximum are standard.
The products are designed for operation over the temperature
range of -55°C to +125°C and screened under the full military
environment.
FUNCTIONAL BLOCK DIAGRAM
For more products and information
please visit our web site at
www.micross.com
AS8SLC128K32
Rev. 0.8 01/10
Micross Components reserves the right to change products or specifications without notice.
1
SRAM
AS8SLC128K32
ABSOLUTE MAXIMUM RATINGS*
This is a stress rating only and functional operation on the
device at these or any other conditions above those indicated
in the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
**Junction temperature depends upon package type, cycle
time, loading, ambient temperature and airflow. See the Application Information section at the end of this datasheet for
more
information.
Voltage of Vcc Supply Relative to Vss...........-0.5V to +4.6V
Storage Temperature.....................................-65°C to +150°C
Short Circuit Output Current(per I/O)............................20mA
Voltage on Any Pin Relative to Vss............-.5V to Vcc+4.6V
Maximum Junction Temperature**.............................+150°C
*Stresses greater than those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device.
ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS
(-55oC < TA < 125oC and -40oC to +85oC; Vcc = 3.3V ±0.3V)
DESCRIPTION
CONDITIONS
CS\<VIL; VCC = MAX
High Speed
f = MAX = 1/ tRC (MIN)
Power Supply
Current: Operating Outputs Open, OE\ = VIH
SYMBOL
ICC1
Low Power (L)
Low Speed
Power Supply
Current: Operating
CS\<VIL; VCC = MAX
f = 1 MHz, OE\ = VIH
ICC3
Low Power (L)
-10
-12
MAX
-15
280
240
220
180
160
240
210
200
180
160
---
---
---
---
---
80
60
60
60
60
100
80
80
80
80
80
60
60
60
60
70
60
60
60
60
50
36
36
36
36
-17
-20
UNITS NOTES
mA
2, 3,13
mA
2
mA
3, 13
CS\>VIH; VCC = MAX
Power Supply
Current: Standby
f = MAX = 1/ tRC (MIN)
Outputs Open, OE\=VIH
ISBT1
Low Power (L)
CMOS Standby
VIN = VCC - 0.2V, or VSS
+0.2V
VCC=Max; f = 0Hz
ISBT2
Low Power (L)
AS8SLC128K32
Rev. 0.8 01/10
mA
Micross Components reserves the right to change products or specifications without notice.
2
SRAM
AS8SLC128K32
CAPACITANCE (VIN = 0V, f = 1MHz, TA = 25oC)*
CADD
SYMBOL
PARAMETER
A0 - A16 Capacitance
MAX
40
UNITS
pF
COE
OE\ Capacitance
40
pF
CWE, CCS
WEx\ and CSx\ Capacitance
12
pF
CIO
I/O 0- I/O 31 Capacitance
15
pF
NOTE:
*This parameter is sampled.
AC TEST CONDITIONS
TEST SPECIFICATIONS
Input pulse levels...........................................VSS to 3V
Input rise and fall times...........................................1ns/V
Input timing reference levels...............................1.5V
Output reference levels........................................1.5V
Output load..........................................See Figure 1, 2
3.3V
RL = 50Ω
ZO = 50Ω
319Ω
VL = 1.5V
Q
30 pF
Q
5 pF
333Ω
FIGURE 1
AS8SLC128K32
Rev. 0.8 01/10
FIGURE 2
Micross Components reserves the right to change products or specifications without notice.
3
SRAM
AS8SLC128K32
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS
(NOTE 5) (-55oC<TA < 125oC and -40oC to +85oC; VCC = 3.3V ±0.3V)
DESCRIPTION
READ CYCLE
READ cycle time
Address access time
Chip select access time
Output hold from address change
Chip select to output in Low-Z
Chip select to output in High-Z
Output enable access time
Output enable to output in Low-Z
Output disable to output in High-Z
WRITE CYCLE
WRITE cycle time
Chip select to end of write
Address valid to end of write
Address setup time
Address hold from end of write
WRITE pulse width, CS\ controlled
WRITE pulse width, WE\ controlled
Data setup time
Data hold time
Write disable to output in Low-z
Write enable to output in High-Z
AS8SLC128K32
Rev. 0.8 01/10
SYMBOL
t
RC
AA
t
ACS
t
OH
t
LZCS
t
HZCS
t
AOE
t
LZOE
t
HZOE
-10
MIN MAX
10
t
t
WC
CW
t
AW
t
AS
t
AH
t
WP1
t
WP2
t
DS
t
DH
t
LZWE
t
HZWE
t
-12
MIN MAX
12
15
10
10
1
1
0
0
12
12
2
2
5.5
5.5
6
6
0
0
0
0
6
12
10
10
0
0
10
10
6
1
2
5
-17
MIN MAX
17
15
15
2
2
5.5
10
9
9
0
0
9
9
5
1
2
5
-15
MIN MAX
20
17
17
2
2
7
7
20
20
2
2
7.5
7.5
0
7
15
10
10
0
0
12
12
7
1
2
6
-20
UNITS NOTES
MIN MAX
0
0
7.5
17
11
11
0
0
14
14
7.5
1
2
6.5
8
8
8
20
12
12
0
0
15
15
8
1
2
7
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
4,6,7
4,6,7
4,6
4,6
4,6,7
4,6,7
Micross Components reserves the right to change products or specifications without notice.
4
SRAM
AS8SLC128K32
LOW POWER CHARACTERISTICS (L Version Only)
LOW VCC DATA RETENTION WAVEFORM
DATA RETENTION MODE
VCC
4.5V
4.5V
VDR > 2V
t
t
CDR
R
VDR
CS\ 1-4
NOTES
1. All voltages referenced to VSS (GND).
2. Worst case address switching.
3. ICC is dependent on output loading and cycle rates.
unloaded, and f=
7. At any given temperature and voltage condition,
tHZCS, is less than tLZCS, and tHZWE is less than tLZWE.
8. WE\ is HIGH for READ cycle.
9. Device is continuously selected. Chip selects and output
enable are held in their active state.
10. Address valid prior to or coincident with latest occurring chip enable.
11. tRC= READ cycle time.
12. Chip enable (CS\) and write enable (WE\) can initiate
and terminate a WRITE cycle.
13. ICC is for full 32 bit mode.
1
t RC(MIN) HZ.
The specified value applies with the outputs
4. This parameter guaranteed but not tested.
5. Test conditions as specified with output loading as
shown in Fig. 1 & 2 unless otherwise noted.
6. tHZCS, tHZOE and tHZWE are specified with CL= 5pF as in
Fig. 2. Transition is measured +/- 200 mV typical from
steady state voltage, allowing for actual tester RC time
constant.
AS8SLC128K32
Rev. 0.8 01/10
Micross Components reserves the right to change products or specifications without notice.
5
SRAM
AS8SLC128K32
READ CYCLE NO. 1
tRC
ADDRESS
tOH
DATA I/O
tAA
PREVIOUS DATA VALID
NEW DATA VALID
READ CYCLE NO. 2
tRC
ADDRESS
tAA
CS\
t
tLZCS ACS
tHZCS
OE\
tAOE
tLZOE
DATA I/O HIGH IMPEDANCE
AS8SLC128K32
Rev. 0.8 01/10
DATA VALID
Micross Components reserves the right to change products or specifications without notice.
6
SRAM
AS8SLC128K32
WRITE CYCLE NO. 1
(Chip Select Controlled)
tWC
ADDRESS
CS\
tAS
tAW
tAH
tCW
tWP21
WE\
tDS
DATA I/O
tDH
DATA VALID
WRITE CYCLE NO. 2
(Write Enable Controlled)
tWC
ADDRESS
tAW
CS\
tAS
tAH
tCW
tWP11
WE\
tHZWE
DATA I/O
tDS
tLZtDH
DATA VALID
NOTES
1. All voltages referenced to VSS (GND).
AS8SLC128K32
Rev. 0.8 01/10
Micross Components reserves the right to change products or specifications without notice.
7
SRAM
AS8SLC128K32
MECHANICAL DEFINITIONS*
Micross Case (Package Designator Q)
D2
D1
DETAIL A
D
R
1o - 7o
B
b
L1
e
SEE DETAIL A
A
A2
E3
*All measurements are in inches.
AS8SLC128K32
Rev. 0.8 01/10
Micross Components reserves the right to change products or specifications without notice.
8
SRAM
AS8SLC128K32
MECHANICAL DEFINITIONS*
Micross Case (Package Designator P)
4xD
D1
A
D2
Pin 56
A1
Pin 1
φb1
(identified by
0.060 square pad)
E1
e
φb
Pin 66
e
φb2
Pin 11
L
*All measurements are in inches.
AS8SLC128K32
Rev. 0.8 01/10
Micross Components reserves the right to change products or specifications without notice.
9
SRAM
AS8SLC128K32
ORDERING INFORMATION
EXAMPLE: AS8SLC128K32Q-20/883C
Device Number
AS8SLC128K32
AS8SLC128K32
AS8SLC128K32
AS8SLC128K32
AS8SLC128K32
Package
Type
Q
Q
Q
Q
Q
Speed
ns
-20
-25
-35
-45
-55
Options Process
L
L
L
L
L
/*
/*
/*
/*
/*
EXAMPLE: AS8SLC128K32P-35L/IT
Device Number
AS8SLC128K32
AS8SLC128K32
AS8SLC128K32
AS8SLC128K32
AS8SLC128K32
Package
Type
P
P
P
P
P
Speed
ns
-20
-25
-35
-45
-55
Options Process
L
L
L
L
L
/*
/*
/*
/*
/*
*AVAILABLE PROCESSES
XT = Military Temperature Rang
IT = Industrial Temperature Range
883C = Full Military Processing
-55oC to +125oC
-40oC to +85oC
-55oC to +125oC
OPTION DEFINITIONS
L = 2V data retention/low power
AS8SLC128K32
Rev. 0.8 01/10
Micross Components reserves the right to change products or specifications without notice.
10