FDP150N10A N-Channel Power Trench Mosfet Chip 100V, 50A, 15mΩ1 Chip Part V(BR)DSS FDP150N10A 100V IDn RDS(on) Max Die Size 1 50A 15mΩ 3.2 x 1.9 mm Photo 2 TBA See page 2 for ordering part numbers & supply formats Features Applications • High density AC / DC Converters • High Power & Current Handling Capability • Motor drives & Micro Inverters • Low RDS (on) per mm2 • Low Gate Charge, Fast Switching Maximum Ratings Symbol Parameter Ratings Units VDSS Drain to Source Voltage 100 V Gate to Source Voltage ±20 V VGSS 2 ID Drain Current 3 IDM Drain Current TJ, TSTG Continuous (TC = 25°C) 50 Continuous (TC = 100°C) 36 Pulsed 200 Operation Junction & Storage Temperature EAS -55 to 175 °C L = 2mH, IAS = 9.2A, RG=25Ω Starting TJ =25°C 84.6 mJ ISD≤100A,di/dt≤200A/µs, VDD≤BVDSS Starting TJ=25°C 6 V/ns Single Pulsed Avalanche 4 Energy 4 Peak Diode Recovery dv/dt dv/dt A Symbol Parameter Test Conditions Min Typ Max Units BVDSS Drain to Source Breakdown Voltage ID = 250µA, VGS = 0V 100 - - V VGS(th) Gate threshold Voltage VGS = VDS, ID =250µA 2.0 - 4.0 V IDSS Zero Gate Voltage Drain Current VDS = 80V, VGS = 0V - - 1 µA Zero Gate Voltage Drain Current @ 150°C VDS = 80V, VGS = 0V - - 500 IGSS Gate to Body Leakage Current VGS = ±20V , VDS = 0V - - ±100 nA RDS(on) Static Drain to Source On Resistance VGS = 10V, ID = 50A - 12.5 15.0 mΩ 1. 2. 3. 1 Notes: Defined by chip design, not subject to 100% production test at wafer level Performance will vary based on assembly technique and substrate choice Repetitive Rating: Pulse width limited by maximum junction temperature Further Information - Contact your Micross sales office or email your enquiry to [email protected] ©2014 Fairchild Semiconductor Corporation & Micross Components Page1 Static Characteristics, TJ = 25° unless otherwise noted Dynamic Characteristics4, TJ = 25°C unless otherwise noted Symbol Parameter Test Conditions Min Typ Max Units gFS Forward Transconductance VDS = 10V, ID = 50A - 40 - S ESR Equivalent Series Resistance (G-S) f = 1MHz - 1.3 - Ω Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Coss(er) Energy Related Output Capacitance Qg(tot) Total Gate Charge at 10V Qgs Gate to Source Gate Charge Qgs2 Gate Charge Threshold to Plateau Qgd Gate to Drain “Miller” Charge - 1080 1440 pF VDS =50V, VGS = 0V f = 1MHz - 267 355 pF - 11 - pF VDS =50V, VGS = 0V - 436 - pF - 16.2 21.0 nC - 5.3 - nC - 2.6 - nC - 3.7 - nC VDS =50V, ID = 50A 5 VGS = 10V Switching Characteristics4, TJ = 25°C unless otherwise noted Symbol Parameter td(on) Turn-On Delay Time tr Turn-On Rise Time td(off) Turn-Off Delay Time tf Turn-Off Fall Time Test Conditions VDD = 50V, ID = 50A 5 VGS = 10V RGEN = 4.7Ω Min Typ Max Units - 13 36 ns - 16 42 ns - 21 52 ns - 5 20 ns Min Typ Max Drain-Source Diode Characteristics4, TJ = 25°C unless otherwise noted Symbol Parameter Test Conditions Units IS Maximum Continuous Drain to Source Diode Forward Current - - 50 A ISM Maximum Pulsed Drain to Source Diode Forward Current - - 200 A VSD Drain to Source Diode Forward Voltage VGS = 0V, ISD = 50A - - 1.3 V trr Reverse Recovery Time - 50 - ns Qrr Reverse Recovery Charge VGS = 0V,VDD =50V,ISD = 50A dIF/dt = 100A/μs - 55 - nC 4. 5. Notes: Characterised by design & tested at component level, not subject to production test at wafer level Essentially independent of Operating Temperature Typical Characteristics Ordering Guide Part Number Format Detail / Drawing FDP150N10AMW Un-sawn wafer, electrical rejects inked Page 3 FDP150N10AMWF Sawn wafer on film-frame Page 4 FDP150N10AMD Singulated die / chips in waffle pack Page 4 Page2 Note: Singulated Die / Chips can also be supplied in Pocket Tape or SurfTape® on request Further Information - Contact your Micross sales office or email your enquiry to [email protected] ©2014 Fairchild Semiconductor Corporation & Micross Components Die Drawing Mechanical Data Parameter Units Chip Dimensions Un-sawn 3251 x 1905 µm Chip Thickness (Nominal) 200 µm Gate Pad Size 305 x 435 µm Wafer Diameter 200 (subject to change) mm Saw Street 80 (subject to change) µm Wafer orientation on frame Wafer notch parallel with frame flat Topside Metallisation & Thickness Al / Cu +TiW+Ti 4 µm Backside Metallisation & Thickness Ti-VNi-Ag 0.65 µm Unpassivated Recommended Die Attach Material Soft Solder or Conductive Epoxy Recommended Wire Bond - Gate Al 125µm X1 Recommended Wire Bond – Source Al 500µm X2 Page3 Topside Passivation Further Information - Contact your Micross sales office or email your enquiry to [email protected] ©2014 Fairchild Semiconductor Corporation & Micross Components Sawn Wafer on Film-Frame – Dimensions (inches) Die in Waffle Pack – Dimensions (mm) A X X = 2.29mm ±0.13mm pocket size Y = 3.30mm ±0.13mm pocket size Z = 0.51mm ±0.08mm pocket depth A = 5° ±1/2° pocket draft angle No Cross Slots Array = 13 X 10 (12) Y Z X OVERALL TRAY SIZE Size = 50.67mm ±0.25mm Height = 3.94mm ±0.13mm Flatness = 0.30mm DISCLAIMER THE INFORMATION HEREIN IS GIVEN TO DESCRIBE CERTAIN COMPONENTS AND SHALL NOT BE CONSIDERED AS WARRANTED CHARACTERISTICS. NO RESPONSIBILITY IS ASSUMED FOR ITS USE; NOR FOR ANY INFRINGEMENT OF PATENTS OR OTHER RIGHTS OF THIRD PARTIES WHICH MAY RESULT FROM ITS USE. NO LICENSE IS GRANTED BY IMPLICATION OR OTHERWISE UNDER ANY PATENT OR PATENT RIGHTS OF EITHER MICROSS COMPONENTS OR FAIRCHILD SEMICONDUCTOR CORPORATION. FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used here in: (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labelling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Further Information - Contact your Micross sales office or email your enquiry to [email protected] ©2014 Fairchild Semiconductor Corporation & Micross Components Page4 1. Life support devices or systems are devices or systems which,