BL8891 Current Mode PWM Power Switch Freq Shuffling GENERAL DESCRIPTION FEATURES BL8891 combines a dedicated current mode PWM controller with a high voltage power MOSFET. It is optimized for high performance, low standby power, and cost effective off-line flyback converter applications in sub 15W range. BL8891 offers complete protection coverage with automatic self-recovery feature including Cycle-by-Cycle current limiting (OCP), over load protection (OLP), VDD over voltage clamp and under voltage lockout (UVLO). Excellent EMI performance is achieved with proprietary frequency shuffling technique together with soft switching control at the totem pole gate drive output. The tone energy at below 20KHZ is minimized in the design and audio noise is eliminated during operation. BL8891 is offered in DIP-8 & DIP-7 package. ■Power on Soft Start Reducing MOSFET VDS Stress ■Frequency shuffling for EMI ■Extended Burst Mode Control For Improved Efficiency and Minimum Standby Power Design ■Audio Noise Free Operation ■Fixed 50KHZ Switching Frequency ■Internal Synchronized Slope Compensation ■Low VDD Startup Current and Low Operating Current ■Leading Edge Blanking on Current Sense Input Good Protection Coverage With Auto Self-Recovery VDD Over Voltage Clamp and Under Voltage Lockout with Hysteresis (UVLO) Line Input Compensated Cycle-by-Cycle Over-current Threshold Setting For Constant Output Power Limiting Over Universal Input Voltage Range Overload Protection (OLP) Over voltage Protection (OVP) ■Pb-Free DIP-8L , DIP-7L APPLICATIONS Offline AC/DC flyback converter for ■Battery Charger ■PDA power supplies ■Digital Cameras and Camcorder Adaptor ■VCR, SVR, STB, DVD&DVCD Player SM ■Set-Top Box Power ■Auxiliary Power Supply for PC and Server ■Open-frame SMPS TYPICAL APPLICATION www.belling.com.cn 1 V1.0 Current Mode PWM Power Switch Freq Shuffling BL8891 GENERAL INFORMATION Pin Configuration The BL8891 is offered in DIP8, DIP7 package as shown below. Absolute Maximum Ratings Drain Voltage (off state) -0.3V to 600V VDD Voltage -0.3V to 30V VDD-G Input Voltage -0.3V to 30V VDDG GND VDD GND VDD Clamp Continuous Current FB Drain FB Input Voltage -0.3V to 7V SENSE SENSE Input Voltage -0.3V to 7V Drain 10mA Min/Max Operating Junction Temperature TJ Min/Max Storage Temperature Tstg 0℃ to 125℃ -25℃ to 150℃ Lead Temperature (Soldering,10secs) Ambient Operating Temperature 260℃ -25℃ to 85℃ Thermal Resistance from Junction to case θJC Thermal Resistance from Junction to 15℃/W 75℃/W ambient θJA Note: θJA is measured with the PCB copper area of approximately 1 2 in (Multi-layer). That need connect to exposed pad. TERMINAL ASSIGNMENTS Pin Name I/O Description GND P Ground VDD-G P Internal Gate Driver Power Supply FB I Feedback input pin. The PWM duty cycle is determined by voltage level into this pin and the current-sense signal at Pin 4. SENSE I Current sense input Drain O HV MOSFET Drain Pin. The Drain pin is connected to the primary lead of the transformer VDD P IC DC power supply Input OUTPUT POWER TABLE Product BL8891 230VAC±10% Open Frame 15W 85-264VAC Open Frame 12W Package DIP8,DIP7 Notes: 1. Maximum practical continuous power in an open frame design with sufficient drain pattern as a heat sink, at 50℃ ambient. q www.belling.com.cn 2 V1.0 Current Mode PWM Power Switch Freq Shuffling BL8891 BLOCK DIAGRAM ELECTRICAL CHARACTERISTICS (TA = 25℃, VDD=VDDG=16V, if not otherwise noted) Symbol Parameter Test Conditions Min Typ. Max Unit 6 20 uA Supply Voltage (VDD) I _start up VDD Startup Current I_op Operation Current UVLO(ON) UVLO(OFF) VDD_Clamp OVP(ON) www.belling.com.cn VDD=14.5V,Measure Leakage current into VDD VFB=3V VDD Under Voltage Lockout Enter VDD Under Voltage Lockout Exit VDD Zener Clamp Voltage 2.1 8.7 9.3 10.7 V 14.8 15.3 16.0 V IDD=10mA Over Voltage Protection CS=0V,FB=3VRamp up Threshold VDD until gate clock is off 3 mA 30 27 28.8 V 30 V V1.0 Current Mode PWM Power Switch Freq Shuffling BL8891 Feedback Input Section (FB Pin) VFB _Open IFB _Short VTH_0D VTH_PL TD_PL ZFB_IN VFB Open LoopVoltage FB pin short circuit current 5.4 Short FB pin to GND and measure current Zero Duty Cycle FB Threshold Voltage Power Limiting FB Threshold Voltage Power Limiting FB Debounce Time Input Impedance 5.6 6 V 1.45 mA 1.23 V 4.2 V 50 ms 4 KΩ 4 ms 270 ns 40 KΩ 120 ns Current Sense Input (Sense Pin) Soft start time T_ blanking ZSENSE_ IN TD_ OC VTH_ OC Leading edge blanking time Input Impedance Over Current Detection and Control Delay Internal Current Limiting Threshold Voltage From Over Current occurs till the Gate drive output start to turn off FB=3.3V 0.78 0.83 0.88 V 43 48 53 KHz Oscillator Fosc △f_ Temp △f_ VDD D_ max F_ Burst Normal Oscillation Frequency Frequency Temperature Stability Frequency Voltage Stability Maximum duty cycle(Note) FB=3.3V,CS=0V 70 Burst Mode Base 5 % 5 % 80 90 22 Frequency % KHz Power MOSFET Section BV-DSS On Resistance MOSFET Drain-Source 600 Breakdown Voltage Rdson(Note) V 4.4 5.9 Ω +4 % Frequency △_VDD Frequency Modulation -4 range/Base frequency Note: Guaranteed by design. www.belling.com.cn 4 V1.0 Current Mode PWM Power Switch Freq Shuffling BL8891 CHARACTERIZATION PLOTS (The characteristic graphs are normalized at Ta=25℃) www.belling.com.cn 5 V1.0 Current Mode PWM Power Switch Freq Shuffling BL8891 OPERATION DESCRIPTION The BL8891 is a low power off-line SMPS Switcher optimized for switching frequency is internally adjusted at no load or light load off-line flyback converter applications in sub 15W power range. condition. The ‘Extended burst mode’ control greatly reduces the standby The switch frequency reduces at light/no load condition to power consumption and help the design easily to meet the improve the conversion efficiency. At light load or no load international power conservation requirements. condition, the FB input drop below burst mode threshold level and device enters Burst Mode control. The Gate drive output switches ● Startup Current and Start up Control only when VDD voltage drop below a preset level and FB input is Startup current of BL8891 is designed to be very low so that VDD active to output an on state. Otherwise the gate drive remains at could be charged up above UVLO threshold level and device off state to minimize the switching loss and reduces the standby starts up quickly. A large value startup resistor can therefore be power consumption to the greatest extend. The switching used to minimize the power loss yet achieve a reliable startup in frequency control also eliminates the audio noise at any loading application. For AC/DC adaptor with universal input range design, conditions. a 2 MΩ, 1/8 W startup resistor could be used together with a VDD capacitor to provide a fast startup and yet low power ● Oscillator Operation dissipation design solution. The switching frequency of BL8891 is internally fixed at 48KHZ. No external frequency setting components are required for PCB ● Operating Current design simplification. The Operating current of BL8891 is low at 2mA.Good efficiency is achieved with BL8891 low operating current together with the ● Current Sensing and Leading Edge Blanking ‘Extended burst mode’ control features. Cycle-by-Cycle current limiting is offered in BL8891 current mode PWM control. The switch current is detected by a sense resistor ● Soft Start into the sense pin. An internal leading edge blanking circuit chops BL8891 features an internal 4ms soft start to soften the electrical off the sensed voltage spike at initial internal power MOSFET on stress occurring in the power supply during startup. It is activated state due to snubber diode reverse recovery and surge gate during the power on sequence. As soon as VDD reaches current of internal power MOSFET so that the external RC UVLO(OFF), the peak current is gradually increased from nearly filtering on sense input is no longer needed. The current limiting zero to the maximum level of 0.83V. Every restart up is followed comparator is disabled and cannot turn off the internal power by a soft start. MOSFET during the blanking period. The PWM duty cycle is determined by the current sense input voltage and the FB input ● Frequency shuffling for EMI improvement voltage. The frequency Shuffling (switching frequency modulation) is implemented in BL8891. The oscillation frequency is modulated ● Internal Synchronized Slope Compensation so that the tone energy is spread out. The spread spectrum Built-in slope compensation circuit adds voltage ramp onto the minimizes the conduction band EMI and therefore eases the current sense input voltage for PWM generation. This greatly system design. improves the close loop stability at CCM and prevents the sub-harmonic oscillation and thus reduces the output ripple ● Extended Burst Mode Operation voltage. At light load or zero load condition, most of the power dissipation in a switching mode power supply is from switching loss on the ● Drive mosfet, the core loss of the transformer and the loss on the The internal power MOSFET in BL8891 is driven by a dedicated snubber circuit. The magnitude of power loss is in proportion to gate driver for power switch control. Too weak the gate drives the switching frequency. Lower switching frequency leads to the strength results in higher conduction and switch loss of MOSFET reduction on the power loss and thus conserves the energy. The while too strong gate drive results the compromise of EMI. www.belling.com.cn 6 V1.0 Current Mode PWM Power Switch Freq Shuffling Proprietary technology, the OCP is BL8891 A good tradeoff is achieved through the built-in totem pole gate With line voltage design with right output strength and dead time control. The low compensated to achieve constant output power limit over the idle loss and good EMI system design is easier to achieve with universal input voltage range. this dedicated control scheme. At overload condition when FB input voltage exceeds power limit In addition to the gate drive control scheme mentioned, the gate threshold value for more than TD_PL, control circuit reacts to shut drive strength can also be adjusted externally by a resistor down the switcher. Switcher restarts when VDD voltage drop connected between VDD and VDDG, the falling edge of the Drain below UVLO limit. output can be well controlled. It provides great flexibility for VDD is supplied by transformer auxiliary winding output. It is system EMI design. clamped when VDD is higher than 30V. The output of BL8891 is ● Protection Controls shut down when VDD drop below UVLO_ON limit and Switcher Good power supply system reliability is achieved with its rich enters power on start-up sequence. protection features including Cycle-by-Cycle current limiting (OCP), Over Load Protection (OLP) and over voltage clamp, Under Voltage Lockout on VDD (UVLO). www.belling.com.cn 7 V1.0 Current Mode PWM Power Switch Freq Shuffling BL8891 PACKAGE MECHANICAL DATA 8-Pin Plastic DIP Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 3.710 4.310 0.148 0.0170 A1 0.510 A2 3.200 3.600 0.126 0.142 B 0.380 0.570 0.015 0.022 B1 0.020 1.524(BSC) 0.060(BSC) C 0.204 0.360 0.008 0.014 D 9.000 9.400 0.3540 0.370 E 6.200 6.600 0.2440 0.260 E1 7.320 7.920 0.288 0.312 e 2.540(BSC) 0.100(BSC) L 3.000 3.600 0.118 0.142 E2 8.400 9.000 0.331 0.354 www.belling.com.cn 8 V1.0 Current Mode PWM Power Switch Freq Shuffling BL8891 7-Pin Plastic DIP www.belling.com.cn 9 V1.0