Single Output Clock Generator IDT5V926A DATA SHEET FEATURES: DESCRIPTION: • 3V to 3.6V operating voltage • 48MHz to 160MHz output frequency range • Input from fundamental crystal oscillator or external source • Internal PLL feedback (loading the feedback output relative to the other outputs, will adjust the propagation delay between REF inputs and outputs) • Select inputs (S[1:0]) for FB divide selection (multiply ratio of 2, 3, 4, 4.25, 5, 6, 6.25, and 8) • Low jitter • PLL bypass for testing and power-down control (S1 = H, S0 = H, powers part down <500µA) • Available in TSSOP package • Pin and function compatible to IDT5V926 The IDT5V926A is a low-cost, low skew, low jitter, and high-performance clock multiplier with a reference clock from either a lower frequency crystal or clock input. It has been specially designed to interface with Gigabit Ethernet and Fast Ethernet applications by providing a 125MHz clock from 25MHz input. It can be programmed to provide output frequencies ranging from 48MHz to 160MHz, with input frequencies ranging from 6MHz to 80MHz. The IDT5V926A includes an internal RC filter that provides excellent jitter characteristics and eliminates the need for external components. When using the optional crystal input, the device accepts a 10 - 40MHz fundamental mode crystal with a maximum equivalent series resistance of 50Ω. APPLICATIONS: • • • • • • Gigabit ethernet Router Network switches SAN Instrumentation Fibre channel FUNCTIONAL BLOCK DIAGRAM OE VCO DIVIDE 1/N PHASE DETECTOR CHARGE PUMP LOOP FILTER VCO QOUT 0 1 X1/REF CRYSTAL OSCILLATOR QREF X2 SELECT MODE S1 IDT5V926A REVISION A JUNE 11, 2009 S0 1 REFE ©2009 Integrated Device Technology, Inc. IDT5V926A Data Sheet SINGLE OUTPUT CLOCK GENERATOR ABSOLUTE MAXIMUM RATINGS(1) PIN CONFIGURATION Symbol Parameter Max. Unit VDD/VDDQ Supply Voltage to Ground -0.5 to +4.6 V VI Input Voltage -0.5 to +4.6 V IO Output Current ±50 mA REFE 1 16 S0 X1/REF 2 15 S1 X2 3 14 OE VDD 4 13 GND TSTG Storage Temperature -65 to +150 °C VDDQ 5 12 VDDQ TJ Junction Temperature 150 °C GND 6 11 GND QREF 7 10 QOUT VDDQ 8 9 VDDQ NOTE: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. TSSOP TOP VIEW PIN DESCRIPTION Pin Name Type Description S[1:0] I Three level divider/mode select pins. Float to MID. I Output enable bar. Outputs Qout and QREF are in a high-impedance state when HIGH. Set OE LOW for normal operation (has internal pull-down). I QREF enable input. QREF stopped LOW when HIGH. When set REFE LOW, the QREF is enabled (has internal pull-down). X1/REF I Crystal oscillator input or clock input. X2 I Crystal oscillator output. Leave unconnected for clock input. OE REFE CRYSTAL SPECIFICATION The crystal oscillators should be fundamental mode quartz crystals: overtone crystals are not suitable. Crystal frequency should be specified for parallel resonance with 50Ω maximum equivalent series resonance. Crystal tuning capacitors should be connected from X1/REF to GND and from X2 to GND. QOUT O Output at N*REF frequency. QREF O Output at REF frequency. VDDQ PWR VDD PWR Power supply for the device core and inputs. Connect to VDD on PCB. GND PWR Ground supply. Power supply for the device outputs. Connect to VDD on PCB. DIVIDE SELECTION TABLE(1) S1 S0 Divide-by-N Value Mode L L 2 PLL L M 3 PLL L H 4 PLL M L 4.25 PLL M M 5 PLL M H 6 PLL H L 6.25 PLL H M 8 PLL H H TEST TEST (2) NOTES: 1. H = HIGH, M = MID, L = LOW 2. Test mode for low frequency testing. In this mode, REF clock bypasses the VCO (VCO powered down) and the crystal oscillator is powered down. DT5V926A REVISION A JUNE 11, 2009 2 ©2009 Integrated Device Technology, Inc. IDT5V926A Data Sheet SINGLE OUTPUT CLOCK GENERATOR COMMON OUTPUT FREQUENCY EXAMPLES (MHz) Output 48 60 64 72 75 80 90 100 Input 24 10 16 12 25 10 15 20 FB Divide Selection S[1:0] LL MH LH MH LM HM MH MM Output 106.25 106.25 120 125 125 125 150 155.52 Input 17 25 15 20 25 62.5 25 19.44 FB Divide Selection S[1:0] HL ML HM HL MM LL MH HM OPERATING CONDITIONS Symbol Parameter Min. Typ. VDD/VDDQ TA CIN Max. Unit Power Supply Voltage 3 3.3 3.6 V Operating Temperature - 40 25 +85 °C Input Capacitance, OE, F = 1MHz, VIN = 0V, TA = 25°C — 5 pF DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Industrial: TA = –40°C to +85°C, VDD/VDDQ = 3.3V ±0.3V Symbol VIL VIH VIHH VIMM VILL Parameter Input LOW Voltage Input HIGH Voltage Input HIGH Voltage Input MID Voltage Input LOW Voltage I3 3-Level Input DC Current, S[1:0] IIH Input HIGH Current VOL VOH Output LOW Voltage Output HIGH Voltage DT5V926A REVISION A JUNE 11, 2009 Test Conditions 3-level input only 3-level input only 3-level input only VIN = VDD VIN = VDD/2 VIN = GND VIN = VDD VIN = VDD, S[1:0] = HH IOL = 12mA IOH = -12mA 3 HIGH Level MID Level LOW Level OE, REFE X1/REF Min. — 2 VDD - 0.6 VDD/2 - 0.3 — — - 50 - 200 — — — 2.4 Typ. — — — — — — — — — 2 — — Max 0.8 — — VDD/2 + 0.3 0.6 +200 +50 — 100 4 0.4 — Unit V V V V V μA μA mA V V ©2009 Integrated Device Technology, Inc. IDT5V926A Data Sheet SINGLE OUTPUT CLOCK GENERATOR POWER SUPPLY CHARACTERISTICS Symbol Parameter Test Conditions (1) IDD_PD Power Down Current VDD = Max. Min. Typ. Max Unit — — 500 μA S[1:0] = HH OE = L; X1/REF = L All outputs unloaded ΔIDD Supply Current per Input VDD = Max., VIN = 3V — — 30 μA IDD Dynamic Supply Current VDD = 3.6V — — 50 mA Typ. Max. Unit QOUT 0.7 1.5 QREF 0.7 2.0 S[1:0] = LL OE = L FOUT = 160MHz All outputs unloaded NOTE: 1. For conditions shown as Min. or Max., use the appropriate values specified under DC Electrical Characteristics. AC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Symbol tR, tF dT tJ Parameter Test Conditions Rise Time, Fall Time 0.8V to 2V Output/Duty Cycle Cycle - Cycle Jitter fOUT Min. VT = VDDQ/2 QOUT < 125MHz QOUT > 125MHz 45 44 55 56 QREF 40 60 FOUT = 106.25MHz 100 FOUT = 125MHz 90 FOUT = 155.52MHz 125 Output Frequency 48 160 ns % ps MHz INPUT TIMING REQUIREMENTS Symbol Description(1) tR, tF Maximum input rise and fall time, 0.8V to 2V(2) tPWC Input clock pulse, HIGH or LOW(2) DH Input duty cycle(2) fOSC XTAL oscillator frequency fIN Input frequency(2) Min. Max. Unit — 10 ns/V 2 — ns 10 90 % 10 40 MHz 48/N 160/N MHz NOTES: 1. Where pulse width implied by DH is less than the tPWC limit, tPWC limit applies. 2. When using a clock input. DT5V926A REVISION A JUNE 11, 2009 4 ©2009 Integrated Device Technology, Inc. IDT5V926A Data Sheet SINGLE OUTPUT CLOCK GENERATOR PARAMETER MEASUREMENT INFORMATION 1.65V±0.15V SCOPE VDD, VDDQ QOUT ➤ LVCMOS ➤ Qx ➤ tcycle n tcycle n+1 ➤ tjit(cc) = |tcycle n – tcycle n+1| 1000 Cycles GND -1.65V±0.15V 3.3V CORE/3.3V OUTPUT LOAD AC TEST CIRCUIT CYCLE-TO-CYCLE JITTER V DD 2V QREF, QOUT 2V QREF, QOUT 2 t PW 0.8V 0.8V tR t PERIOD tF odc = t PW x 100% t PERIOD OUTPUT RISE/FALL TIME DT5V926A REVISION A JUNE 11, 2009 OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD 5 ©2009 Integrated Device Technology, Inc. IDT5V926A SINGLE OUTPUT CLOCK GENERATOR PRELIMINARY ORDERING INFORMATION IDT XXXX Device Type X Package X Process I -40°C to +85C° (Industrial) PG PGG Thin Shrink Small Outline Package TSSOP - Green 5V926A Single Output Clock Generator Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales For Tech Support Corporate Headquarters 800-345-7015 (inside USA) +408-284-8200 (outside USA) Fax: 408-284-2775 www.IDT.com/go/contactIDT [email protected] +480-763-2056 Integrated Device Technology, Inc. 6024 Silver Creek Valley Road San Jose, CA 95138 United States 800-345-7015 (inside USA) +408-284-8200 (outside USA) © 2008 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT, the IDT logo, ICS and HiPerClockS are trademarks of Integrated Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks or registered trademarks used to identify products or services of their respective owners. Printed in USA