LTC4367 100V Overvoltage, Undervoltage and Reverse Supply Protection Controller Description Features Wide Operating Voltage Range: 2.5V to 60V nn Overvoltage Protection to 100V nn Reverse Supply Protection to –40V nn LTC4367: Blocks 50Hz and 60Hz AC Power nn LTC4367: 32ms Recovery from Fault nn LTC4367-1: Fast 500µs Recovery from Fault nn No Input Capacitor or TVS Required for Most Applications nn Adjustable Undervoltage and Overvoltage Thresholds nn Controls Back-to-Back N-Channel MOSFETs nn Low Operating Current: 70µA nn Low Shutdown Current: 5µA nn 8-Pin MSOP and 3mm × 3mm DFN Packages nn Applications Portable Instrumentation Industrial Automation nn Laptops nn Automotive Surge (Load Dump) Protection nn The LTC®4367 protects applications where power supply input voltages may be too high, too low or even negative. It does this by controlling the gate voltages of a pair of external N-channel MOSFETs to ensure that the output stays within a safe operating range.The LTC4367 withstands voltages between –40V and 100V and has an operating range of 2.5V to 60V, while consuming only 70µA in normal operation. Two comparator inputs allow configuration of the overvoltage (OV) and undervoltage (UV) set points using an external resistive divider. A shutdown pin provides external control for enabling and disabling the MOSFETs as well as placing the device in a low current shutdown state. A fault output indicates that the GATE pin is pulling low when the part is in shutdown or the input voltage is outside the UV and OV set points. The LTC4367 has a 32ms turn-on delay that debounces live connections and blocks 50Hz to 60Hz AC power. For fast recovery after faults, the LTC4367-1 has a reduced turn-on delay of 500µs. nn L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Typical Application 24V Automotive Application with +100V, –40V Protection Si7942 VIN 24V GATE VIN VOUT 2A Load Protected from Reverse and Overvoltage at VIN +70V 20V/DIV OV = 36V UV = 7V VOUT VIN VALID WINDOW 464k GND SHDN 1500k UV OV = 36V UV = 7V –40V 20V/DIV FAULT 121k VOUT VOUT VIN OV 29.4k GND 4367 TA01a 200ms/DIV 4367 TA01b LTC4367 4367fa For more information www.linear.com/LTC4367 1 LTC4367 Absolute Maximum Ratings (Note 1, Note 2) Supply Voltage VIN......................................................... –40V to 100V Input Voltages (Note 3) UV, SHDN............................................... –0.3V to 80V OV............................................................. –0.3V to 5V VOUT....................................................... –0.3V to 80V Output Voltages FAULT...................................................... –0.3V to 80V GATE (Note 4).......................................... –40V to 75V Input Currents SHDN, UV ..........................................................–1mA OV.......................................................................–1mA Operating Ambient Temperature Range LTC4367C................................................. 0°C to 70°C LTC4367I..............................................–40°C to 85°C LTC4367H........................................... –40°C to 125°C Storage Temperature Range................... –65°C to 150°C Lead Temperature (Soldering, 10sec) for MSOP Only................................................... 300°C Pin Configuration TOP VIEW VIN 1 8 GATE UV 2 7 VOUT OV 3 GND 4 9 TOP VIEW 6 FAULT 5 SHDN VIN UV OV GND 1 2 3 4 8 7 6 5 GATE VOUT FAULT SHDN MS8 PACKAGE 8-LEAD PLASTIC MSOP TJMAX = 150°C, θJA = 160°C/W DD PACKAGE 8-LEAD (3mm × 3mm) PLASTIC DFN EXPOSED PAD (PIN 9) PCB GROUND CONNECTION OPTIONAL TJMAX = 150°C, θJA = 43°C/W, θJC = 5.5°C/W 4367fa 2 For more information www.linear.com/LTC4367 LTC4367 Order Information (http://www.linear.com/product/LTC4367#orderinfo) LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC4367CDD#PBF LTC4367CDD#TRPBF LGTF 8-Lead (3mm × 3mm) Plastic DFN 0°C to 70°C LTC4367CDD-1#PBF LTC4367CDD-1#TRPBF LGVW 8-Lead (3mm × 3mm) Plastic DFN 0°C to 70°C LTC4367IDD#PBF LTC4367IDD#TRPBF LGTF 8-Lead (3mm × 3mm) Plastic DFN –40°C to 85°C LTC4367IDD-1#PBF LTC4367IDD-1#TRPBF LGVW 8-Lead (3mm × 3mm) Plastic DFN –40°C to 85°C LTC4367HDD#PBF LTC4367HDD#TRPBF LGTF 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C LTC4367HDD-1#PBF LTC4367HDD-1#TRPBF LGVW 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C LTC4367CMS8#PBF LTC4367CMS8#TRPBF LTGTD 8-Lead Plastic MSOP 0°C to 70°C LTC4367CMS8-1#PBF LTC4367CMS8-1#TRPBF LTGVX 8-Lead Plastic MSOP 0°C to 70°C LTC4367IMS8#PBF LTC4367IMS8#TRPBF LTGTD 8-Lead Plastic MSOP –40°C to 85°C LTC4367IMS8-1#PBF LTC4367IMS8-1#TRPBF LTGVX 8-Lead Plastic MSOP –40°C to 85°C LTC4367HMS8#PBF LTC4367HMS8#TRPBF LTGTD 8-Lead Plastic MSOP –40°C to 125°C LTC4367HMS8-1#PBF LTC4367HMS8-1#TRPBF LTGVX 8-Lead Plastic MSOP –40°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix. Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 2.5V to 60V, unless otherwise noted. (Note 2) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS 60 100 V V VIN, VOUT VIN Input Voltage:Operating Range Protection Range l l 2.5 –40 1.8 VIN(UVLO) Input Supply Undervoltage Lockout VIN Rising l 2.2 2.4 V IVIN Input Supply Current: On Off SHDN = 2.5V SHDN = 0V, VIN = VOUT l l 30 5 90 20 µA µA IVIN(R) Reverse Input Supply Current VIN = –40V, VOUT = 0V l –1.5 –2.5 mA IVOUT VOUT Input Current: On Off Reverse SHDN = 2.5V, VIN = VOUT SHDN = 0V, VIN = VOUT VIN = –40V, VOUT = 0V l l l 40 3 20 110 15 50 µA µA µA ΔVGATE Gate Drive (GATE – VOUT) VIN = VOUT = 5.0V, IGATE = 0µA, –1µA VIN = VOUT = 12V to 60V, IGATE = 0µA, –1µA l l 7.2 10 8.7 11 10.8 13.1 V V IGATE(UP) Gate Pull Up Current GATE = 15V, VIN = VOUT = 12V l –20 –35 –60 µA IGATE(SLOW) Gate Slow Pull Down Current GATE = 20V, VIN = VOUT = 12V l 50 90 160 µA IGATE(FAST) Gate Fast Pull Down Current GATE = 20V, VIN = VOUT = 12V l 30 60 90 mA tGATE(SLOW) Slow Turn Off Delay CGATE = 2.2nF, SHDN Falling, VIN = VOUT = 12V l 150 250 370 µs tGATE(FAST) Gate Fast Turn Off Delay CGATE = 2.2nF, UV or OV Fault l 2 4 µs GATE 4367fa For more information www.linear.com/LTC4367 3 LTC4367 Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 2.5V to 60V, unless otherwise noted. (Note 2) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS tD(ON) GATE Turn-On Delay Time VIN = 12V, Power Good to ΔVGATE > 0V, CGATE = 2.2nF l LTC4367 l LTC4367-1 22 0.2 32 0.5 45 1.2 ms ms VUV UV Input Threshold Voltage UV Falling l 492.5 500 507.5 mV VOV OV Input Threshold Voltage OV Rising l 492.5 500 507.5 mV VUVHYST UV Input Hysteresis VIN = VOUT = 12V l 20 25 32 mV VOVHYST OV Input Hysteresis VIN = VOUT = 12V l 20 25 32 mV ILEAK UV, OV Leakage Current V = 0.5V, VIN = 60V l tFAULT UV, OV Fault Propagation Delay Overdrive = 50mV VIN = VOUT = 12V l VSHDN SHDN Input Threshold SHDN Falling l ISHDN SHDN Input Current SHDN = 10V, VIN = 60V l tSTART Delay Coming Out of Shutdown Mode SHDN Rising to FAULT Released, VIN = VOUT = 12V LTC4367 LTC4367-1 l tSHDN(F) SHDN to FAULT Asserted VIN = VOUT = 12V l tLOWPWR Delay from Turn Off to Low Power Operation VIN = VOUT = 12V LTC4367 LTC4367-1 l l VOL FAULT Output Voltage Low IFAULT = 500µA, VIN = 12V l IFAULT FAULT Leakage Current FAULT = 5V, VIN = 60V l UV, OV ±10 nA 1 2 µs 0.75 1.2 V ±15 nA 800 250 1200 500 µs µs 1.5 3 µs 32 0.3 48 0.6 ms ms SHDN 0.4 400 125 20 0.125 FAULT Note 1. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2. All currents into pins are positive; all voltages are referenced to GND unless otherwise noted. 0.15 0.4 V ±200 nA Note 3. These pins have a diode to GND. They may go below –0.3V if the current magnitude is limited to less than 1mA. Note 4. The GATE pin is referenced to VOUT and does not exceed 73V for the entire operating range. 4367fa 4 For more information www.linear.com/LTC4367 LTC4367 Typical Performance Characteristics VIN Operating Current vs Temperature 8 SHDN = 2.5V VIN = VOUT VIN = 60V VIN = 12V 20 VIN = 2.5V 0 –50 –25 4 2 10 0 25 50 75 TEMPERATURE (°C) 100 0 125 TA = 125°C TA = 70°C TA = 25°C TA = –45°C 0 10 4367 G01 VOUT Operating Current vs Temperature 50 SHDN = 2.5V VIN = VOUT 40 6 VOUT = 60V 5 VOUT = 2.5V 50 60 –2000 –50 TA = 125°C TA = 25°C TA = –45°C –25 0 25 VIN (V) 4367 G02 50 20 VOUT = 0V 4367 G03 15 3 VOUT = 12V 25°C 10 5 –25 100 –45°C 125°C 1 0 –50 75 VOUT Current vs Reverse VIN SHDN = 0V VIN = VOUT 2 10 0 25 50 75 TEMPERATURE (°C) 100 VOUT = 2.5V 0 –50 –25 0 25 50 75 TEMPERATURE (°C) 125 4367 G04 100 0 125 GATE Drive vs VIN Supply Voltage 12 IGATE = 1µA VIN = VOUT = 60V 12 –20 VIN (V) ∆VGATE (V) 9 VIN = VOUT = 12V 10 –30 –40 4367 G06 TA = 125°C TA = 25°C TA = –45°C 8 VIN = VOUT = 12V ∆VGATE (V) 12 8 –10 GATE Drive vs GATE Current GATE Drive vs Temperature 15 VIN = VOUT 0 4367 G05 VOUT = 0V ∆VGATE (V) 40 –1500 VOUT = 60V IVOUT (µA) IVOUT (µA) 30 VIN (V) –1000 4 30 16 20 –500 VOUT Shutdown Current vs Temperature VOUT = 12V 20 UV = SHDN = 0V VOUT = 0V 0 IVIN (µA) 30 500 SHDN = 0V VIN = VOUT 6 IVIN (µA) IVIN (µA) 40 VIN Supply Current vs Voltage (–40V to 100V) IVOUT (µA) 50 VIN Shutdown Current vs Voltage 6 6 4 4 0 TA = 25°C IGATE = –1µA 0 10 20 30 VIN (V) 40 50 60 4367 G07 3 VIN = VOUT = 2.5V 0 –50 –25 0 25 50 75 TEMPERATURE (°C) 2 100 125 4367 G08 0 0 –10 –20 –30 –40 IGATE(UP) (µA) –50 –60 4367 G09 4367fa For more information www.linear.com/LTC4367 5 LTC4367 Typical Performance Characteristics 508 UV Threshold vs Temperature 508 OV Threshold vs Temperature VIN = VOUT = 12V 6 500 496 ILEAK (nA) VOV (mV) 504 500 496 492 –50 –25 0 25 50 75 TEMPERATURE (°C) 100 125 4 SHDN = 60V 2 0 492 –50 –25 0 25 50 75 TEMPERATURE (°C) 100 4367 G10 UV/OV = 0.5V –2 –50 125 –25 0 25 50 75 TEMPERATURE (°C) 50 VIN = VOUT = 12V TA = 25°C 40 50 Recovery Delay Time vs Temperature 40 LTC4367 GATE Turn-On Delay Time vs VIN 40 10 0 30 VIN = 12V, 60V 20 VIN = 2.5V 10 1 10 100 OVERDRIVE (mV) 1k 0 –50 –25 GND 20 0 25 50 75 TEMPERATURE (°C) 100 125 0 Turn-On Timing VOUT VOUT 5ms/DIV 4367 G16 20 3V/DIV 30 VIN (V) 40 50 60 4367 G15 GATE DUAL Si7942 MOSFET 100µF, 12Ω LOAD VIN = 12V VOUT GND DUAL Si7942 1k, 10µF LOAD ON VOUT 10 5V/DIV 5V/DIV GATE 0 Turn-Off Timing GATE VIN TA = 25°C 4367 G14 LTC4367 AC Blocking 20V/DIV 30 TA = –45°C 10 4367 G13 1V/DIV GND t D(ON) (ms) t D(ON) (ms) t FAULT (µs) TA = 125°C 20 125 4367 G12 LTC4367 GATE Turn-On Delay Time vs Temperature 30 100 4367 G11 UV/OV Propagation Delay vs Overdrive 50 VIN = VOUT = 60V VIN = VOUT = 12V 504 VUV (mV) 8 UV/OV/SHDN Leakage vs Temperature VIN = 12V DUAL Si7942 MOSFET 100µF, 12Ω LOAD GND 3V/DIV SHDN 400µs/DIV 4367 G17 SHDN 400µs/DIV 4367 G18 4367fa 6 For more information www.linear.com/LTC4367 LTC4367 Pin Functions Exposed Pad: The exposed pad may be left open or connected to device ground. FAULT: Fault Indication Output. This high voltage open drain output is pulled low if UV is below its monitor threshold, if OV is above its monitor threshold, if SHDN is low, or if VIN has not risen above VIN(UVLO). GATE: Gate Drive Output for External N-channel MOSFETs. An internal charge pump provides 35µA of pull-up current and up to 13.1V of enhancement to the gate of an external N-channel MOSFET. When turned off, GATE is pulled just below the lower of VIN or VOUT. When VIN goes negative, GATE is automatically connected to VIN. GND: Device Ground. OV: Overvoltage Comparator Input. Connect this pin to an external resistive divider to set the desired VIN overvoltage fault threshold. This input connects to an accurate, fast (1µs) comparator with a 0.5V rising threshold and 25mV of hysteresis. When OV rises above its threshold, a 60mA current sink pulls down on the GATE output. When OV falls back below 0.475V, and after a 32ms GATE turn-on delay waiting period (500µs for LTC4367-1), the GATE charge pump is enabled. The low leakage current of the OV input allows the use of large valued resistors for the external resistive divider. Connect to GND if unused. If the voltage at the OV pin can rise above 5V, place a low leakage Zener clamp on the OV pin. SHDN: Shutdown Control Input. SHDN high enables the GATE charge pump which in turn enhances the gate of an external N-channel MOSFET. A low on SHDN generates a pull down on the GATE output with a 90µA current sink and places the LTC4367 in low current mode (5µA). If unused, connect to VIN with a 510k resistor. If VIN goes above 80V, the SHDN pin voltage must be kept below 80V (see Applications Information). UV: Undervoltage Comparator Input. Connect this pin to an external resistive divider to set the desired VIN undervoltage fault threshold. This input connects to an accurate, fast (1µs) comparator with a 0.5V falling threshold and 25mV of hysteresis. When UV falls below its threshold, a 60mA current sink pulls down on the GATE output. When UV rises back above 0.525V, and after a 32ms GATE turnon delay waiting period (500µs for LTC4367-1), the GATE charge pump is enabled. The low leakage current of the UV input allows the use of large valued resistors for the external resistive divider. If unused and VIN is less than 80V, connect to VIN with a 510k resistor. VIN: Power Supply Input. Maximum protection range: –40V to 100V. Operating range: 2.5V to 60V. VOUT: Output Voltage Sense Input. This pin senses the voltage at the output side of the external N-channel MOSFET. The GATE charge pump voltage is referenced to VOUT. It is used as the charge pump input when VOUT is greater than approximately 5V. 4367fa For more information www.linear.com/LTC4367 7 LTC4367 Block Diagram REVERSE PROTECTION VIN –40V TO 100V GATE – + CLOSES SWITCH WHEN VIN IS NEGATIVE 5V INTERNAL SUPPLY LDO 5V INTERNAL SUPPLY VOUT ENABLE 2.2V UVLO UV 0.5V OV 0.5V SHDN DELAY TIMERS IGATE 35µA FAULT OFF TURN OFF SHDN LOGIC – + + GATE CHARGE PUMP f = 400kHz 60mA 25mV HYSTERESIS 90µA FAULT GATE PULLDOWN – GND 4367 BD 4367fa 8 For more information www.linear.com/LTC4367 LTC4367 Operation Many of today’s electronic systems get their power from external sources such as AC or wall adaptors, batteries and custom power supplies. Figure 1 shows a supply arrangement using a DC barrel connector. Power is supplied by an AC adaptor or, if the plug is withdrawn, by a removable battery. Note that the polarity of the AC adaptor and barrel connector varies by manufacturer. Trouble arises when any of the following occurs: • The battery is installed backwards • An AC adaptor of opposite polarity is attached • An AC adaptor of excessive voltage is attached • The battery is discharged below a safe level This can lead to supply voltages that are too high, too low, or even negative. If these power sources are applied directly to the electronic systems, the systems could be subject to damage. The LTC4367 is an input voltage fault protection N-channel MOSFET controller. The part isolates an input supply from its load to protect the load from unexpected supply voltage conditions, while providing a low loss path for qualified power. In the past, to protect electronic systems from improperly connected power supplies, system designers often added discrete diodes, transistors and high voltage comparators. The high voltage comparators enable system power only if the input supply falls within a desired voltage window. A Schottky diode or P-channel MOSFET typically added in series with the supply protects against reverse supply connections. The LTC4367 provides accurate overvoltage and undervoltage comparators to ensure that power is applied to the system only if the input supply meets the user selectable voltage window. Reverse supply protection circuits automatically isolate the load from negative input voltages. During normal operation, a high voltage charge pump enhances the gate of external N-channel power MOSFETs. Power consumption is 5µA during shutdown and 70µA while operating. The LTC4367 integrates all these functions in 8-lead MSOP and 3mm × 3mm DFN packages. –40V TO 100V PROTECTION RANGE AC ADAPTOR INPUT + M1 M2 BATTERY LOAD CIRCUIT – GATE VIN VOUT LTC4367 R4 SHDN OV, UV PROTECTION THRESHOLDS SET TO SATISFY LOAD CIRCUIT FAULT R3 UV R2 OV R1 2.5V TO 60V OPERATING RANGE GND 4367 F01 Figure 1. Polarity Protection for DC Barrel Connectors 4367fa For more information www.linear.com/LTC4367 9 LTC4367 Applications Information The LTC4367 is an N-channel MOSFET controller that protects a load from faulty supply connections. A basic application circuit using the LTC4367 is shown in Figure 2 The circuit provides a low loss connection from VIN to VOUT as long as the voltage at VIN is between 3.5V and 18V. Voltages at VIN outside of the 3.5V to 18V range are prevented from getting to the load and can be as high as 100V and as low as –40V. The circuit of Figure 2 protects against negative voltages at VIN as shown. No other external components are needed. During normal operation, the LTC4367 provides up to 13.1V of gate enhancement to the external back-to-back N-channel MOSFETs. This turns on the MOSFETs, thus connecting the load at VOUT to the supply at VIN. Si7942 100V DUAL VIN 12V NOMINAL M1 M2 VIN R4 453k GATE + VOUT 3.5V TO 18V COUT 100µF GATE Drive The LTC4367 turns on the external N-channel MOSFETs by driving the GATE pin above VOUT. The voltage difference between the GATE and VOUT pins (gate drive) is a function of VIN and VOUT. Figure 3 highlights the dependence of the gate drive on VIN and VOUT. When system power is first turned on (SHDN low to high, VOUT = 0V), gate drive is at a maximum for all values of VIN. This helps prevent start-up problems into heavy loads by ensuring that there is enough gate drive to support the load. As VOUT ramps up from 0V, the absolute value of the GATE voltage remains fixed until VOUT is greater than the lower of (VIN – 1V) or 5V. Once VOUT crosses this threshold, gate drive begins to increase up to a maximum of 13.1V (for VIN ≥ 12V). The curves of Figure 3 were taken with a GATE load of –1µA. If there were no load on GATE, the gate drive for each VIN would be slightly higher. Note that when VIN is at the lower end of the operating range, the external N-channel MOSFET must be selected with a corresponding lower threshold voltage. VOUT LTC4367 SHDN R3 1370k 14 UV R2 243k VIN = 60V 10 OV R1 59k TA = 25°C IGATE = –1µA 12 GND ∆VGATE (V) OV = 18V UV = 3.5V FAULT 4367 F02 Figure 2. LTC4367 Protects Load from –40V to 100V VIN Faults VIN = 12V 8 VIN = 5V 6 VIN = 3.3V 4 VIN = 2.5V 2 0 0 5 10 VOUT (V) 15 4367 F03 Figure 3. Gate Drive (GATE – VOUT) vs VOUT 4367fa 10 For more information www.linear.com/LTC4367 LTC4367 Applications Information Table 1 lists some external MOSFETs compatible with different VIN supply voltages. Table 1. Dual MOSFETs for Various Supply Ranges VIN MOSFET VTH(MAX) VGS(MAX) VDS(MAX) RDS(ON) (Ω) 2.5V SiA920 0.7V 5V 8V 0.027 3.3V SiA910 1.0V 8V 12V 0.028 3.3V Si6926 1.0V 8V 20V 0.030 5V SiA906 1.4V 12V 20V 0.046 5V Si9926 1.5V 12V 20V 0.018 >12V SiZ340 2.4V 20V 30V 0.010 >12V Si4288 2.5V 20V 40V 0.020 >12V Si7220 3V 20V 60V 0.060 >12V Si4946 3V 20V 60V 0.040 >12V FDS3890 4V 20V 80V 0.044 >12V Si7942 4V 20V 100V 0.049 >12V FDS3992 4V 20V 100V 0.054 >12V Si7956 4V 20V 150V 0.105 12V LTC4367 UV COMPARATOR R3 1820k UV R2 243k 0.5V R1 59k – + 25mV OV COMPARATOR OV OV = 18V The LTC4367 provides two accurate comparators to monitor for overvoltage (OV) and undervoltage (UV) conditions at VIN. If the input supply rises above the user adjustable OV threshold, the gate of the external MOSFET is quickly turned off, thus disconnecting the load from the input. Similarly, if the input supply falls below the user adjustable UV threshold, the gate of the external MOSFET also is quickly turned off. Figure 4 shows a UV/OV application for an input supply of 12V. The external resistive divider allows the user to select an input supply range that is compatible with the load at VOUT. Furthermore, the UV and OV inputs have very low leakage currents (typically < 1nA at 100°C), allowing for large values in the external resistive divider. In the application of Figure 4, the load is connected to the supply only if VIN lies between 3.5V and 18V. In the event that VIN goes above 18V or below 3.5V, the gate of the external N-channel MOSFET is immediately discharged with a 60mA current sink, thus isolating the load from the supply. VIN UV = 3.5V Overvoltage and Undervoltage Protection DISCHARGE GATE WITH 60mA SINK + 25mV 0.5V – 4367 F04 Figure 4. UV, OV Comparators Monitor 12V Supply 4367fa For more information www.linear.com/LTC4367 11 LTC4367 Applications Information Figure 5 shows the timing associated with the UV pin. Once a UV fault propagates through the UV comparator (tFAULT), the FAULT output is asserted low and a 60mA current sink discharges the GATE pin. As VOUT falls, the GATE pin tracks VOUT. VUV UV The following 3-step procedure helps select the resistor values for the resistive divider of Figure 4. This procedure minimizes UV and OV offset errors caused by leakage currents at the respective pins. 1.Choose maximum tolerable offset error at the UV pin, VOS(UV). Divide by the worst case leakage current at the UV pin, ILEAK (10nA). Set the sum of R1 + R2 equal to VOS(UV) divided by 10nA. Note that due to the presence of R3, the actual offset at UV will be slightly lower: VUV + VUVHYST tFAULT FAULT tGATE(FAST) Procedure for Selecting UV/OV External Resistor Values tD(ON) EXTERNAL N-CHANNEL MOSFETS TURN OFF GATE R1+ R2 ≤ 4367 F05 Figure 5. UV Timing (OV < (VOV – VOVHYST), SHDN > 1.2V) Figure 6 shows the timing associated with the OV pin. Once an OV fault propagates through the OV comparator (tFAULT), the FAULT output is asserted low and a 60mA current sink discharges the GATE pin. As VOUT falls, the GATE pin tracks VOUT. VOV OV I LEAK R1 = VOS(UV) I + R3 LEAK OV TH EXTERNAL N-CHANNEL MOSFET TURNS OFF 4367 F06 Figure 6. OV Timing (UV > (VUV + VUVHYST), SHDN > 1.2V) When both the UV and OV faults are removed, the external MOSFET is not immediately turned on. The input supply must remain within the user selected power good window for at least 32ms (tD(ON)) before the load is again connected to the supply. This GATE turn-on delay period filters noise (including line noise) at the input supply and prevents chattering of power at the load. For applications that require faster turn-on after a fault, the LTC4367-1 provides a 500µs GATE turn-on delay. UV TH – 0.5V • 0.5V 3.Select the desired VIN OV trip threshold, OVTH. Find the values of R1 and R2: FAULT GATE VOS(UV) R3 = VOV – VOVHYST tD(ON) I LEAK 2.Select the desired VIN UV trip threshold, UVTH. Find the value of R3: tFAULT tGATE(FAST) VOS(UV) R2 = VOS(UV) ILEAK • 0.5V – R1 The example of Figure 4 uses standard 1% resistor values. The following parameters were selected: VOS(UV) = 3mV ILEAK = 10nA UVTH = 3.5V OVTH = 18V 4367fa 12 For more information www.linear.com/LTC4367 LTC4367 Applications Information As shown in Figure 7, external back-to-back N-channel MOSFETs are required for reverse supply protection. When VIN goes negative, the reverse VIN comparator closes the internal switch, which in turn connects the gates of the external MOSFETs to the negative VIN voltage. The body diode (D1) of M1 turns on, but the body diode (D2) of M2 remains in reverse blocking mode. This means that the common source connection of M1 and M2 remains about a diode drop higher than VIN. Since the gate voltage of M2 is shorted to VIN, M2 will be turned off and no current can flow from VIN to the load at VOUT. Note that the voltage rating of M2 must withstand the reverse voltage excursion at VIN. The resistor values can then be solved: 1. R1+ R2 = 2. R3 = 3mV = 300k 10nA 3mV ( 3.5V – 0.5V ) • = 1.8M 10nA 0.5V The closest 1% value: R3 = 1.82M: 3. R1 = 300k + 1.82M = 58.9k 2 • 18V The closest 1% value: R1 = 59k: R2 = 300k – 59k = 241k The closest 1% value: R2 = 243k Therefore: OV = 17.93V, UV = 3.51V. Reverse VIN Protection The LTC4367’s rugged and hot-swappable VIN input helps protect the more sensitive circuits at the output load. If the input supply is plugged in backwards, or a negative supply is inadvertently connected, the LTC4367 prevents this negative voltage from passing to the output load. The LTC4367 employs a novel, high speed reverse supply voltage monitor. When the negative VIN voltage is detected, an internal switch connects the gates of the external backto-back N-channel MOSFETs to the negative input supply. VIN = –40V D1 D2 M1 M2 + TO LOAD Figure 8 illustrates the waveforms that result when VIN is hot plugged to –20V. VIN, GATE and VOUT start out at ground just before the connection is made. Due to the parasitic inductance of the VIN and GATE connections, the voltage at the VIN and GATE pins ring significantly below –20V. Therefore, a 40V N-channel MOSFET was selected to survive the overshoot. The speed of the LTC4367 reverse protection circuits is evident by how closely the GATE pin follows VIN during the negative transients. The two waveforms are almost indistinguishable on the scale shown. The trace at VOUT, on the other hand, does not respond to the negative voltage at VIN, demonstrating the desired reverse supply protection. The waveforms of Figure 8 were captured using a 40V dual N-channel MOSFET, a 10µF ceramic output capacitor and no load current on VOUT. GND VOUT COUT 5V/DIV VIN GATE VOUT VIN –20V LTC4367 GATE REVERSE VIN COMPARATOR – GND + CLOSES SWITCH WHEN VIN IS NEGATIVE 400ns/DIV 4367 F08 4367 F07 Figure 7. Reverse VIN Protection Circuits Figure 8. Hot Swapping VIN to –20V 4367fa For more information www.linear.com/LTC4367 13 LTC4367 Applications Information GATE Turn-On Delay Timer The LTC4367 has a GATE turn-on delay timer that filters noise at VIN and helps prevent chatter at VOUT. After either an OV or UV fault has occurred, the input supply must return to the desired operating voltage window for at least 32ms (tD(ON)) in order to turn the external MOSFET back on as illustrated in Figure 5 and Figure 6. For applications that require faster turn-on after a fault, the LTC4367-1 provides a 500µs GATE turn-on delay. further decrease GATE pin slew rate, place a capacitor across the gate and source terminals of the external MOSFETs. The waveforms of Figure 10 were captured using the Si7942 dual N-channel MOSFETs, and a 2A load with 100µF output capacitor. VOUT Going out of and then back into fault in less than tD(ON) will keep the MOSFET off continuously. Similarly, coming out of shutdown (SHDN low to high) triggers an 800µs start-up delay timer (see Figure 11). The GATE turn-on delay timer is also active while the part is powering up. The timer starts once VIN rises above VIN(UVLO) and VIN lies within the user selectable UV/OV power good window. See Figure 9. tD(ON) GATE MOSFET OFF 5V/DIV SHDN GND 4367 F10 400µs/DIV Figure 10. Shutdown: GATE Tracks VOUT as VOUT Decays FAULT Status The FAULT high voltage open drain output is driven low if SHDN is asserted low, if VIN is outside the desired UV/OV voltage window, or if VIN has not risen above VIN(UVLO). Figure 5, Figure 6 and Figure 11 show the FAULT output timing. VIN(UVLO) VIN 100µF, 6Ω LOAD ON VOUT DUAL Si7942 MOSFET VIN = 12V GATE MOSFET ON 4367 F09 SHDN Figure 9. GATE Turn-On Delay Timing During Power-On (OV = GND, UV = SHDN = VIN) tGATE(SLOW) GATE Shutdown tSTART ∆VGATE GATE = VOUT The SHDN input turns off the external MOSFETs in a controlled manner. When SHDN is asserted low, a 90µA current sink slowly begins to turn off the external MOSFETs. Once the voltage at the GATE pin falls below the voltage at the VOUT pin, the current sink is throttled back and a feedback loop takes over. This loop forces the GATE voltage to track VOUT, thus keeping the external MOSFETs off as VOUT decays. Note that when VOUT < 2.2V, the GATE pin is pulled to within 400mV of ground. Weak gate turn off reduces load current slew rates and mitigates voltage spikes due to parasitic inductances. To VOUT tSHDN(F) FAULT 4367 F11 Figure 11. Shutdown Timing Select Between Two Input Supplies With the part in shutdown, the VIN and VOUT pins can be driven by separate power supplies. The LTC4367 then automatically drives the GATE pin just below the lower of 4367fa 14 For more information www.linear.com/LTC4367 LTC4367 Applications Information the two supplies, thus turning off the external back-to-back MOSFETs. The application of Figure 12 uses two LTC4367s to select between two power supplies. Care should be taken to ensure that only one of the two LTC4367s is enabled at any given time. V1 M1 Limiting Inrush Current During Turn-On The LTC4367 turns on the external N-channel MOSFET with a 35µA current source. The maximum slew rate at the GATE pin can be reduced by adding a capacitor on the GATE pin: M2 Slew Rate = GATE VIN VOUT LTC4367 OUT SHDN V2 Since the MOSFET acts like a source follower, the slew rate at VOUT equals the slew rate at GATE. Therefore, inrush current is given by: SEL OUT 0 V1 1 V2 M1 M2 GATE VIN IINRUSH = COUT • 35µA CGATE For example, a 1A inrush current to a 330µF output capacitance requires a GATE capacitance of: VOUT LTC4367 SHDN SEL 35µA CGATE 4367 F12 CGATE = 35µA • COUT IINRUSH CGATE = 35µA • 330µF = 11.6nF 1A Figure 12. Selecting One of Two Supplies Single MOSFET Application When reverse VIN protection is not needed, a single external N-channel MOSFET may be used. The application circuit of Figure 13 connects the load to VIN when VIN is less than 30V, and uses the minimal set of external components. The 12nF CGATE capacitor in the application circuit of Figure 14 limits the inrush current to just under 1A. RGATE makes sure that CGATE does not affect the fast GATE turn off characteristics during UV/OV faults, or during reverse VIN connection. R5A and R5B help prevent high frequency oscillations with the external N-channel MOSFET and related board parasitics. SiR870 100V VIN 24V + R4 499k GATE VIN VOUT COUT 100µF VOUT M1 VIN + LTC4367 R5A 10Ω SHDN R2 1870k OV = 30V R5B 10Ω FAULT UV VIN OV R1 40.2k M2 GATE VOUT COUT 330µF RGATE 5.1k VOUT CGATE 12nF LTC4367 GND 4367 F13 4367 F14 Figure 13. Single MOSFET Application Protects Against 100V Figure 14. Limiting Inrush Current with CGATE 4367fa For more information www.linear.com/LTC4367 15 LTC4367 Applications Information Transients During OV Fault pacitance at the VIN node. D1 is an optional power clamp (TVS, TransZorb) recommended for applications where VIN can ring above 100V. No clamp was used to capture the waveforms of Figure 16. In order to maintain reverse supply protection, D1 must be a bidirectional clamp rated for at least 225W peak pulse power dissipation. The circuit of Figure 15 is used to display transients during an overvoltage condition. The nominal input supply is 48V and it has an overvoltage threshold of 60V. The parasitic inductance is that of a 1 foot wire (roughly 300nH). Figure 16 shows the waveforms during an overvoltage condition at VIN. These transients depend on the parasitic inductance and resistance of the wire along with the ca- VIN 48V 12 INCH WIRE LENGTH + Si7942 100V DUAL CIN 1000µF M1 R4 523k D1 OPTIONAL VOUT M2 GATE VIN + COUT 100µF 22Ω VOUT LTC4367 SHDN UV FAULT R2 2430k OV = 60V OV R1 20.5k GND 4367 F15 Figure 15. OV Fault with Large VIN Inductance GATE VOUT 20V/DIV 60V VIN 20V/DIV 60V IIN 2A/DIV 400ns/DIV 4367 F16 0A Figure 16. Transients During OV Fault When No TransZorb (TVS) Is Used 4367fa 16 For more information www.linear.com/LTC4367 LTC4367 Applications Information Regulator Applications from the parasitic inductance of the VIN connector. See Transient During 0V Fault section for more details. Hysteretic Regulator Built-in hysteresis and the availability of both inverting and noninverting control inputs (OV and UV) facilitate the design of hysteretic regulators. Figure 17 shows how the LTC4367-1 can protect a load from OV transients, while regulating the output voltage at a user-defined level. When the output voltage reaches its OV limit, the LTC4367-1 turns off the external MOSFETs. The load current then discharges the output capacitance until OV falls below the hysteresis voltage. The external MOSFETs are turned back on after a 500µs delay. Figure 18 shows the waveforms for the circuit of Figure 17. The voltage spikes on VIN result Solar Charger Figure 19 shows a series regulator for a solar charger. The LTC4367-1 connects the solar charger to the battery when the battery voltage falls below 13.9V (after a 500µs delay). Conversely, when the battery reaches 14.6V, the LTC4367-1 immediately (2µs) opens the charging path. Regulation of the battery voltage is achieved by connecting a resistive divider from the battery to the accurate OV comparator input (with 5% hysteresis). The fast rising response of the OV comparator prevents the battery voltage from rising above the user-selected threshold. Si4946 DUAL VIN + R7 1Ω OPTIONAL SNUBBER 1µF R4 510k GATE VIN UV VIN VOUT RLOAD 100Ω CLOAD 47µF 5V/DIV VOUT VOUT LTC4367-1 R2 1820k FAULT SHDN GND OV R1 59k GND 4367 F17 COV 220pF 1ms/DIV Figure 17. Hysteretic Regulation of VOUT During OV Transients 15W SOLAR PANEL Figure 18. VOUT Regulates at 16V When VIN Rises Above Desired Level 1/2 OF Si4214 D1 D4 B130 1/2 OF Si4214 D2 M1 M2 + CBYP 100nF SHDN UV VOUT GATE 4367 F18 TO LOAD CBATT 100µF 12V, 8Ah GELCELL VIN R2 3.24M LTC4367-1 OV GND R1 115k 14.6V OFF 13.9V ON COV 220pF 4367 F19 Figure 19. Series Hysteretic Solar Charger with Reverse-Battery and Solar Panel Protection 4367fa For more information www.linear.com/LTC4367 17 LTC4367 Applications Information Note that during initial start-up, the LTC4367-1 will not turn on the external MOSFETs until a battery is first connected to the VIN pin. To begin operation, VIN must initially rise above the 2.2V UVLO lockout voltage. Connecting the battery ensures that the LTC4367-1 comes out of UVLO. handling capability, drain and gate breakdown voltages, and threshold voltage. The drain to source breakdown voltage must be higher than the maximum voltage expected between VIN and VOUT. Note that if an application generates high energy transients during normal operation or during hot swap, the external MOSFET must be able to withstand this transient voltage. 12V Application with 150V Transient Protection Figure 20 shows a 12V application that withstands input supply transients up to 150V. When the input voltage exceeds 17.9V, the OV resistive divider turns off the external MOSFETs. As VIN rises to 150V, the gate of transistor M1 remains in the Off condition, thus preventing conduction from VIN to VOUT. Note that M1 must have an operating range above 150V. Due to the high impedance nature of the charge pump that drives the GATE pin, the total leakage on the GATE pin must be kept low. The gate drive curves of Figure 3 were measured with a 1µA load on the GATE pin. Therefore, the leakage on the GATE pin must be no greater than 1µA in order to match the curves of Figure 3. Higher leakage currents will result in lower gate drive. The dual N-channel MOSFETs shown in Table 1 all have a maximum gate leakage current of 100nA. Additionally, Table 1 lists representative MOSFETs that would work at different values of VIN. Resistor R6 and diode D3 clamp the LTC4367 supply voltage to 50V. To prevent R6 from interfering with reverse operation, the recommended value is 1k or less. Note that the power handling capability of R6 must be considered in order to avoid overheating during transients. D3 is shown as a bidirectional clamp in order to achieve reverse-polarity protection at VIN. M2 is also required in order to protect VOUT from negative voltages at VIN and should have an operating range beyond the breakdown of D3. If reverse protection is not desired remove M2 and connect the source of M1 directly to VOUT. Layout Considerations The trace length between the VIN pin and the drain of the external MOSFET should be minimized, as well as the trace length between the GATE pin of the LTC4367 and the gates of the external MOSFETs. Place the bypass capacitors at VOUT as close as possible to the external MOSFET. Use high frequency ceramic capacitors in addition to bulk capacitors to mitigate hot swap ringing. Place the high frequency capacitors closest to the MOSFET. Note that bulk capacitors mitigate ringing by virtue of their ESR. Ceramic capacitors have low ESR and can thus ring near their resonant frequency. MOSFET Selection To protect against a negative voltage at VIN, the external N-channel MOSFETs must be configured in a back-toback arrangement. Dual N-channel packages are thus the best choice. The MOSFET is selected based on its power M1 M2 FDD2572 FDS5680 VIN 12V VOUT R6 1k R2 2050k OV = 17.9V D3: SMAJ43CA BI-DIRECTIONAL D3 R4 510k GATE VIN SHDN UV FAULT OV R1 59k VOUT LTC4367 GND 4367 F20 Figure 20. 12V Application Protected from 150V Transients 4367fa 18 For more information www.linear.com/LTC4367 LTC4367 Package Description Please refer to http://www.linear.com/product/LTC4367#packaging for the most recent package drawings. MS8 Package 8-Lead Plastic MSOP (Reference LTC DWG # 05-08-1660 Rev G) 0.889 ±0.127 (.035 ±.005) 5.10 (.201) MIN 3.20 – 3.45 (.126 – .136) 3.00 ±0.102 (.118 ±.004) (NOTE 3) 0.65 (.0256) BSC 0.42 ± 0.038 (.0165 ±.0015) TYP 8 7 6 5 0.52 (.0205) REF RECOMMENDED SOLDER PAD LAYOUT 0.254 (.010) 3.00 ±0.102 (.118 ±.004) (NOTE 4) 4.90 ±0.152 (.193 ±.006) DETAIL “A” 0° – 6° TYP GAUGE PLANE 0.53 ±0.152 (.021 ±.006) DETAIL “A” 1 2 3 4 1.10 (.043) MAX 0.86 (.034) REF 0.18 (.007) SEATING PLANE 0.22 – 0.38 (.009 – .015) TYP 0.65 (.0256) BSC 0.1016 ±0.0508 (.004 ±.002) MSOP (MS8) 0213 REV G NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 4367fa For more information www.linear.com/LTC4367 19 LTC4367 Package Description Please refer to http://www.linear.com/product/LTC4367#packaging for the most recent package drawings. DD Package 8-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1698 Rev C) 0.70 ±0.05 3.5 ±0.05 1.65 ±0.05 2.10 ±0.05 (2 SIDES) PACKAGE OUTLINE 0.25 ±0.05 0.50 BSC 2.38 ±0.05 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED PIN 1 TOP MARK (NOTE 6) 0.200 REF 3.00 ±0.10 (4 SIDES) R = 0.125 TYP 5 0.40 ±0.10 8 1.65 ±0.10 (2 SIDES) 0.75 ±0.05 4 0.25 ±0.05 1 (DD8) DFN 0509 REV C 0.50 BSC 2.38 ±0.10 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON TOP AND BOTTOM OF PACKAGE 4367fa 20 For more information www.linear.com/LTC4367 LTC4367 Revision History REV DATE DESCRIPTION PAGE NUMBER A 03/16 Updated Typical Application and Figures 1, 2, 13, 15 1, 9, 10, 15, 16 Updated SHDN, UV input current rating 2 Changed ISHDN test condition to 10V from 0.75V 4 Updated graphs G09 and G12 Updated SHDN and UV Pin Functions 5, 6 7 4367fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representaFor more information www.linear.com/LTC4367 tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. 21 LTC4367 Typical Application LTC4367 Protects Step Down Regulator from –30V to 30V VIN Faults Si4214 30V DUAL N-CHANNEL VIN 12V NOMINAL VOUT OUTPUT 5V 3.5A 10µF VOUT PROTECTED FROM –30V TO 30V VIN GATE VIN VOUT LTC4367 510k 15k 680pF SHDN 1820k UV FAULT 63.4k 243k OV = 18V UV = 3.5V BD RUN/SS BOOST LT1913 VC 0.47µF 4.7µH SW RT PG FB SYNC GND 536k 100k 47µF OV 4367 TA02 GND 59k Related Parts PART NUMBER DESCRIPTION COMMENTS LTC4365 Overvoltage, Undervoltage and Reverse Supply Protection Controller Wide Operating Range: 2.5V to 34V, Protection Range: –40V to 60V, No TVS Required for Most Applications LT4363 Surge Stopper Overvoltage/Overcurrent Protection Regulator Wide Operating Range: 4V to 80V, Reverse Protection to –60V, Adjustable Output Clamp Voltage LTC4364 Surge Stopper with Ideal Diode 4V to 80V Operation, –40V Reverse Input, –20V Reverse Output LTC4366 Floating Surge Stopper 9V to >500V Operation, 8-Pin TSOT and 3mm × 2mm DFN Packages LTC4361 Overvoltage/Overcurrent Protection Controllers 5.8V Overvoltage Threshold, 85V Absolute Maximum LTC2909 Triple/Dual Inputs UV/OV Negative Monitor Pin Selectable Input Polarity Allows Negative and OV Monitoring LTC2912/LTC2913 Single/Dual UV/OV Voltage Monitor Adjustable UV and OV Trip Values, ±1.5% Threshold Accuracy LTC2914 Quad UV/OV Monitor For Positive and Negative Supplies LTC2955 Pushbutton On/Off Controller Automatic Turn-On, 1.5V to 36V Input, ±36V PB Input LT4256 Positive 48V Hot Swap Controller with Open-Circuit Detect Foldback Current Limiting, Open-Circuit and Overcurrent Fault Output, Up to 80V Supply LTC4260 Positive High Voltage Hot Swap Controller with ADC and I2C Wide Operating Range 8.5V to 80V LTC4352 Ideal MOSFET ORing Diode External N-Channel MOSFETs Replace ORing Diodes, 0V to 18V LTC4354 Negative Voltage Diode-OR Controller Controls Two N-Channel MOSFETs, 1.2µs Turn-Off, –80V Operation LTC4355 Positive Voltage Diode-OR Controller Controls Two N-Channel MOSFETs, 0.4µs Turn-Off, 80V Operation LT1913 Step-Down Switching Regulator 3.6V to 25V Input, 3.5A Maximum Current, 200kHz to 2.4MHz 4367fa 22 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 For more information www.linear.com/LTC4367 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LTC4367 LT 0316 REV A • PRINTED IN USA LINEAR TECHNOLOGY CORPORATION 2015