AP9155FLX: Rad-Hard, 10 Amp, POL Switching Regulator

Model # AP9155FLX
Rad-Hard Single 10 Amp Point-of-Load Regulator
POL Switching Regulators Manufactured in a Certified Class-K Facility
Features
• Smallest Footprint in the Space Industry at this
Efficiency Level (Note 1)
• Current Mode Control
• Single 10 Amp product (derated value)
• Output Voltage adjustable
between <1V and 3.6 V
• Rad-Hard to >100 krad TID
• Parallelable
• SE Results Show no Significant Output Transients
through an LET of 90 MeV/(mg/cm2)
• Synchronizable
• Enable Function Included
• Optimized for 5 V Input
• Operates at a Nominal Frequency of 1 MHz
• Operates Down to 4.6 V Input, and as High as 6 V.
• Efficiencies to 93% (See Table 5)
Description
The AP9155FLX by API Technologies is a non-isolated Point of Load switching regulator for high reliability military and
space distributed power applications. Fully integrated, these include a buck controller, inductor, and input/output
capacitors combined in a single package. They operate from an input voltage of 4.6 to 6.0 V, providing step down power
conversion to output voltages lower than 1 V, and up . Operating features include output voltage adjust, output current
limit, and enable. This feature enhanced model also offers external synchronization, parallelability, and soft start
functionality.
The parallel configuration increases output current capability and reduces ripple on the input and output supplies. Careful
design and layout ensure excellent stability, transient response, and low noise operation. Packaged in compact metal
cases, they operate over the full -55oC to 125oC temperature range. The AP915X series of Point of Load (POL) switching
regulators are more efficient than competitive POLs. (See Table 5.)
Table 1 – Absolute Maximum Ratings (Tc = +25oC Unless Otherwise Noted)
(Exceeding maximum ratings may damage the device.)
Symbol
Parameters / Test Conditions
Value
Unit
VIN
Input Voltage
6.5
VDC
IMAX
Enable Input
± 10
mA
IMAX
Sync Input Current
± 10
mA
10
Grams
Approximate Weight
Tj
Operating Temperature Range, Junction
-65 to +145
oC
TC
Operating Temperature Range, Base of Package
-55 to +125
oC
TSTG
Storage Temperature Range
-65 to +150
oC
RØJC
Internal Switches
Thermal Resistance, Junction-to-Case
oC/W
Note: For Mechanical and Packaging Information, see Figures 3 through 5 and Table 6. (4)
Rev Date: 6/12/2015
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Model # AP9155FLX
Table 2 – Electrical Characteristics (3)
(Ta= -55oC to +125oC Unless Otherwise Specified)
Min.
Value
Nom.
Max.
Minimum Input Voltage
4.6
--
--
V
VOUT
Output Voltage Accuracy Vo = 1.00 V
- 1.0
--
+ 1.0
%
VOUT
Post 100K Irradiation, 25oC
- 1.5
--
+ 1.5
%
Kvi
Line Regulation
4.6 < VIN < 6 V, 1 MHz
- 0.2
--
+ 0.2
%
Kvo
Load Regulation
0.5 < IOUT < 1A, 1 MHz
- 0.25
--
+ 0.25
%
FSYNC
Oscillator Frequency
750
--
1310
KHz
Current Limit Vo = 2.5 V
10
12
14
A
Input Voltage on Enable Pin to Guarantee Shutdown to Io = 0A (2)
2.2
--
--
V
Symbol
Parameters / Test Conditions
VIN (Min)
ICL
Vshdn
Unit
Notes:
1. At the time of publication of this datasheet, API Technologies/Marlborough did not have a MIL-PRF-38534 qualified radiation
hardness assurance program.
2. If not used, or when on, Enable pin should be pulled up to a logic one (2.0 V min, 6 V max) through a resistor of no more than 5 K
Ohms. Voltage on this pin to disable operation needs to be less than 1.45 V.
3. Testing is accomplished at an output load of 5 A, and an output Voltage of 2.5 V and an input of 5 V unless otherwise specified.
Only the specification with post irradiation limits are tested after radiation exposure.
4. All package outline dimensions are in inches.
5. Performed at a DLA approved facility.
6. Tested per MIL-PRF-38534
Table 3 - Screening Options
Screening Levels
Tests
H
Mil-Std-883Method
K
Compliant- MIL-PRF-38534
100 % Non-Destruct Wire-Pull
Sample
100%
2023
Pre-Cap Visual
N/A
100%
2017
Temperature Cycle
100%
100%
1010
Constant Acceleration
100%
100%
2001
PIND
N/A
100%
2020
Pre-Burn-In Electrical (Ta= 25 C)
100%
100%
Burn-In
100% (240 Hours)
100% (320 Hours)
1015
Final Electrical
100%
100%
(6)
Hermeticity (Fine & Gross Leak)
100%
100%
1014
N/A
100%
2012
100%
100%
2009
X-Ray
(5)
External Visual
Rev Date: 6/12/2015
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Model # AP9155FLX
Table 4 – Total Product-Line Series, Highlighting the 10A POL Model # AP9155FLX
AP915-----Series
Model
Options
Output
Current
1ALM*
2A
1FLX
2A
3CLY*
6A
3FLX
6A
5CLZ
10 A
5FLX*
10 A
Feature
Set
Package
Key
VoutVolts
Fixed or
Adjustable
Output
Operating
Input
Voltage
M
<1-3.6
Adjustable
4.6-6.0
X
<1-3.6
Adjustable
4.6-6.0
Y
<1-3.6
Adjustable
4.6-6.0
X
<1-3.6
Adjustable
4.6-6.0
Z
<1-3.6
Adjustable
4.6-6.0
X
<1-3.6
Adjustable
4.6-6.0
Minimal +
Low Voltage
Full, flat-Pack
pkg
Minimal +
Low Voltage
Full, flat-Pack
pkg
Minimal +
Low Voltage
Full, flat-Pack
pkg
* Models Currently Under Development
Ordering Information
AP915
POL Series
55
FL
Package Type
M = MO-078, 2 A pkg
Y = 6 Amp Package
Z = 10 A Package
X = Enhanced Flat Pack Package
Current Capability
1 = 2 Amps
3 = 6 Amps
5= 10 Amps
1
K
X
Screening Level
K = Class-K Compliant
H = Class-H Compliant
E = Engineering Model
Lead Bend Options
1 = Straight Leads (Fig 3)
2 = SMT Lead Bend (Fig 4)
3 = Right Angle Bend Down (Fig 5)
4 = Tabbed Package, straight leads (Fig. 6)
5 = Tabbed Package, SMT lead bend (Fig.7)
6 = Tabbed Package, Right Angle Leadbend (Fig. 8)
Model Options
A, B, etc., Evolutionary Series
F=Full Featured Series
------------L=Low Voltage Option
Example: A 10 Amp full featured low Voltage option POL in the Flat-Pack package, Class K,
straight leads has a Model Number of: AP9155FLXK1
Rev Date: 6/12/2015
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Model # AP9155FLX
Application Circuits, 10 AMP Product
Figure 1 – 10A POL Basic Power Connections. See Fig. 9 for small signal connections.
Figure 2 – Output Voltage Selection
For “L” series: Vo=0.5+0.5(Rset/10) (Resistance in k-Ohms)
Example: If Rset=15 k-Ohms, Vo=0.5+0.5(15/10)=1.25 V
Table 5 - Predicted Efficiency Chart
Rev Date: 6/12/2015
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Figure 3 – Tabless Straight Lead Package
Figure 4 – Tabless Package with Surface Mount Lead-Bend
Rev Date: 6/12/2015
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Figure 5 – Tabless Package with Right Angle Lead-Bend
Figure 6 – Straight Lead Package with Mounting Tabs
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Figure 7 – Surface Mount Package with Mounting Tabs
Figure 8 – Right Angle Lead Lead Package with Mounting Tabs
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Table 6 – Pin Assignments for 10A Full Featured Product
Pin No.
Pin Name
Pin Description
Comments
1-2, 7-14,
34-36
Vin
5 Volt Input
4.6 to 6 Volts
23-30
Vout
Output Voltage
<1 V to >3.6 V
15-22, 3133
P Gnd
Power Ground
40
A Gnd
Analog Ground
43
Adj
Output Adjust
44
EA in
Error Amp Input
41
Vref 1
1.0 V internal ref
42
Vref 2
0.5 V internal ref
37
En
Enable
38
Sync
Sync input
39
SS Cap
Soft Start Cap
8
Rsel
Connect to +5 V
5
P Good
V out is >=90%
3
Rset
N/C, test point
4
Sync out
Sync out to other chips
>2.2 V to Enable the output.
Rev Date: 6/12/2015
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Figure 9 – Signal Pin Identification and Low Power Connections, Stand Alone
Operation.
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Figure 10 – Connections for Sequenced Multiple Output
Voltage Startup(Note: Only the unique connections for this scheme are
shown. Basic power connections in Figure 1 as well as
applicable connections from Figure 9 must also be made.)
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Figure 11 – Connections for Concurrent Startup(Note: Only the unique connections for this scheme are
shown. Basic power connections in Figure 1 as well as
applicable connections from Figure 9 must also be made.)
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Figure 12 – Paralleling Connections
(Note: Only the unique connections for this
scheme are shown. Basic power connections in
Figure 1 as well as applicable connections from
Figure 9 must also be made.)
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Figure 13 – Connections for Ratiometric Startup(Note: Only the unique connections for this scheme are
shown. Basic power connections in Figure 1 as well as
applicable connections from Figure 9 must also be made.)
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