DS8086B 02

®
RT8086B
3.5A, 1.2MHz, Synchronous Step-Down Converter
General Description
Features
The RT8086B is a high efficiency, synchronous step-down
DC/DC converter. The available input voltage range is from
2.8V to 5.5V and the regulated output voltage is adjustable
from 0.6V to 3.3V while delivering up to 3.5A of output
current.

The internal synchronous low on-resistance power
switches increase efficiency and eliminate the need for
an external Schottky diode.
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The current mode constant on-time operation with internal
compensation allows the transient response to be
optimized over a wide range of loads and output capacitors.
TheRT8086B is available in the UQFN-12L 2x2 (FC)
package.
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Ordering Information
High Efficiency Up to 95%
Ω/40mΩ
Ω
Low RDS(ON) Switches : 50mΩ
0.6V Reference Allows for Low Output Voltage
Internal Compensation
Input Voltage Range : 2.8V to 5.5V
Adjustable Output Voltage from 0.6V to 3.3V
1.2MHz Switching Frequency
Start-Up into Pre-Biased Load
Built in Soft-Start
Power Good Indication
Cycle-by-Cycle Current Limit
Input Under Voltage Lockout
Output Under Voltage Protection (Hiccup)
Thermal Shutdown Protection
RoHS Compliant and Halogen Free
Applications
RT8086B
Package Type
QUF : UQFN-12L 2x2 (FC) (U-Type)
Lead Plating System
G : Green (Halogen Free and Pb Free)


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Smart Handheld devices
Portable Instruments
Battery-Powered Equipment
Distributed Power Systems
Note :
Richtek products are :

RoHS compliant and compatible with the current require-
Marking Information
0Y : Product Code
ments of IPC/JEDEC J-STD-020.

0YW
Suitable for use in SnPb or Pb-free soldering processes.
W : Date Code
Simplified Application Circuit
RT8086B
LX
PVIN
VIN
CIN
PGOOD
L
VOUT
VIN
PGOOD
COUT
VOUT
R1
Enable
EN
PGND
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DS8086B-02
February 2016
FB
AGND
R2
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RT8086B
Pin Configurations
(TOP VIEW)
VIN
PVIN
LX
PGND
AGND
10
1
2
3
4
LX
9
11
8
12
7
PGND
5
6
PGOOD
EN
FB
VOUT
NC
UQFN-12L 2x2 (FC)
Functional Pin Description
Pin No.
Pin Name
Pin Function
PVIN
Power Input. The available input voltage range is from 2.8V to 5.5V. A 10F or
larger input capacitor is needed to reduce voltage spikes at the input.
2, 11
LX
Switch Node. Output of the internal high side and low side MOSFETs.
3, 12
PGND
Power Ground.
4
AGND
Analog Ground.
5
NC
No Internal Connection.
6
VOUT
Sense Input Pin for Output Voltage.
7
FB
Feedback Input. This pin used to set the output voltage of the converter to
regulate to the desired value via an external resistive divider. The feedback
reference voltage is 0.6V typically.
8
EN
Enable Control Input. A logic-high (1.2V < EN < 5.5V) enables the converter; a
logic-low forces the IC into shutdown mode.
9
PGOOD
Power Good Indicator. The output of this pin is an open drain with internal pull-up
resister to VIN. The output of this pin is pulled to high when the FB voltage is
within 10%; otherwise it is Low.
10
VIN
Supply Voltage for Internal Control Circuit. It is connected to PVIN inside the chip.
1
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DS8086B-02
February 2016
RT8086B
Function Block Diagram
EN
VIN
UVLO
Shut Down
Control
OTP
Error
+ Amplifier
FB
VREF
-
RC
+
-
VOUT
Ton
Comparator
+
VIN
LX
PVIN
Logic
Control
Driver
-
CC
Current
Limit
Detector
LX
PGND
+
Current
Sense
-
LX
PGND
AGND PGOOD
Operation
The RT8086B is a synchronous low voltage step-down
converter that can support the input voltage range from
2.8V to 5.5V and the output current can be up to 3.5A.
The RT8086B uses a constant on-time, current mode
architecture. In normal operation, the high side P-MOSFET
is turned on when the switch controller is set by the
comparator and is turned off when the Ton comparator
resets the switch controller.
Low side MOSFET peak current is measured by internal
RSENSE. The error amplifier EA adjusts COMP voltage
by comparing the feedback signal (VFB) from the output
voltage with the internal 0.6V reference. When the load
current increases, it causes a drop in the feedback voltage
relative to the reference, then the COMP voltage rises to
allow higher inductor current to match the load current.
UV Comparator
If the feedback voltage (VFB) is lower than threshold voltage
0.2V, the UV comparator's output will go high and the
switch controller will turn off the high side MOSFET. The
output under voltage protection is designed to operate in
Hiccup mode.
PGOOD Comparator
When the feedback voltage (VFB) is higher than threshold
voltage 0.54V and under 0.66V, the PGOOD open drain
output will be high impedance.
Copyright © 2016 Richtek Technology Corporation. All rights reserved.
DS8086B-02
February 2016
Enable Comparator
A logic-high enables the converter; a logic-low forces the
IC into shutdown mode. There is an internal pull down
1MΩ resistor at EN pin.
Soft-Start (SS)
An internal current source charges an internal capacitor
to build the soft-start ramp voltage. The VFB voltage will
track the internal ramp voltage during soft-start interval.
The typical soft-start time is 2ms.
Over Current Protection (OCP)
The RT8086B provides over current protection by detecting
low side MOSFET valley inductor current. If the sensed
valley inductor current is over the current limit threshold
(4.5A min.), the OCP will be triggered. When OCP is
tripped, the RT8086B will keep the over current threshold
level until the over current condition is removed.
Thermal Shutdown (OTP)
The device implements an internal thermal shutdown
function when the junction temperature exceeds 140°C.
The thermal shutdown forces the device to stop switching
when the junction temperature exceeds the thermal
shutdown threshold. Once the die temperature decreases
below the hysteresis of 20°C, the device reinstates the
power up sequence.
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RT8086B
Absolute Maximum Ratings
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(Note 1)
Supply Input Voltage, PVIN, VIN ------------------------------------------------------------------------------ −0.3V to 6.5V
Switch Node Voltage, LX ---------------------------------------------------------------------------------------- −0.3V to (PVIN + 0.3V)
Other Pins Voltage ----------------------------------------------------------------------------------------------- −0.3V to 6V
Power Dissipation, PD @ TA = 25°C
UQFN-12L 2x2 (FC) ---------------------------------------------------------------------------------------------- 1.25W
Package Thermal Resistance (Note 2)
UQFN-12L 2x2 (FC), θJA ---------------------------------------------------------------------------------------- 80°C/W
UQFN-12L 2x2 (FC), θJC ---------------------------------------------------------------------------------------- 7°C/W
Lead Temperature (Soldering, 10 sec.) ---------------------------------------------------------------------- 260°C
Junction Temperature -------------------------------------------------------------------------------------------- 150°C
Storage Temperature Range ----------------------------------------------------------------------------------- −65°C to 150°C
ESD Susceptibility (Note 3)
HBM (Human Body Model) ------------------------------------------------------------------------------------- 2kV
Recommended Operating Conditions
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(Note 4)
Supply Input Voltage --------------------------------------------------------------------------------------------- 2.8V to 5.5V
Junction Temperature Range ----------------------------------------------------------------------------------- −40°C to 125°C
Ambient Temperature Range ----------------------------------------------------------------------------------- −40°C to 85°C
Electrical Characteristics
(VIN = 3.3V, TA = 25°C, unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Input Voltage
PVIN
2.8
--
5.5
V
Feedback Reference Voltage
VREF
0.588
0.6
0.612
V
Feedback Leakage Current
I FB
VFB = 3.3V
--
--
1
A
Quiescent Current
Close loop, no load current
--
60
--
Shutdown Current
Shutdown
--
--
1
Output Voltage Line Regulation
VIN = 2.8V to 5.5V
VIN = 5V, VOUT = 3.3V, IOUT = 0A to
3.5A
VIN = 5V, VOUT = 1.2V
--
0.1
--
%/V
--
0.4
--
%
--
1.2
--
MHz
Output Voltage Load Regulation
Switching Frequency
A
High-Side
RPMOS
ILX = 0.3A, VIN = 5V
--
50
--
Low-Side
RNMOS
ILX = 0.3A, VIN = 5V
--
40
--
Current Limit
I LIM
Valley current
4.5
--
--
A
Min. Off-Time
t OFF
--
100
--
ns
VIN Rising
--
2.5
--
VIN Falling
--
2.2
--
--
140
--
Logic-High
1.2
--
5.5
Logic-Low
--
--
0.4
Switch
On-Resistance
Under Voltage Lockout
Threshold
Thermal Shutdown
Enable Voltage
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m
V
°C
V
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DS8086B-02
February 2016
RT8086B
Parameter
Symbol
EN Input Current
Test Conditions
Min
Typ
Max
VEN = 2V
--
2
--
VEN = 0V
--
0
--
--
90
--
s
FB with respect to the Regulation
--
±10
--
%
PGOOD = PVIN
--
500
--
k
PGOOD = Low
--
--
100

--
2
--
ms
VIN = 5V, VOUT = 1.2V
--
200
--
VIN = 3.6V, VOUT = 1.2V
--
277
--
PGOOD Pin Trigger Delay
PGOOD Pin Threshold
(Relative to VOUT)
PGOOD Open Drain
Impedance
RPGOOD
PGOOD On-Resistance
Impedance
Soft-Start Time
TSS
On-Time
TON
Unit
A
ns
Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Copyright © 2016 Richtek Technology Corporation. All rights reserved.
DS8086B-02
February 2016
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RT8086B
Typical Application Circuit
VIN
PGOOD
Enable
1
CIN
10µF
10
9
8
L
RT8086B
2, 11 1µH
LX
PVIN
VOUT
1.2V
VIN
PGOOD
EN
VOUT
FB
6
7
PGND AGND
3, 12
4
*CFF
R1
200k
COUT
20µF
R2
200k
* : The feedforward capacitor CFF is optional for the optimization of transient response by increasing bandwidth and
acceptable phase margin.
CFF =
1
2 fCO
1  1  1 


R1  R1 R2 
Where fCO is the unity gain crossover frequency of the control loop without the external feedforward capacitor installed.
Table 1. Suggested Component Values
VOUT (V)
R1 (k)
R2 (k)
L (H)
COUT (F)
1.2V
200
200
1
20
1.8V
200
100
1
20
2.5V
200
63.4
1
20
3.3V
200
44.2
1
20
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is a registered trademark of Richtek Technology Corporation.
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February 2016
RT8086B
Typical Operating Characteristics
Output Voltage vs. Input Voltage
Efficiency vs. Output Current
100
1.40
VIN = 3.3V
90
1.35
VIN = 5V
1.30
Output Voltage (V)
Efficiency (%)
80
70
60
50
40
30
1.25
1.20
1.15
1.10
20
1.05
10
VOUT = 1.2V
0
0.001
VIN = 2.8V to 5.5V, VOUT = 1.2V
1.00
0.01
0.1
1
10
2.5
3
3.5
Output Voltage vs. Temperature
5
5.5
Output Voltage vs. Output Current
1.85
1.30
1.84
1.28
VIN = 3.3V
1.26
Output Voltage (V)
1.83
Output Voltage (V)
4.5
Input Voltage (V)
Output Current (A)
VIN = 5V
1.82
1.81
1.80
1.79
1.78
1.77
1.24
1.22
VIN = 5V
1.20
VIN = 3.3V
1.18
1.16
1.14
1.76
VOUT = 1.8V, IOUT = 0.6A
1.75
1.12
VOUT = 1.2V
1.10
-50
-25
0
25
50
75
100
125
0
0.5
1
Temperature (°C)
1.5
2
2.5
3
3.5
Output Current (A)
Switching Frequency vs. Input Voltage
Switching Frequency vs. Temperature
1.50
1.5
1.45
1.4
Switching Frequency (MHz)1
Switching Frequency (MHz)1
4
1.40
1.35
1.30
1.25
1.20
1.15
VIN = 3.3V
1.3
VIN = 5V
1.2
1.1
1.0
0.9
VOUT = 1.8V, IOUT = 0.6A
VOUT = 1.2V, IOUT = 0.6A
1.10
0.8
2.5
3
3.5
4
4.5
5
Input Voltage (V)
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DS8086B-02
February 2016
5.5
-50
-25
0
25
50
75
100
125
Temperature (°C)
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RT8086B
Current Limit vs. Input Voltage
Load Transient Response
7.0
Current Limit (A)
6.5
VOUT
(50mV/Div)
6.0
5.5
5.0
IOUT
(1A/Div)
4.5
VIN = 3.3V, VOUT = 1.2V,
IOUT = 0.2A to 2A, COUT = 20μF
VOUT = 1.2V
4.0
2.5
3
3.5
4
4.5
5
Time (50μs/Div)
5.5
Input Voltage (V)
Load Transient Response
Output Ripple Voltage
VOUT
(50mV/Div)
VOUT
(20mV/Div)
IOUT
(1A/Div)
VIN = 3.3V, VOUT = 1.2V,
IOUT = 1A to 2A, COUT = 20μF
Time (50μs/Div)
Time (10ms/Div)
Output Ripple Voltage
Power On from VIN
VOUT
(5mV/Div)
VIN
(2V/Div)
PGOOD
(5V/Div)
VLX
(2V/Div)
VIN = 3.3V, VOUT = 1.2V, IOUT = 3.5A
Time (500ns/Div)
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VIN = 3.3V, VOUT = 1.2V, IOUT = 0A
VOUT
(1V/Div)
ILX
(2A/Div)
VIN = 5V, VOUT = 1.2V, IOUT = 3.5A
Time (2.5ms/Div)
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February 2016
RT8086B
Power Off from VIN
VIN
(5V/Div)
VEN
(2V/Div)
PGOOD
(5V/Div)
VLX
(5V/Div)
VOUT
(1V/Div)
ILX
(5A/Div)
Power On from EN
VOUT
(1V/Div)
VIN = 5V, VOUT = 1.2V, IOUT = 3.5A
Time (2.5ms/Div)
ILX
(2A/Div)
VIN = 5V, VOUT = 1.2V, IOUT = 3.5A
Time (1ms/Div)
Power Off from EN
VEN
(2V/Div)
VOUT
(2V/Div)
ILX
(2A/Div)
VIN = 5V, VOUT = 1.2V, IOUT = 0A
Time (25ms/Div)
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February 2016
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RT8086B
Application Information
The RT8086B is a single-phase step-down converter. It
provides single feedback loop, current mode control with
fast transient response. An internal 0.6V reference allows
the output voltage to be precisely regulated for low output
voltage applications. A fixed switching frequency (1.2MHz)
oscillator and internal compensation are integrated to
minimize external component count. Protection features
include over current protection, under voltage protection
and over temperature protection.
Output Voltage Setting
Connect a resistive voltage divider at the FB between VOUT
and GND to adjust the output voltage. The output voltage
is set according to the following equation :
VOUT = VREF   1 R1 
 R2 
where VREF is the feedback reference voltage 0.6V (typ.).
VOUT
R1
FB
R2
GND
Figure 1. Setting VOUT with a Voltage Divider
Chip Enable and Disable
The EN pin allows for power sequencing between the
controller bias voltage and another voltage rail. The
RT8086B remains in shutdown if the EN pin is lower than
400mV. When the EN pin rises above the VEN trip point,
the RT8086B begins a new initialization and soft-start
cycle.
capacitor. This voltage clamps the voltage at the FB pin,
causing PWM pulse width to increase slowly and in turn
reduce the input surge current. The internal 0.6V reference
takes over the loop control once the internal ramping-up
voltage becomes higher than 0.6V.
UVLO Protection
The RT8086B has input Under Voltage Lockout protection
(UVLO). If the input voltage exceeds the UVLO rising
threshold voltage (2.5V typ.), the converter resets and
prepares the PWM for operation. If the input voltage falls
below the UVLO falling threshold voltage during normal
operation, the device will stop switching. The UVLO rising
and falling threshold voltage has a hysteresis to prevent
noise-caused reset.
Inductor Selection
The switching frequency (on-time) and operating point (%
ripple or LIR) determine the inductor value as shown below:
VOUT   VIN  VOUT 
L=
fSW  LIR  ILOAD(MAX)  VIN
where LIR is the ratio of the peak-to-peak ripple current to
the average inductor current.
Find a low loss inductor having the lowest possible DC
resistance that fits in the allotted dimensions. The core
must be large enough not to saturate at the peak inductor
current (IPEAK) :
IPEAK = ILOAD(MAX) +  LIR  ILOAD(MAX) 
 2

The calculation above serves as a general reference. To
further improve transient response, the output inductor
can be further reduced. This relation should be considered
along with the selection of the output capacitor.
Internal Soft-Start
Input Capacitor Selection
The RT8086B provides an internal soft-start function to
prevent large inrush current and output voltage overshoot
when the converter starts up. The soft-start (SS)
automatically begins once the chip is enabled. During softstart, the internal soft-start capacitor becomes charged
and generates a linear ramping up voltage across the
High quality ceramic input decoupling capacitor, such as
X5R or X7R, with values greater than 10μF are
recommended for the input capacitor. The X5R and X7R
ceramic capacitors are usually selected for power regulator
capacitors because the dielectric material has less
capacitance variation and more temperature stability.
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RT8086B
The input capacitor is used to supply the input RMS
current, which can be approximately calculated using the
following equation :
IIN_RMS = ILOAD 
VOUT  VOUT 
 1
VIN 
VIN 
The next step is selecting a proper capacitor for RMS
current rating. One good design uses more than one
capacitor with low equivalent series resistance (ESR) in
parallel to form a capacitor bank.
The input capacitance value determines the input ripple
voltage of the regulator. The input voltage ripple can be
approximately calculated using the following equation :
VIN =
IOUT(MAX) VOUT  VOUT 

 1
CIN  fSW
VIN 
VIN 
Output Capacitor Selection
The output capacitor and the inductor form a low pass
filter in the Buck topology. In steady state condition, the
ripple current flowing into/out of the capacitor results in
ripple voltage. The output voltage ripple (VP-P) can be
calculated by the following equation :
1

VP_P = LIR  ILOAD(MAX)   ESR +
8  COUT  fSW 

When load transient occurs, the output capacitor supplies
the load current before the controller can respond.
Therefore, the ESR will dominate the output voltage sag
during load transient. The output voltage undershoot (VSAG)
can be calculated by the following equation :
VSAG = ILOAD  ESR
For a given output voltage sag specification, the ESR value
can be determined.
Another parameter that has influence on the output voltage
sag is the equivalent series inductance (ESL). The rapid
change in load current results in di/dt during transient.
Therefore, the ESL contributes to part of the voltage sag.
Using a capacitor with low ESL can obtain better transient
performance. Generally, using several capacitors
connected in parallel can have better transient performance
than using a single capacitor for the same total ESR.
Copyright © 2016 Richtek Technology Corporation. All rights reserved.
DS8086B-02
February 2016
Thermal Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
PD(MAX) = (TJ(MAX) − TA) / θJA
where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature, and θJA is the junction to ambient
thermal resistance.
For recommended operating condition specifications, the
maximum junction temperature is 125°C. The junction to
ambient thermal resistance, θJA, is layout dependent. For
UQFN-12L 2x2(FC) package, the thermal resistance, θJA,
is 80°C/W on a standard JEDEC 51-7 four-layer thermal
test board. The maximum power dissipation at TA = 25°C
can be calculated by the following formula :
P D(MAX) = (125°C − 25°C) / (80°C/W) = 1.25W for
UQFN-12L 2x2 (FC) package
The maximum power dissipation depends on the operating
ambient temperature for fixed T J(MAX) and thermal
resistance, θJA. The derating curve in Figure 2 allows the
designer to see the effect of rising ambient temperature
on the maximum power dissipation.
1.6
Maximum Power Dissipation (W)1
Voltage rating and current rating are the key parameters
when selecting an input capacitor. Generally, selecting an
input capacitor with voltage rating 1.5 times greater than
the maximum input voltage is a conservatively safe design.
Four-Layer PCB
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 2. Derating Curve of Maximum Power Dissipation
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RT8086B
Layout Considerations
Layout is very important in high frequency switching
converter design. The PCB can radiate excessive noise
and contribute to converter instability with improper layout.
Certain points must be considered before starting a layout
using the RT8086B.

Make the traces of the main current paths as short and
wide as possible.

Put the input capacitor as close as possible to the device
pins (VIN and GND).

LX node encounters high frequency voltage swings so
it should be kept in a small area. Keep sensitive
components away from the LX node to prevent stray
capacitive noise pick-up.
L
COUT
The output capacitor must
be place near the IC.
PVIN
LX
PGND
AGND
Ensure all feedback network connections are short and
direct. Place the feedback network as close to the chip
as possible.

The GND pin and Exposed Pad should be connected to
a strong ground plane for heat sinking and noise
protection.

An example of PCB layout guide is shown in Figure 3
for reference.
Input capacitor must
be placed as close to
the IC as possible.
LX should be connected to
inductor by wide and short GND
trace. Keep sensitive
CIN1
components away from
VIN
this trace.
VOUT

CIN2
VIN
10
1
2
3
4
LX
9
11
8
12
7
PGND
5
NC
6
PGOOD
EN
FB
VOUT
R3
VIN
R1 R2
VOUT
AGND
The voltage divider must
be connected as close to
the device as possible.
Figure 3. PCB Layout Guide
Copyright © 2016 Richtek Technology Corporation. All rights reserved.
www.richtek.com
12
is a registered trademark of Richtek Technology Corporation.
DS8086B-02
February 2016
RT8086B
Outline Dimension
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min.
Max.
Min.
Max.
A
0.500
0.600
0.020
0.024
A1
0.000
0.050
0.000
0.002
A3
0.100
0.152
0.004
0.006
b
0.200
0.300
0.008
0.012
D
1.900
2.100
0.075
0.083
E
1.900
2.100
0.075
0.083
0.500
e
0.020
L
0.350
0.450
0.014
0.018
L1
0.450
0.550
0.018
0.022
U-Type 12L QFN 2x2 (FC) Package
Richtek Technology Corporation
14F, No. 8, Tai Yuen 1st Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
DS8086B-02
February 2016
www.richtek.com
13