IDT IDT74FCT3907SO

IDT74FCT3907
3.3V PC CLOCK SYNTHESIZER
COMMERCIAL TEMPERATURE RANGES
IDT74FCT3907
ADVANCE INFORMATION
3.3V PENTIUM™
CLOCK SYNTHESIZER
Integrated Device Technology, Inc.
FEATURES:
DESCRIPTION:
• 0.5 MICRON CMOS Technology
• Generates keyboard, floppy disk, system reference, PCI
and CPU clocks
• 6 copies of PCI clock & 4 copies of CPU clock available
• 14.31818MHz crystal input
• CPU clock output skew <250ps
Bus clock output skew <500ps
• 0.03% output frequency accuracy
• Power-on reset
• Selectable CPU clock frequency (50/60/66.66MHz)
• Internal loop filter
• VCC = 3.3 ±0.3V
• Available in 28 pin SOIC
• Supports Pentium™ processor based designs
• Meets Intel Pentium™ processor 3.3V Clock Driver
specification (External Draft 1.0)
The IDT74FCT3907 Clock synthesizer is built using advanced dual metal CMOS technology. This device uses a
14.31818 MHz crystal input to synthesize the various
motherboard clock frequencies.
The output frequencies supported by the IDT74FCT3907
are as follows:
Reference clocks (2) = 14.31818MHz
Keyboard clock (1) = 12MHz
Floppy disk clock (1) = 24MHz
CPU clock (4) = 50/60/66.66 MHz (Selectable by SEL pins)
Bus clock (6) = CPU clock ÷ 2
The SEL0, 1 pins are used to choose appropriate CPUCLK
and PCICLK frequencies or to put the device in a test mode.
In the test mode, the device outputs various divisors of the test
clock frequency. Refer to the function table in this datasheet
for details on the different operating modes.
FUNCTIONAL BLOCK DIAGRAM
1
X1
(14.31818 MHz)
Peripheral
Clock
Synthesizer
Block
Oscillator
X2
1
4
SEL0, 1
CPU
Clock
Synthesizer
Block
6
2
KBCLK (12MHz)
FDCLK (24MHz)
CPUCLK 0-3
PCICLK 0-5
REF CLK 0,1 (14.31818 MHz)
OE
3245 drw 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
Pentium™ is a trademark of Intel Corp.
COMMERCIAL TEMPERATURE RANGES
©1995 Integrated Device Technology, Inc.
AUGUST 1995
9.10
DSC-4662/-
1
1
IDT74FCT3907
3.3V PC CLOCK SYNTHESIZER
COMMERCIAL TEMPERATURE RANGES
ABSOLUTE MAXIMUM RATINGS (1)
PIN CONFIGURATION
Symbol
VTERM(2)
VCC
1
28
REFCLK0
X1
2
27
REFCLK1
X2
3
26
VCC
GND
4
25
KBCLK
OE
5
24
FDCLK
CPUCLK0
6
23
GND
CPUCLK1
7
22
PCICLK2
VCC
8
21
PCICLK3
CPUCLK2
9
20
VCC
CPUCLK3
10
19
PCICLK4
GND
11
18
PCICLK5
SEL1
12
17
GND
SEL0
13
16
PCICLK1
VCC
14
15
PCICLK0
SO28-2
VTERM(3)
Rating
Terminal Voltage
with Respect to GND
Terminal Voltage
with Respect to GND
Commercial
Unit
–0.5 to +4.6
V
V
°C
TA
Operating Temperature
–0.5 to VCC
+ 0.5
0 to 70
TBIAS
Temperature Under Bias
0 to +70
°C
TSTG
Storage Temperature
–55 to +125
°C
IOUT
DC Output Current
–60 to +60
mA
3245 tbl 01
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
2. Vcc terminals.
3. Input, Output and I/O terminals.
3245 drw 02
CAPACITANCE (TA = +25°C, f = 1.0MHz)
Symbol
Parameter(1)
CIN
Input
Capacitance
CI/O
I/O
Capacitance
Conditions
VIN = 0V
Typ.
4.5
VOUT = 0V
5.5
Max. Unit
6.0
pF
8.0
pF
3245 lnk 02
NOTE:
1. This parameter is measured at characterization but not tested.
PIN DESCRIPTION
Pin Name
I/O
Description
X1
I
14.31818 MHz Crystal Input. This is also the test clock input.
X2
O
14.31818 MHz Crystal Output
SEL0, 1
I
CPUCLK Control Inputs
KBCLK
O
Keyboard Clock (12MHz)
FDCLK
O
Floppy Disk Clock (24MHz)
REFCLK 0, 1
O
Reference Clocks (14.31818 MHz)
CPUCLK 0-3
O
CPU Clocks
PCICLK 0-5
O
PCI Bus Clocks
OE
I
Output Enable
3245 tbl 03
FUNCTION TABLE
OE
SEL0
SEL1
INPUT CLK
CPUCLK
PCICLK
REFCLK
FDCLK
KBCLK
0
X
X
14.31818MHz
Hi-Z
Hi-Z
Hi-Z
Hi-Z
1
0
0
14.31818MHz
50MHz
CPUCLK/2
14.31818MHz
24MHz
12MHz
1
0
1
14.31818MHz
60MHz
CPUCLK/2
14.31818MHz
24MHz
12MHz
1
1
0
14.31818MHz
66.66MHz
CPUCLK/2
14.31818MHz
24MHz
12MHz
1
1
1
TCLK (Test Clock)
TCLK/2
TCLK/4
TCLK
TCLK/4
TCLK/8
Hi-Z
3245 tbl 04
9.10
2
IDT74FCT3907
3.3V PC CLOCK SYNTHESIZER
COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Commercial: TA = 0°C to 70°C, V CC = 3.3V ± 0.3V
Symbol
VIH
Parameter
Input HIGH Level (Input pins)
Test Conditions(1)
Guaranteed Logic HIGH Level
Input HIGH Level (I/O pins)
VIL
Input LOW Level
Guaranteed Logic LOW Level
Min.
2.0
Typ.(2)
—
Max.
5.5
2.0
—
VCC+0.5
–0.5
—
0.8
V
—
—
±1
µA
Unit
V
(Input and I/O pins)
II H
Input HIGH Current (Input pins)(5)
Input HIGH Current (I/O
II L
IOZH
VCC = Max.
VI = 5.5V
pins)(5)
VI = VCC
—
—
±1
Input LOW Current (Input pins)(5)
VI = GND
—
—
±1
Input LOW Current (I/O pins)(5)
VI = GND
—
—
±1
VO = VCC
—
—
±1
VO = GND
—
—
±1
—
–0.7
–1.2
V
V
High Impedance Output Current
(3-State Output pins) ((6)
VCC = Max.
IOZL
VIK
Clamp Diode Voltage
VCC = Min., IIN = –18mA
VOH
Output HIGH Voltage
VCC = Min.
IOH = –0.1mA
VIN = VIH or VIL
IOH = –8mA COM'L.
VCC–0.2
—
—
VCC–0.6V
3.0
—
—
—
0.2
µA
VOL
Output LOW Voltage
VCC = Min.
IOL = 0.1mA
VIN = VIH or VIL
IOL = 8mA
—
0.3
0.5
IOS
Short Circuit Current(4,6)
VCC = Max., VO = GND(3)
–43
–135
–206
mA
IOS
Short Circuit
Current(4,7)
GND(3)
–34
–135
–195
mA
ICCZ
Quiescent Power Supply Current
—
3.0
4.0
VCC = Max., VO =
VCC = Max., VIN = GND or VCC
V
mA
3245 tbl 05
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 3.3V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. This parameter is guaranteed but not tested.
5. The test limit for this parameter is ±5µA at TA = –55°C.
6. Applies to CPUCLK.
7. Applies to PCICLK.
DYNAMIC OUTPUT DRIVE CHARACTERISTICS
Symbol
I ODH
I ODH
Parameter
CPUCLK Output HIGH Current
PCICLK Output HIGH Current
IODL
CPUCLK Output LOW Current
IODL
PCICLK Output LOW Current
Test Conditions(1)
VIN = VIH or VIL,
VCC = 3.135V
(3.3V –5%)
VOUT = 2.4V
VCC = 3.465V
(3.3V +5%)
VIN = VIH or VIL,
VCC = 3.135V
Min.
–23
Typ.(2)
—
Max.
—
–109
–14.5
—
VOUT = 2.4V
VCC = 3.465V
—
–100
VIN = VIH or VIL,
VCC = 3.135V
16
—
VOUT = 0.4V
VCC = 3.465V
—
40
VIN = VIH or VIL,
VCC = 3.135V
9.4
—
VOUT = 0.4V
VCC = 3.465V
—
38
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 3.3V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. This parameter is guaranteed but not tested.
5. The test limit for this parameter is ±5µA at TA = –55°C.
9.10
Unit
mA
mA
mA
mA
3245 tbl 06
3
IDT74FCT3907
3.3V PC CLOCK SYNTHESIZER
COMMERCIAL TEMPERATURE RANGES
OSCILLATOR CHARACTERISTICS OVER OPERATING RANGE
Symbol
CX1
Test Conditions(1)
Parameter
X1 Input Capacitance
CX2
X2 Output Capacitance
II H
X1 Input HIGH Current
II L
X1 Input LOW Current
I ODH
I ODL
Min.
Typ.(2)
20
Max.
Unit
pF
20
pF
VCC = Max., VIN = VCC
5
µA
VCC = Max., VIN = GND
–5
µA
X2 Output HIGH Current
VOUT = VCC
–1
mA
X2 Output LOW Current
VOUT = GND
1
mA
3245 tbl 07
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 3.3V, +25°C ambient.
3. This parameter is guaranteed but not tested.
POWER SUPPLY CHARACTERISTICS
Test Conditions(1)
Min. Typ.(2) Max.
Symbol
Parameter
∆ICC
Quiescent Power Supply Current
TTL Inputs HIGH
VCC = Max.
VIN = VCC –0.6V
IC
Total Power Supply Current
VCC = Max.
CPUCLK = 50MHz
VIN = VCC
—
Outputs Open
CPUCLK = 60MHz
VIN = GND
—
50% Duty Cycle
OE = VCC
CPUCLK = 66.66MHz
—
NOTES:
1. Typical values are at V CC = 3.3V, +25°C ambient.
2. Per TTL driven input (V IN = VCC -0.6V); all other inputs at V CC or GND.
9.10
2.0
30
Unit
µA
mA
—
3245 tbl 08
4
IDT74FCT3907
3.3V PC CLOCK SYNTHESIZER
COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
66.66MHz
Symbol
tCPU
CPUCLK Period
Parameter
Condition(1)
Min.(2)
TBD
74FCT3907
60MHz
50MHz
Max.
Min.(2)
Max.
Min.(2)
Max.
15
—
16.7
—
20
—
Unit
ns
4
—
4
—
4
—
ns
tCPUH
CPUCLK HIGH Time(3)
tCPUL
CPUCLK LOW
Time(4)
4
—
4
—
4
—
ns
tR1, tF1
CPUCLK Rise, Fall Times (Between 0.4V & 2.4V)
0.8
2.0
0.8
2.0
0.8
2.0
ns
tSK1(o)
CPUCLK Output Skew
—
250
—
250
—
250
ps
CPUCLK Pulse Skew
—
tSK1(p)
—
—
ps
|tPLH-tPHL|
tPCI
PCICLK Period
30
—
33.3
—
40
—
ns
tPCIH
PCICLK HIGH Time
12
—
13.3
—
16
—
ns
tPCIL
PCICLK LOW Time
12
—
13.3
—
16
—
ns
tR2, tF2
PCICLK Rise, Fall Time (Between 0.4V & 2.4V)
0.5
2.0
0.5
2.0
0.5
2.0
ns
tSK2(o)
PCICLK Output Skew
—
500
—
500
—
500
tSK2(p)
PCICLK Pulse Skew
—
—
—
ps
ps
|tPLH-tPHL|
tSK3(o)
CPUCLK to PCICLK Output Delay
1.0
5.0
1.0
5.0
1.0
5.0
ns
tPS
CPUCLK, PCICLK Period Stability
—
250
—
250
—
250
ps
tCLOCK
CPUCLK Lock Time
—
2
—
2
—
2
ms
tPLOCK
PCICLK Lock Time
—
3
—
3
—
3
ms
tPZL
tPZH
tPLZ
tPHZ
Output Enable Time OE to KBCLK,
FDCLK, REFCLK, CPUCLK, PCICLK (Test Mode)
Output Disable Time OE to KBCLK,
FDCLK, REFCLK, CPUCLK, PCICLK (Test Mode)
1.5
8.0
1.5
8.0
1.5
8.0
ns
1.5
8.0
1.5
8.0
1.5
8.0
ns
3245 tbl 09
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
9.10
5
IDT74FCT3907
3.3V PC CLOCK SYNTHESIZER
COMMERCIAL TEMPERATURE RANGES
TEST WAVEFORMS
PULSE WIDTH, RISE/FALL TIMES
PROPAGATION DELAY, OUTPUT SKEW
tCPUH,tPCIH
1.5V
2.4V
1.5V
0.4V
X1
tPD2
1.5V
CPUCLK
tR
tF
tCPUL, tPCIL
tSK1(O)
1.5V
3245 drw 04
PCICLK
tSK2(O)
tSK3(O)
3245 drw 03
ENABLE AND DISABLE TIMES
ENABLE
DISABLE
3V
1.5V
0V
CONTROL
INPUT
tPZL
OUTPUT
NORMALLY
LOW
SWITCH
6V
tPLZ
3V
1.5V
tPZH
OUTPUT
NORMALLY
HIGH
SWITCH
GND
3V
0.3V
VOL
tPHZ
0.3V
1.5V
0V
VOH
0V
3245 drw 05
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control DisableHIGH
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; t F ≤ 2.5ns; t R ≤ 2.5ns
9.10
6
IDT74FCT3907
3.3V PC CLOCK SYNTHESIZER
COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
IDT
XXXX
XX
FCT
Temp. Range
Device Type
X
Package
X
Process
Blank
Commercial
SO
Small Outline IC
3907
3.3V Clock Synthesizer
74
0°C to +70°C
3245 drw 06
9.10
7