IN-SYSTEM PROGRAMMABLE GENERIC DIGITAL SWITCH ispGDXV TM Applications A solution for every interface problem Reset Introducing the ispGDXV To/From Backplane The 3.3-volt ispGDXV is a new class of high-density programmable component distinct from complex programmable logic Lattice CPLD System CPU or MCU devices (CPLDs) and field programmable gate arrays (FPGAs). This family of devices 32 ispGDXV 16/32 has been optimized for fast, cost-effective integration of complex interface logic and 16 signal routing applications. With blazing fast 3.5ns input to output speeds, 250MHz Flash Data & Address Control pipelined operating frequencies, and programmable 3.3V or 2.5V output levels, ispGDXV SDRAM 16/32 the ispGDXV family supports the most demanding future-generation system 32 Custom ASIC SDRAM designs. Interface Solutions Transceiver Control Lattice’s ispGDXV family offers the ultimate interface solution for design engineers. Lattice ispGDXV Devices Simplify PCB Layout with ispGDXV ... ■ All transceivers are replaced by a single ispGDXV In this design, three peripheral devices must interface with each other and a data bus backplane. The original design required several transceivers and significant board routing resources to perform the data bus switching. Original Board Layout Device #1 Traces and vias are dramatically reduced ■ Significant reduction in EMI/RFI ■ Boundary Scan Test added Optimized Layout with ispGDXV Device #1 on Board 32 Transceiver Transceiver ■ Transceiver 32 Device #2 Transceiver Control 32 Transceiver 32 Transceiver 32 32 Data Bus Device #3 Device #2 ispGDXV 32 32 32 Data Bus Device #3 OC192 Bi-directional Access Port Data Bus and Address Bus Transceivers In this OC192 bi-directional access port, the ispGDXV performs a 3-to-1 bus MUX and transceiver. In this processor board application, the ispGDXV device performs muxing and demuxing from the SDRAMs and Flash to the PowerPC. ASIC 1 32 M_ADDR 16 26 ispGDXV SDRAM Microprocessor Motorola MPC765 ispGDXV ispGDXV MPC801 Bus MUXDeMUX ASIC 2 32 32 64 16 SDRAM 32 ispLSI 5256VA Controller PROC_ADDR From MPC801 16 ASIC 3 32 SDRAM 16 16 ispGDXV OC192 Product-Fiber Output Port P0 P1 32 Bit @ 60MHz P0 SDRAM Flash Memory Similar Logic Blocks F1 ispLSI 2128VE FSM 16 P1 ATM Utopia Interface 60MHz In this Utopia 2 bus configuration, the ispGDXV device allows the Utopia 2 ATM frame to be steered to multiple physical layers. 120MHz Tx Data ispGDXV 16 16 This OC192 application implements several 32-bit busses running at 60MHz and two ASIC 32-bit busses running at 120MHz. F0 Bridge 16 16 ispGDXV ATM Layer Similar Logic Blocks Rx Data Tx ispLSI 2000VE ispGDXV OE Control ASIC Data Management Interface ASIC BTS Transcoder Unit In this transcoder application, multiple DSPs interface with three RAMs. The transcoder performs voice compression and voice processing and each DSP can read and write each of the RAMs. ispGDXV Rx Level 1 Utopia Interface PHY 1 PHY 2 Switch Controller The ispGDXV is ideal for integrating a shared bus. In this application, the ispGDXV multiplexes the address and data path. CPU, ASIC and Bus share the same memory. RAM ispGDXV DSP 1 ASIC ASSP CPU ispGDXV PHY 3 RAM BUS Interface Memory DSP n RAM PowerPC Interface Parallel to Serial Conversion In this time division multiplex application, 16 channels of lower line data are being multiplexed by a synchronous clock to a high speed serial line. The ispGDXV multiplexes a 72 bit data (with parity) bus to either of two local 36 bit busses. Plus, the ispGDXV provides voltage translation from the PowerPC at 2.5V to the other busses which are 3.3V. Input Registers Channel 01 Channel 02 Channel 03 Channel 04 36 4:1 MUX ispGDXV PowerPC 36 16 Low-Speed Serial Data Channels Channel 05 Channel 06 Channel 07 Channel 08 4:1 MUX Channel 09 Channel 10 Channel 11 Channel 12 4:1 MUX Channel 13 Channel 14 Channel 15 Channel 16 4:1 MUX LOCAL_A 36 4:1 MUX Single, High-Speed Serial Channel containing all 16 Low-Speed Serial Data Channels LOCAL_B 36 Applications Support 1-800-LATTICE (528-8423) (408) 826-6002 [email protected] www.latticesemi.com Copyright © 2000 Lattice Semiconductor Corporation. Lattice Semiconductor, L (stylized) Lattice Semiconductor Corp., and Lattice (design), ISP, ispLSI, ispMACH, ispGDX and ispGDXV are either registered trademarks or trademarks of Lattice Semiconductor Corporation in the United States and/or other countries. Other product names used in this publication are for identification purposes only and may be trademarks of their respective companies. September 2000 Order #: I0114