PT6312B VFD Driver/Controller IC DESCRIPTION PT6312B is a Vacuum Fluorescent Display (VFD) Controller driven on a 1/4 to 1/11 duty factor. Eleven segment output lines, 6 grid output lines, 5 segment/grid output drive lines, one display memory, control circuit, key scan circuit are all incorporated into a single chip to build a highly reliable peripheral device for a single chip micro computer. Serial data is fed to PT6312B via a three-line serial interface. It is housed in a 44-pin plastic LQFP Package and is functionally compatible with µpD16312. APPLICATION • Microcomputer peripheral devices FEATURES • • • • • • • • • • • CMOS technology Low power consumption Key scanning (6 x 4 matrix) Multiple display modes: (11 segments, 11 digits to 16 segments, 6 digits) 8-Step dimming circuitry LED ports provided (4 channels, 20mA max.) 4- Bits general purpose input ports provided Serial interface for Clock, Data Input, Data Output, Strobe pins No external resistors needed for driver outputs Functional compatibility with µpD16312 Available in 44-pin, LQFP package BLOCK DIAGRAM Tel: 886-66296288‧Fax: 886-29174598‧ http://www.princeton.com.tw‧2F, No.233-1, Baociao Rd., Sindian Dist., New Taipei City 23145, Taiwan PT6312B APPLICATION CIRCUIT V1.3 2 January 2013 PT6312B ORDER INFORMATION Valid Part Number PT6312BLQ Package Type 44-pin, LQFP Top Code PT6312BLQ PIN CONFIGURATION V1.3 3 January 2013 PT6312B 4 PIN DESCRIPTION Pin Name SW1 to SW4 I/O I DOUT O DIN I GND - CLK I STB I K1 to K4 I VDD - SG1/KS1 to SG6/KS6 O SG7 to SG11 SG12/GR11 SG13/GR10 to SG16/GR7 VEE GR6 to GR1 LED1 to LED4 O Description General Purpose Input Pins Data Output Pin (N-Channel, Open-Drain) This pin outputs serial data at the falling edge of the shift clock (starting from the lower bit). Data Input Pin This pin inputs serial data at the rising edge of the shift clock (starting from the lower bit). Ground Pin Clock Input Pin This pin reads serial data at the rising edge and outputs data at the falling edge. Serial Interface Strobe Pin The data input after the STB has fallen is processed as a command. When this in is “HIGH”, CLK is ignored. Key Data Input Pins The data inputted to these pins is latched at the end of the display cycle. Logic Power Supply High-Voltage Segment Output Pins Also acts as the Key Source. High-Voltage Segment Output Pins O High-Voltage Segment/Grid Output Pins O O OSC I Pull-Down Level High-Voltage Grid Output Pins LED Output Pin Oscillator Input Pin A resistor is connected to this pin to determine the oscillation frequency. V1.3 4 Pin No. 1 to 4 5 6 7, 43 8 9 10 to 13 14, 38 15 to 20 21 to 25 26 28 to 31 27 32 to 37 42 to 39 44 January 2013 PT6312B IMPORTANT NOTICE Princeton Technology Corporation (PTC) reserves the right to make corrections, modifications, enhancements, improvements, and other changes to its products and to discontinue any product without notice at any time. PTC cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a PTC product. No circuit patent licenses are implied. Princeton Technology Corp. 2F, 233-1, Baociao Road, Sindian Dist., New Taipei City 23145, Taiwan Tel: 886-2-66296288 Fax: 886-2-29174598 http://www.princeton.com.tw V1.3 17 January 2013