INTERSIL HA9P2444-5

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NO RE al Applicat sil.com/tsc
November 1999
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50MHz, Selectable, Four Channel
Video Operational Amplifier
Features
The HA-2444 is a channel-selectable video op amp
consisting of four differential inputs, a single-ended output,
and digital control circuitry allowing two digital inputs to
activate one of the four differential inputs. The HA-2444 also
includes a high impedance output state allowing the outputs
of multiple HA-2444s to be wire-OR’d. Functionally, the
HA-2444 is equivalent to four wideband video op amps and
a wideband multiplexer.
• Unity Gain Stability
FN2490.8
• Digital Selection of Input Channel
Unlike similar competitor devices, the HA-2444 is not
restricted to multiplexing. Any op amp configuration can be
used with any of the inputs. Signal amplification, addition,
integration, and more can be put under digital control with
broadcast quality performance.
The key video parameters of the HA-2444 have been
optimized without compromising DC performance. Gain
Flatness to 10MHz is only 0.1dB. Differential gain and phase
are typically 0.03% and 0.03 degrees, respectively. Laser
trimming allows offset voltages in the 4.0mV range and a
unique common current source design assures minimal
channel-to-channel mismatch, while maintaining 60dB of
crosstalk rejection at 5MHz. Open loop gain of 76dB and low
input offset and bias currents enhance the performance of
this versatile device.
For information about military grade devices, please refer to
the HA-2444/883 data sheet.
Pinout
HA-2444
• Gain Flatness to 10MHz. . . . . . . . . . . . . . . . . . . . . . 0.1dB
• Differential Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.03%
• Differential Phase . . . . . . . . . . . . . . . . . . . . . 0.03 Degrees
• Fast Channel Selection . . . . . . . . . . . . . . . . . . . . . . 60ns
• Crosstalk Rejection . . . . . . . . . . . . . . . . . . . . . . . . . 60dB
Applications
• Video Multiplexer
• Programmable Gain Amplifier
• Special Effects Processors
• Video Distribution Systems
• Heads-up/Night Vision Displays
• Medical Imaging Systems
• Radar Video
Ordering Information
PART NUMBER
TEMP.
RANGE ( oC)
PKG.
NO.
PACKAGE
HA3-2444-5
0 to 75
16 Ld PDIP
E16.3
HA9P2444-5
0 to 75
16 Ld SOIC
M16.3
Truth Table
HA-2444
(PDIP, SOIC)
TOP VIEW
EN
D1
D0
SELECTED
CHANNEL
H
L
L
1
16
D1
H
L
H
2
15
D0
H
H
L
3
3
14
+IN4
H
H
H
4
-IN2
4
13
-IN4
L
X
X
NONE-OUT is set to a high
impedance state.
V-
5
12
V+
+IN1
6
11
+IN3
-IN1
7
10
-IN3
OUT
8
9
N/C
GND
1
EN
2
+IN2
DECODE
CONTROL
1
L = Low State (0.8V Max)
H = High State (2.4V Min)
X = Don’t Care
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
HA-2444
Absolute Maximum Ratings
Thermal Information
Supply Voltage Between V+ and V- Terminals. . . . . . . 35V (±17.5V)
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±VS
Digital Input Voltage . . . . . . . . . . . . . . . . . GND +7.5V to GND -0.5V
Peak (Short Duration) Output Current . . . . . . . . . . . . . . . . . . ±40mA
Thermal Resistance (Typical, Note 1)
Operating Conditions
Temperature Range
HA-2444-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 75oC
θJA (oC/W)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
80
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
96
Maximum Junction Temperature (Die Only) . . . . . . . . . . . . . . . 175oC
Maximum Junction Temperature (Plastic Package) . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
VS = ±15V, RL = 1kΩ, CL ≤ 10pF, VIL = 0.8V, VIH = 2.4V. Unless Otherwise Specified
Specifications Apply to All Channels
Electrical Specifications
PARAMETER
TEST CONDITIONS
HA-2444-5
TEMP.
(oC)
MIN
TYP
MAX
UNITS
25
-
4
7
mV
Full
-
-
15
mV
Full
-
10
-
µV/oC
INPUT CHARACTERISTICS
Input Offset Voltage
Average Input Offset Voltage Drift
Channel to Channel Offset Voltage Mismatch
Input Bias Current
Average Input Bias Current Drift
25
-
-
5
mV
Full
-
-
8
mV
25
-
9
15
µA
Full
-
-
20
µA
Full
-
0.04
-
µA/oC
25
-
2
4
µA
Full
-
-
6
µA
Average Input Offset Current Drift
Full
-
10
-
nA/oC
Common Mode Range
Full
-
±11.5
-
V
Differential Input Resistance (Note 2)
25
50
90
-
kΩ
Differential Input Capacitance
25
-
3
-
pF
Input Offset Current
Input Noise Voltage Density
f = 1000Hz
25
-
26
-
nV/√Hz
Input Noise Current Density
f = 1000Hz
25
-
4
-
pA/√Hz
TRANSFER CHARACTERISTICS
VOUT = ±5V
Large Signal Voltage Gain
VCM = ±5V
Common Mode Rejection Ratio
Minimum Stable Gain
25
71
76
-
dB
Full
68
-
-
dB
Full
70
80
-
dB
25
+1
-
-
V/V
Unity Gain Bandwidth
AV = +1, VOUT = ±100mV
25
-
45
-
MHz
Gain Bandwidth Product
VOUT = ±100mV
25
-
50
-
MHz
Output Voltage Swing
RL = 1kΩ
Full
±10
±11
-
V
Output Voltage Swing (Note 2)
RL = 75Ω
25
±2
-
-
V
OUTPUT CHARACTERISTICS
Full Power Bandwidth (Note 3)
Full
3.8
5.1
-
MHz
Output Current (Note 12)
Full
±25
-
-
mA
Disabled Output Current (Note 13)
Full
-
-
860
µA
Output Resistance
25
-
20
-
Ω
2
HA-2444
VS = ±15V, RL = 1kΩ, CL ≤ 10pF, VIL = 0.8V, VIH = 2.4V. Unless Otherwise Specified
Specifications Apply to All Channels (Continued)
Electrical Specifications
PARAMETER
TEST CONDITIONS
HA-2444-5
TEMP.
(oC)
MIN
TYP
MAX
UNITS
25
-
7
-
ns
TRANSIENT RESPONSE
AV = +1
Rise Time (Note 4)
Overshoot (Note 4)
AV = +1
25
-
10
-
%
Slew Rate (Note 6)
AV = +1
Full
120
160
-
V/µs
25
-
120
-
ns
0 to 85
-
60
100
ns
Settling Time
SWITCHING CHARACTERISTICS
Channel Select Time
Note 7
-40 to 0
-
80
125
ns
Output Enable Time
Note 8
Full
-
40
100
ns
Digital Input Voltages
D0/D1 Input Current
VIH
Full
2.4
-
-
V
VIL
Full
-
-
0.8
V
VIL = 0.0V
Full
-
0.7
1
mA
VIH = 5.0V
Full
-
-
1.2
µA
VIL = 0.0V
Full
-
-
50
µA
VIH = 5.0V
Full
-
-
1.2
µA
Note 9
25
-
60
-
dB
Differential Phase
Note 11
25
-
0.03
-
Degrees
Differential Gain
Note 11
25
-
0.03
-
%
Gain Flatness (Note 10)
10MHz, AV = +1
25
-
0.1
-
dB
Chrominance to Luminance Gain
Note 11
25
-
0.1
-
dB
Chrominance to Luminance Delay
Note 11
25
-
7
-
ns
ICC
Full
-
20
25
mA
IEE
Full
-
20
25
mA
EN Input Current
Crosstalk Rejection
VIDEO PARAMETERS
POWER SUPPLY
Supply Current (Output Disabled)
Note 14
Full
-
-
10
mA
PSRR
VS = ±15V to ±20V
Full
65
80
-
dB
±8.5
-
±17.0
V
Supply Voltage Range
NOTES:
2. These parameters are not tested. The limits are guaranteed based on lab characterization and reflect lot to lot variation.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
Slew Rate
Full Power Bandwidth is calculated by: FPBW = ------------------------- ; V PEAK = 5V .
2πV
PEAK
VOUT = 0 to ±200mV.
Settling time to 0.1% with a 10V step. Specified with the channel pre-selected and the output stage enabled. AV = -1.
V OUT = -5V to +5V or +5V to -5V.
The time required for an enabled HA-2444 to switch from one input channel to another. Measured from the 50% point of the digital input to 50%
of the output. AV = +1 for all channels. VOUT switches from 0V to 5V.
The time required to enable the output with a channel preselected. Measured from the 50% point of the Enable input to 4V on the output.
AV = +1 for all channels. VIN = 5V for the selected channel.
VIN = 5VP-P, f = 5MHz, for one of the 3 unselected channels. VIN = 0 for the selected channel. AV = +1 for all channels.
V IN = 200mVRMS .
Tested with a VM700A video tester using a NTC-7 Composite input signal.
VOUT = ±10V, VEN = 2.4V, 50% Duty Cycle Max.
VOUT = ±5V, VEN = 0.8V.
Applies to ICC and IEE. VOUT = 0V, VEN = 0.8V.
3
HA-2444
Die Characteristics
PASSIVATION:
DIE DIMENSIONS:
Type: Nitride over Silox
Silox Thickness: 12kÅ ±2kÅ
Nitride Thickness: 3.5kÅ ±1.5kÅ
74 mils x 103 mils x 19 mils
1880µm x 2620µm x 483µm
METALLIZATION:
TRANSISTOR COUNT:
Type: Al, 1% Cu
Thickness: 16kÅ ±2kÅ
129
PROCESS:
SUBSTRATE POTENTIAL (Powered Up):
Bipolar Dielectric Isolation
V-
Metallization Mask Layout
HA-2444
EN
2
GND
1
D0
D1
8
7
+IN2
+IN4
-IN2
-IN4
V-
V+
+IN1
+IN3
6
3
4
5
-IN3
-IN1
4
OUT
HA-2444
Dual-In-Line Plastic Packages (PDIP)
E16.3 (JEDEC MS-001-BB ISSUE D)
16 LEAD DUAL-IN-LINE PLASTIC PACKAGE
N
E1
INDEX
AREA
1 2 3
INCHES
N/2
-B-
-AE
D
BASE
PLANE
-C-
A2
SEATING
PLANE
A
L
D1
e
B1
D1
A1
eC
B
0.010 (0.25) M C A B S
MILLIMETERS
SYMBOL
MIN
MAX
MIN
MAX
NOTES
A
-
0.210
-
5.33
4
A1
0.015
-
0.39
-
4
A2
0.115
0.195
2.93
4.95
-
B
0.014
0.022
0.356
0.558
-
C
L
B1
0.045
0.070
1.15
1.77
8, 10
eA
C
0.008
0.014
C
D
0.735
0.775
18.66
eB
NOTES:
1. Controlling Dimensions: INCH. In case of conflict between English and
Metric dimensions, the inch dimensions control.
0.005
-
0.13
-
5
0.300
0.325
7.62
8.25
6
E1
0.240
0.280
6.10
7.11
5
e
0.100 BSC
eA
0.300 BSC
eB
-
4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS-3.
L
0.115
N
8. B1 maximum dimensions do not include dambar protrusions. Dambar
protrusions shall not exceed 0.010 inch (0.25mm).
9. N is the maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3,
E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).
5
5
E
3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication No. 95.
7. eB and eC are measured at the lead tips with the leads unconstrained.
eC must be zero or greater.
0.355
19.68
D1
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
5. D, D1, and E1 dimensions do not include mold flash or protrusions.
Mold flash or protrusions shall not exceed 0.010 inch (0.25mm).
6. E and eA are measured with the leads constrained to be perpendicular to datum -C- .
0.204
16
2.54 BSC
7.62 BSC
0.430
-
0.150
2.93
10.92
3.81
16
6
7
4
9
Rev. 0 12/93
HA-2444
Small Outline Plastic Packages (SOIC)
M16.3 (JEDEC MS-013-AA ISSUE C)
N
16 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE
INDEX
AREA
0.25(0.010) M
H
B M
INCHES
E
-B1
2
3
L
SEATING PLANE
-A-
h x 45o
A
D
-C-
e
A1
B
0.25(0.010) M
C
0.10(0.004)
C A M
SYMBOL
MIN
MAX
MIN
MAX
NOTES
A
0.0926
0.1043
2.35
2.65
-
A1
0.0040
0.0118
0.10
0.30
-
B
0.013
0.0200
0.33
0.51
9
C
0.0091
0.0125
0.23
0.32
-
D
0.3977
0.4133
10.10
10.50
3
E
0.2914
0.2992
7.40
7.60
4
e
µα
B S
0.050 BSC
1.27 BSC
-
H
0.394
0.419
10.00
10.65
-
h
0.010
0.029
0.25
0.75
5
L
0.016
0.050
0.40
N
α
NOTES:
MILLIMETERS
16
0o
1.27
16
8o
0o
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
6
7
8o
Rev. 0 12/93
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above
the seating plane, shall not exceed a maximum value of 0.61mm (0.024
inch)
10. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site www.intersil.com
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