HA4344B 350MHz, 4 x 1 Video Crosspoint Switch with Synchronous Controls June 1998 Features Description • Low Power Dissipation . . . . . . . . . . . . . . . . . . . 105mW The HA4344B is a very wide bandwidth 4 x 1 crosspoint switch ideal for professional video switching, HDTV, computer display routing, and other high performance applications. This circuit features very low power dissipation, excellent differential gain and phase, high off isolation, symmetric slew rates, fast switching, and latched control signals. When disabled, the output is switched to a high impedance state, making the HA4344B ideal for matrix routers. • Symmetrical Slew Rates . . . . . . . . . . . . . . . . . 1400V/µs • 0.1dB Gain Flatness. . . . . . . . . . . . . . . . . . . . . . 100MHz • -3dB Bandwidth . . . . . . . . . . . . . . . . . . . . . . . . . 350MHz • Off Isolation (100MHz) . . . . . . . . . . . . . . . . . . . . . . 70dB • Crosstalk Rejection (30MHz). . . . . . . . . . . . . . . . . 80dB The latched control signals allow for synchronized channel switching. When CK1 is low the master control latch loads the next switching address (A0, A1, CS), while the closed (assuming CK2 is the inverse of CK1) slave control latch maintains the crosspoint in its current state. CK2 switching low closes the master latch (with previous assumption), loads the now open slave latch, and switches the crosspoint to the newly selected channel. Channel selection is asynchronous (changes with any control signal change) if both CK1 and CK2 are low. • Differential Gain and Phase . . . . . 0.01%/0.01Degrees • High ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . >2000V • TTL Compatible Control Signals • Latched Control Lines for Synchronous Switching Applications • Professional Video Switching and Routing Ordering Information • RGB Video Distribution Systems PART NUMBER • Computer Graphics • RF Switching and Routing Pinout TEMP. RANGE (oC) PKG. NO. PACKAGE HA4344BCB 0 to 70 16 Ld SOIC M16.15 HA4344BCB96 0 to 70 16 Ld SOIC Tape and Reel M16.15 Functional Diagram HA4344B (SOIC) TOP VIEW IN0 1 16 V+ GND 2 15 A0 IN1 3 14 A1 GND 4 13 CS IN2 5 12 OUT GND 6 11 CK2 IN3 7 10 CK1 GND 8 EN0 DL Q C DL Q C DL Q C DL Q C EN2 DL Q C DL Q C EN3 DL Q C DL Q C EN1 A0 DECODE A1 CS CK1 CK2 IN0 IN1 OUT IN2 IN3 100kΩ 100kΩ 9 V- Timing Diagram CK1 CK2 A0, A1, CS OUT CHX CHX CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999 1 CHY CHZ CHY CHX CHX CHZ CHZ File Number 3956.2 HA4344B Absolute Maximum Ratings Thermal Information Voltage Between V+ and V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12V Input Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VSUPPLY Digital Input Current (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . ±25mA Analog Input Current (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . ±5mA Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA ESD Rating Human Body Model (Per MIL-STD-883 Method 3015.7) . . 2000V Thermal Resistance (Typical, Note 1) θJA (oC/W) SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115 Maximum Junction Temperature (Die). . . . . . . . . . . . . . . . . . . . 175oC Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC (SOIC - Lead Tips Only) Operating Conditions Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. θJA is measured with the component mounted on an evaluation PC board in free air. 2. If an input signal is applied before the supplies are powered up, the input current must be limited to these maximum values. Electrical Specifications VSUPPLY = ±5V, RL = 10kΩ, VCS = 0.8V, Unless Otherwise Specified (NOTE 4) TEMP. (oC) MIN TYP MAX UNITS Full ±4.5 ±5.0 ±5.5 V VCS = 0.8V 25, 70 - 10.5 13 mA VCS = 0.8V 0 - - 15.5 mA VCS = 2.0V 25, 70 - 400 450 µA VCS = 2.0V 0 - 400 580 µA 25, 70 ±2.7 ±2.8 - V 0 ±2.4 ±2.5 - V Output Current Full 15 20 - mA Input Bias Current Full - 30 50 µA Output Offset Voltage Full -10 - 10 mV Output Offset Voltage Drift (Note 3) Full - 25 50 µV/°C Turn-On Time 25 - 160 - ns Turn-Off Time 25 - 320 - ns Output Glitch During Switching 25 - ±10 - mV Input Logic High Voltage Full 2 - - V Input Logic Low Voltage Full - - 0.8 V PARAMETER TEST CONDITIONS DC SUPPLY CHARACTERISTICS Supply Voltage Supply Current (VOUT = 0V) ANALOG DC CHARACTERISTICS Output Voltage Swing Without Clipping VOUT = VIN ±VIO ±20mV SWITCHING CHARACTERISTICS DIGITAL DC CHARACTERISTICS CLK1, CLK2 Input Current 0 to 4V Full - 40 50 µA CS, A0, A1 Input Current 0 to 4V Full -2 - 2 µA 1VP-P 25 - 0.055 0.063 dB Full - 0.07 0.08 dB Full - ±0.004 ±0.006 dB AC CHARACTERISTICS Insertion Loss Channel-to-Channel Insertion Loss Match 2 HA4344B Electrical Specifications VSUPPLY = ±5V, RL = 10kΩ, VCS = 0.8V, Unless Otherwise Specified (Continued) (NOTE 4) TEMP. (oC) MIN TYP MAX UNITS RS = 47Ω, CL = 10pF 25 - 350 - MHz RS = 29Ω, CL = 20pF 25 - 300 - MHz RS = 16Ω, CL = 33pF 25 - 220 - MHz RS = 9Ω, CL = 52pF 25 - 160 - MHz RS = 47Ω, CL = 10pF 25 - 150 - MHz RS = 29Ω, CL = 20pF 25 - 110 - MHz RS = 16Ω, CL = 33pF 25 - 100 - MHz RS = 9Ω, CL = 52pF 25 - 70 - MHz Input Resistance Full 200 400 - kΩ Input Capacitance Full - 1.5 - pF Enabled Output Resistance Full - 15 - Ω PARAMETER TEST CONDITIONS -3dB Bandwidth ±0.1dB Flat Bandwidth Disabled Output Capacitance VCS = 2.0V Full - 2.5 - pF Differential Gain 4.43MHz, Note 3 25 - 0.01 0.02 % Differential Phase 4.43MHz, Note 3 25 - 0.01 0.02 Degrees Off Isolation 1VP-P, 100MHz, VCS = 2.0V Full - 70 - dB Crosstalk Rejection 1VP-P, 30MHz Full - 80 - dB Slew Rate (1.5VP-P, +SR/-SR) RS = 47Ω, CL = 10pF 25 - 1400/1490 - V/µs RS = 29Ω, CL = 20pF 25 - 1200/1260 - V/µs RS = 16Ω, CL = 33pF 25 - 870/940 - V/µs RS = 9Ω, CL = 52pF 25 - 750/710 - V/µs Full - 0.01 0.1 % Full - 12 - MΩ Total Harmonic Distortion (Note 3) Disabled Output Resistance VCS = 2.0V NOTES: 3. This parameter is not tested. The limits are guaranteed based on lab characterization, and reflect lot-to-lot variation. 4. Units are 100% tested at 25oC; guaranteed, but not tested at 0oC and 70oC. AC Test Circuit 500Ω 400Ω 510Ω HA4344B RS VIN 75Ω + VOUT HFA1100 75Ω CX 10kΩ NOTE: CL = CX + Test Fixture Capacitance. 3 HA4344B Small Outline Plastic Packages (SOIC) M16.15 (JEDEC MS-012-AC ISSUE C) N INDEX AREA H 0.25(0.010) M 16 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE B M E INCHES -B- 1 2 SYMBOL 3 L SEATING PLANE -A- h x 45o A D -C- e C 0.10(0.004) C A M B S NOTES: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. MAX MILLIMETERS MIN MAX NOTES A 0.0532 0.0688 1.35 1.75 - A1 0.0040 0.0098 0.10 0.25 - B 0.013 0.020 0.33 0.51 9 C 0.0075 0.0098 0.19 0.25 - D 0.3859 0.3937 9.80 10.00 3 E 0.1497 0.1574 3.80 4.00 4 e A1 B 0.25(0.010) M α MIN 0.050 BSC 1.27 BSC - H 0.2284 0.2440 5.80 6.20 - h 0.0099 0.0196 0.25 0.50 5 L 0.016 0.050 0.40 1.27 6 N α 16 0o 16 8o 0o 7 8o Rev. 0 12/93 All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (321) 724-7000 FAX: (321) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 4 ASIA Intersil (Taiwan) Ltd. Taiwan Limited 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029