T NT DUC PRO LACEME r at E T E EP nte OL OBS ENDED R pport Ce m/tsc u M c S . l M l i o ECO echnica w.inters T w NO RData r w u December 1995, Rev. F IL or act o Sheet cont -INTERS 1-888 ® EL2030 120MHz Current Feedback Amplifier Features The EL2030 is a very fast, wide bandwidth amplifier optimized for gains between -10 and +10. Built using the Elantec monolithic Complementary Bipolar process, this amplifier uses current mode feedback to achieve more bandwidth at a given gain than a conventional voltage feedback operational amplifier. • -3dB bandwidth = 120MHz, AV = 1 Due to its wide operating supply range (±15V) and extremely high slew rate of 2000V/µs, the EL2030 drives ±10V into 200Ω at a frequency of 30MHz, while achieving 110MHz of small signal bandwidth at AV = +2. This bandwidth is still 95MHz for a gain of +10. On ±5V supplies the amplifier maintains a 90MHz bandwidth for AV = +2. When used as a unity gain buffer, the EL2030 has a 120MHz bandwidth with the gain precision and low distortion of closed loop buffers. • Slew rate 2000V/µs The EL2030 features extremely low differential gain and phase, a low noise topology that reduces noise by a factor of 2 over competing amplifiers, and settling time of 40ns to 0.25% for a 10V step. The output is short circuit protected. In addition, datasheet limits are guaranteed for ±5V and ±15V supplies. • Settling time of 40ns to 0.25% for a 10V step Elantec's products and facilities comply with applicable quality specifications. See Elantec document, QRA-1: Processing, Monolithic Integrated Circuits. • -3dB bandwidth = 110MHz, AV = 2 • 0.01% differential gain and 0.01° differential phase (NTSC, PAL) • 0.05% differential gain and 0.02° differential phase (HDTV) • 65mA output current • Drives ±10V into 200Ω load • Characterized at ±5V and ±15V • Low voltage noise • Current mode feedback • Output short circuit protected • Low cost Applications • Video gain block • Video distribution amplifier • HDTV amplifier • Residue amplifiers in ADC Ordering Information TEMP. RANGE PACKAGE PKG. NO. • Current to voltage converter EL2030CN -40°C to +85°C 8-Pin PDIP MDP0031 • Coax cable driver EL2030CM -40°C to +85°C 20-Pin SOL MDP0027 PART NUMBER FN7028 Pinouts EL2030 (8-PIN PDIP) TOP VIEW EL2030 (20-PIN SOL) TOP VIEW NOTE: Non-Designated pins are no connects and are not electrically connected internally. Manufactured under U.S. Patent No. 4,893,091. 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2003. All Rights Reserved. Elantec is a registered trademark of Elantec Semiconductor, Inc. All other trademarks mentioned are the property of their respective owners. EL2030 Absolute Maximum Ratings (TA = 25°C) VS VIN VIN PD IIN IOP Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . ±18V or 36V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±15V or VS Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . .±6V Maximum Power Dissipation . . . . . . . . . . . . . . . . See Curves Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±10mA Peak Output Current . . . . . . . . . . . . . .Short Circuit Protected Output Short Circuit Duration . . . . . . . . . . . . . . . . . . . . . Continuous A heat sink is required to keep the junction temperature below absolute maximum when the output is shorted. TA TJ TST Operating Temperature Range . . . . . . . . . . . .-40°C to +85°C Operating Junction Temperature Plastic Packages. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C Storage Temperature . . . . . . . . . . . . . . . . . .-65°C to +150°C CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA Open Loop DC Electrical Specifications VS = ±15V, RL = 200Ω, unless otherwise specified PARAMETER VOS DESCRIPTION Input Offset Voltage CONDITION VS = ±15V TEMP MIN 25°C TYP MAX UNITS 10 20 mV 30 mV 10 mV 15 mV TMIN, TMAX VS = ±5V 25°C 5 TMIN, TMAX VOS/T Offset Voltage Drift +IIN +Input Current 25 VS = ±5V, ±15V 25°C 5 TMIN, TMAX -IIN -Input Current VS = ±5V, ±15V 25°C 10 TMIN, TMAX +RIN +Input Resistance Full CIN Input Capacitance 25°C CMRR Common Mode Rejection Ratio (Note 1) -ICMR Input Current Common Mode Rejection (Note 1) VS = ±5V, ±15V Full 1.1 50 25°C Power Supply Rejection Ratio (Note 2) +IPSR +Input Current Power Supply Rejection (Note 2) Full 25°C -Input Current Power Supply Rejection (Note 2) Transimpedance (VOUT/(-IIN)) VOUT = ±10V VS = ±15V VOUT = ±2.5V (Note 3) VS = ±5V 88 TMIN, TMAX 75 25°C 80 TMIN, TMAX AVOL VO IOUT µA 50 µA dB 10 µA/V 20 µA/V 70 0.5 25°C 40 60 TMIN, TMAX ROL µA pF 0.1 25°C 25 1 TMIN, TMAX -IPSR µA MΩ 5 60 15 2.0 TMIN, TMAX PSRR µV/°C 150 dB 0.5 µA/V 1.0 µA/V 5.0 µA/V 8.0 µA/V V/mA V/mA 120 V/mA 70 V/mA Open Loop DC Voltage Gain VOUT = ±10V VS = ±15V Full 60 70 dB VOUT = ±2.5V (Note 3) VS = ±5V Full 56 65 dB Output Voltage Swing (Note 3) VS = ±15V Full 12 13 V VS = ±5V Full 3 3.5 V VS = ±15V Full 60 65 mA VS = ±5V Full 30 35 mA Output Current (Note 4) 2 EL2030 Open Loop DC Electrical Specifications VS = ±15V, RL = 200Ω, unless otherwise specified (Continued) PARAMETER DESCRIPTION ROUT Output Resistance IS Quiescent Supply Current ISC Short Circuit Current CONDITION TEMP MIN TYP 25°C 5 Full 15 25°C 85 MAX UNITS Ω 21 mA mA NOTES: 1. VCM = ±10V for VS = ±15V. For VS = ±5V, VCM = ±2.5V. 2. VOS is measured at VS = ±4.5V and at VS = ±18V. Both supplies are changed simultaneously. 3. RL = 100Ω. 4. For VS = ±15V, VOUT = ±10V. For VS ±5V, VOUT = ±2.5V. Closed Loop AC Electrical Characteristics PARAMETER VS = ±15V, AV = +2, RF = 820Ω, RG = 820Ω and RL = 200Ω DESCRIPTION CONDITION TEMP MIN TYP MAX UNITS SR Slew Rate (Note 1) 25°C 1200 2000 V/µs FPBW Full Power Bandwidth (Note 2) 25°C 19 31.8 MHz tR, tF Rise Time. Fall Time 25°C 3 ns tS Settling Time to 0.25% for 10V step (Note 3) 25°C 40 ns G Differential Gain (Note 4) 25°C 0.01 % p-p Differential Phase (Note 4) 25°C 0.01 ° p-p Input Spot Noise at 1kHz RG = 101; RF = 909 25°C 4 nV ⁄ Hz eN VPP = 250mV NOTES: 1. VO = ±10V, tested at VO = ±5. See test circuit. 2. Full Power Bandwidth is specified based on Slew Rate measurement FPBW = SR/2πVP. 3. Settling Time measurement techniques are shown in: “Take The Guesswork Out of Settling Time Measurements', EDN, September 19, 1985. Available from the factory upon request. 4. NTSC (3.58MHz) and PAL (4.43MHz). 3 EL2030 Typical Performance Curves FIGURE 1. NTSC VIDEO DIFFERENTIAL GAIN AND PHASE TEST SET-UP Differential Gain and Phase vs Load Resistance, Gain = +1 Differential Gain and Phase vs Load Capacitance, Gain = +1 Differential Gain and Phase vs Supply Voltage, Gain = +1 Differential Gain and Phase vs Load Resistance, Gain = +2 Differential Gain and Phase vs Load Capacitance, Gain = +2 Differential Gain and Phase vs Supply Voltage, Gain = +2 4 EL2030 Typical Performance Curves (Continued) FIGURE 2. HDTV AND WIDEBAND VIDEO DIFFERENTIAL GAIN AND PHASE TEST SET-UP Differential Gain Error vs Frequency for Various DC Output Levels Risetime and Overshoot vs RF for AV = +1 5 Differential Phase Error vs Frequency for Various DC Output Levels Bandwidth and Peaking vs RF for AV = +1 ±Slew Rate vs Supply Voltage EL2030 Typical Performance Curves Risetime and Overshoot vs RF for AV = +2 Risetime and Overshoot vs RF for AV = +10 Risetime and Overshoot vs RF for AV = +2, VS = ±5V 6 (Continued) Bandwidth and Peaking vs RF for AV = +2 Bandwidth and Peaking vs RF for AV = +10 Bandwidth and Peaking vs RF for AV = +2, VS = +5V -3dB Bandwidth vs Supply Voltage Voltage Gain vs Frequency for AV = +2, Various Capacitive Loads Output Settling Error vs Time EL2030 Typical Performance Curves (Continued) Output Settling Error vs Time, VS = ±5V Input Offset Voltage vs Temperature Output Swing vs Supply Voltage Transimpedance (ROL) Current Limit vs Temperature Power Supply Rejection vs Frequency 7 Input Bias Current vs Temperature Supply Current vs Supply Voltage Common Mode Rejection vs Frequency EL2030 Typical Performance Curves (Continued) Long-Term Output Settling Error vs Time Equivalent Input Noise 8-Pin Plastic DIP Maximum Power Dissipation vs Ambient Temperature Large Signal Response AV = +1, RF = 1 kΩ, RL = 200Ω, VS = ±15V Large Signal Response AV = +10, RF = 750, RG = 82Ω, RL = 200Ω, VS = ±15V 8 Long-Term Output Settling Error vs Time, VS = ±5V 20-Pin SOL Maximum Power Dissipation vs Ambient Temperature Large Signal Response AV = +2, RF = RG = 820, RL = 200Ω, VS = ±15V Large Signal Response AV = +2, RF = RG = 750Ω, RL = 200Ω, VS = ±15V EL2030 Burn-In Circuit In addition, the EL2030 will be destroyed or damaged in the same way for momentary power supply voltage reversals. This could happen, for example, during a power turn on transient, or if the power supply voltages were oscillating and the positive rail were instantaneously negative with respect to the negative rail or vice versa. Differential Gain and Differential Phase ALL PACKAGES USE THE SAME SCHEMATIC Test Circuit Application Information Product Description The EL2030 is a current mode feedback amplifier similar to the industry standard EL2020, but with greatly improved AC characteristics. Most significant among these are the extremely wide bandwidth and very low differential gain and phase. In addition, the EL2030 is fully characterized and tested at ±5V and ±15V supplies. Power Supply Bypassing/Pin Dressing It is important to bypass the power supplies of the EL2030 with 0.1µF ceramic disc capacitors. Although the pin length is not critical, it should not be more the 1/2 inch from the IC pins. Failure to do this will result in oscillation, and possible destruction of the part. Another important detail is the pin length of the inputs. The inputs should be designed with minimum stray capacitance and short pin lengths to avoid ringing and distortion. Latch Mode The EL2030 can be damaged in certain circumstances resulting in catastrophic failure in which destructive supply currents flow in the device. Specifically, an input signal greater than ±5 volts at currents greater than 5mA is applied to the device when the power supply voltages are zero will result in failure of the device. 9 Composite video signals contain intensity, color, hue, timing and audio information in AM, FM, and Phase Modulation. These video signals pass through many stages during their production, processing, archiving and transmission. It is important that each stage not corrupt these signals to provide a “high fidelity” image to the end viewer. An industry standard way of measuring the distortion of a video component (or system) is to measure the amount of differential gain and phase error it introduces. A 100mV peak to peak sine wave at 3.58MHz for NTSC (4.3MHz for PAL), with 0V DC component serves as the reference. The reference signal is added to a DC offset, shifting the sine wave from 0V to 0.7V which is then applied to the device under test (DUT). The output signal from the DUT is compared to the reference signal. The Differential Gain is a measure of the change in amplitude of the sine wave and is measured in percent. The Differential Phase is a measure of the change in the phase of the sine wave and is measured in degrees. Typically, the maximum positive and negative deviations are summed to give peak differential gain and differential phase errors. The test setup in Figure 1 was used to characterize the EL2030. For higher than NTSC and PAL frequencies, an alternate Differential Gain and Phase measurement can be made using an HP3577A Network Analyzer and the setup shown in Figure 2. The frequency response is normalized to gain or phase with 0V DC at the input. From the normalized value a DC offset voltage is introduced and the Differential Gain or Phase is the deviation from the normalized value. Video Applications The video signals that must be transmitted for modest distances are usually amplified by a device such as the EL2030 and carried via coax cable. There are at least two ways to drive cables, single terminated and double terminated. When driving a cable, it is important to terminate it properly to avoid unwanted signal reflections. Single termination (75Ω to ground at receive end) may be sufficient for less demanding applications. In general, a double terminated cable (75Ω in series at drive end and 75Ω to ground at receive end) is preferred since the impedance match at both ends of the line will absorb signal reflections. However, when double termination is used (a total impedance of 150Ω), the received signal is reduced by half; therefore, the amplifier is usually set at a gain of 2 or higher to compensate for attenuation. EL2030 Video signals are 1V peak-peak in amplitude, from sync tip to peak white. There are 100 IRE (0.714V) of picture (from black to peak white of the transmitted signal) and 40 IRE (0.286V) of sync in a composite video signal (140 IRE = 1V). For video applications where a gain of two is used (double termination), the output of the video amplifier will be a maximum of 2V peak-peak. With ±5V power supply, the EL2030 output swing of 3.5V is sufficient to satisfy the video output swing requirements. The EL2030 can drive two double terminated coax cables under these conditions. With ±15V supplies, driving four double terminated cables is feasible. Although the EL2030's video characteristics (differential gain and phase) are impressive with ±5V supplies at NTSC and PAL frequencies, it can be optimized when the supplies are increased to ±15V, especially at 30MHz HDTV applications. This is primarily due to a reduction in internal parasitic junction capacitance with increased power supply voltage. Equivalent Circuit 10 The following table summarizes the behavior of the EL2030 at ±5V and ±15V for NTSC. In addition, 30MHz HDTV data is included. Refer to the differential gain and phase typical performance curves for more data. ±VS RLOAD AV GAIN PHASE COMMENTS 15V 75Ω 1 0.02% 0.03° Single terminated 15V 150Ω 1 0.02% 0.02° Double terminated 5V 150Ω 1 0.05% 0.02° Double terminated 15V 75Ω 2 0.02% 0.08° Single terminated 15V 150Ω 2 0.01% 0.02° Double terminated 5V 150Ω 2 0.03% 0.09° Double terminated 15V 150Ω 2 0.05% 0.02° HDTV, Double terminated EL2030 EL2030 Macromodel * Revision A. March 1992 * Enhancements include PSRR, CMRR, and Slew Rate Limiting * Connections: +input * | -input * | | +Vsupply * | | | -Vsupply * | | | | output * | | | | | .subckt M2030 3 2 7 4 6 * * Input Stage * e1 10 0 3 0 1.0 vis 10 9 0V h2 9 12 vxx 1.0 r1 2 11 50 l1 11 12 48nH iinp 3 0 5µA iinm 2 0 10µA r12 3 0 2Meg * * Slew Rate Limiting * h1 13 0 vis 600 r2 13 14 1K d1 14 0 dclamp d2 0 14 dclamp * * High Frequency Pole * *e2 30 0 14 0 0.00166666666 l3 30 17 0.5µH c5 17 0 1pF r5 17 0 500 * * Transimpedance Stage * g1 0 18 17 0 1.0 rol 18 0 150K cdp 18 0 2.8pF * * Output Stage * q1 4 18 19 qp q2 7 18 20 qn q3 7 19 21 qn q4 4 20 22 qp r7 21 6 4 r8 22 6 4 ios1 7 19 2.5mA ios2 20 4 2.5mA * * Supply Current * ips 7 4 9mA * * Error Terms * ivos 0 23 5mA 11 EL2030 EL2030 Macromodel (Continued) vxx 23 0 0V e4 24 3 1.0 e5 25 0 7 0 1.0 e6 26 0 4 0 1.0 r9 24 23 3K r10 25 23 1K r11 26 23 1K * * Models * .model qn npn (is=5e-15 bf=100 tf=0.1nS) .model qp pnp (is=5e-15 bf=100 tf=0.1nS) .model dclamp d(is=1e-30 ibv=0.266 bv=3.7 n=4) .ends All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 12