Datasheet

UNISONIC TECHNOLOGIES CO., LTD
UTRS3088
Preliminary
CMOS IC
FAIL-SAFE, 1.0MBPS, RS-485 /
RS-422 TRANSCEIVERS WITH
±15KV ESD-PROTECTED

DESCRIPTION
The UTC UTRS3088 is a half-duplex transceiver designed for
RS-485 data bus network, which contains one transmitter and one
receiver. The UTC UTRS3088 features a fail-safe receiver, which
guarantees the receiver to output high when the receiver inputs are
open, short or idle.
The UTC UTRS3088 also features a hot-swap glitch free
protection circuits which guarantee outputs of both the transmitter and
the receiver in a high impedance state during the power up period. So
that the large short current from power to ground will be disable by
glitch free function, which will save the power and enhance the
efficiency of the power up.
The UTC UTRS3088 is optimized for signal rates up to 1.0Mbps
with differential voltage of 2.3V. The UTC UTRS3088 also has the
thermal shutdown function when the temperature is over 150℃ and
the protection of the current limitation in the transmitter to protect the
itself from the damage by the system-fault conditions during normal
operation.

FEATURES
* Meet the requirements of the EIA/TIA-485 standards.
* 5.0V single power supply.
* 1µA low-current shutdown mode.
* HBM ±15kV ESD protection.
* True fail-safe receiver while maintaining EIA/TIA-485 compatibility.
* Hot-Swap glitch free protection on control inputs.
* Up to 256 transceivers on the bus.
* Maximum baud rate up to 1.0Mbps.
* Transmitter short circuit current limit.
* Thermal shutdown for overload protection.

ORDERING INFORMATION
Ordering Number
UTRS3088G-S08-R
Package
SOP-8
Packing
Tape Reel
UTRS3088G-S08-R
(1)Packing Type
(1) R: Tape Reel
(2)Package Type
(2) S08: SOP-8
(3)Green Package
(3) G: Halogen Free and Lead Free
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UTRS3088
Preliminary

MARKING

PIN CONFIGURATION
RO 1
8 VCC
REB 2
7 B
DE 3
6 A
DI 4

CMOS IC
5 GND
PIN DESCRIPTION
PIN NO.
PIN NAME
1
RO
2
REB
3
DE
4
DI
5
6
7
8
GND
A
B
VCC
DESCRIPTION
Receiver Output: When REB is low and if (A-B) ≥ -50mV, RO is high; if (A-B) ≤ -200mV,
RO is low.
Receiver Output Enable: REB is low to enable the Receiver; REB is high to disable the
Receiver.
Transmitter Output Enable: DE is high to enable the transmitter; DE is low to disable the
transmitter.
Transmitter Input: When DE is high, a low on DI forces A output low and B output high.
Similarly, a high on DI forces A output high and B output low.
Ground pin. Must be connected to 0V.
Non-inverting Receiver Input and Non-inverting Transmitter Output
Inverting Receiver Input and Inverting Transmitter Output
Power Supply Input 5.0V.
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
Preliminary
CMOS IC
BLOCK DIAGRAM
RO 1
RX
8
VCC
REB 2
7
B
3
6
A
DE
DI 4
TX
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5 GND
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Preliminary
CMOS IC
ABSOLUTE MAXIMUM RATING
PARAMETER
SYMBOL
RATINGS
UNIT
Power Supply VCC
VCC
-0.3~8.0
V
Control Input Voltage
REB, DE
-0.3~ (VCC+0.3)
V
Receiver Input Voltage
A, B
±13
V
Receiver Output Voltage
RO
-0.3~ (VCC+0.3)
V
Transmitter Output Voltage
A, B
±13
V
Transmitter Input
DI
-0.3~ (VCC+0.3)
V
Operating Temperature
TOP
-40~+85
°C
Storage Temperature
TSTG
-65~+150
°C
Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.

DC ELECTRICAL CHARACTERISTICS
(VCC=5.0V ±5% with TA= TMIN to TMAX, , unless otherwise specified. Typical values are at VCC=5.0V and TAMB=25°C.)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP MAX UNIT
TRANSMITTER
Differential Transmitter Output
VOD1
No Load
5.0
V
Differential Transmitter Output
VOD2
Fig.1, RL=27Ω
1.5
V
Change in Magnitude of
∆VOD
Fig.1, RL=27Ω
0.2
V
Differential Output Voltage
Transmitter Common- Mode
VOC
Fig.1, RL=27Ω
3.0
V
Output Voltage
Change in Magnitude of
∆VOC
Fig.1, RL=27Ω
0.2
V
Common- Mode Voltage
Input High Voltage
VIH
DE, DI, REB
2.0
V
Input Low Voltage
VIL
DE, DI, REB
0.8
V
Input Current
IIN1
DI
±1
µA
Input Current
IIN2
DE, REB
±50
µA
DI Input Hysteresis
VHYS
100
mV
VIN=12V
125
µA
DE=GND,
Input Current (A and B)
IIN3
VCC=GND or 5.25V
VIN=-7V
-75
µA
-250
mA
-7V≤VOUT≤VCC
Transmitter Short-Circuit
IOS
Output Current
0V≤VOUT≤12V
250
mA
RECEIVER
Receiver Differential Threshold
VTH
-7V≤VCM≤+12V
-200
-125 -50
mV
Voltage
Receiver Input Hysteresis
∆VTH
25
mV
Receiver Output High Voltage
VOH
IO=-4mA, VID=-50mV
VCC-1.5
V
Receiver Output Low Voltage
VOL
IO=4mA, VID=-200mV
0.5
V
Three- State Output Current at
IOZR
0.4V≤VCM≤2.4V
±1
µA
Receiver
Receiver Input Resistance
RIN
-7V≤VCM≤+12V
96
kΩ
Receiver Output Short-Circuit
IOSR
Fig.6 , 0V≤VRO≤VCC
±7
±95
mΑ
Current
SUPPLY CURRENT
DE=VCC
420
600
µA
No Load,
Supply Current
ICC
REB=GND,
DE=GND
320
500
µA
DI=VCC or GND.
Supply Current in Shutdown
ISHDN
REB=VCC, DE=GND
1.0
15
µA
Mode
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Preliminary
CMOS IC
SWITCHING CHARACTERISTICS
(VCC=5.0V ±5% with TA= TMIN to TMAX, unless otherwise specified. Typical values are at VCC=5.0V and TAMB=25°C.)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP MAX UNIT
Fig.2 and 7, RDIFF=54Ω,
70
200
ns
Transmitter Input to Output
tDPLH, tDPHL
CL1=CL2= 100pF
Fig.2 and 7, RDIFF=54Ω,
Transmitter Output Skew
tDSKEW
10
ns
| tDPLH - tDPHL |
CL1=CL2= 100pF
Fig.2 and 7, RDIFF=54Ω,
40
150
ns
Transmitter Rise or Fall Time
tDF, tDR
CL1=CL2= 100pF
Maximum Data Rate
fMAX
1.0
Mbps
Transmitter Enable to Output
tDZL
Fig.4 and 8, CDL=100pF, S1 Closed
150
ns
Low
Transmitter Enable to Output
tDZH
Fig.4 and 8, CDL=100pF, S2 Closed
150
ns
High
Transmitter Disable Time
tDLZ
Fig.4 and 8, CDL=15pF, S1 Closed
150
ns
from Low
Transmitter Disable Time
tDHZ
Fig.4 and 8, CDL=15pF, S2 Closed
150
ns
from High
Fig.5 and 9 , |VID|≥2.0V; Rise and
900
1200
ns
Receiver Input to Output
tRPLH, tRPHL
Fall Time of VID≤15ns
Fig.5 and 9 , |VID|≥2.0V; Rise and
| tRPLH – tRPHL | Different
tRSKD
10
ns
Receiver Skew
Fall Time of VID≤15ns
Fig.3 and 10, CRL=100pF, S1
Receiver Enable to Output
tRZL
60
150
ns
Low
Closed
Fig.3 and 10, CRL=100pF, S2
Receiver Enable to Output
tRZH
60
150
ns
High
Closed
Fig.3 and 10, CRL=100pF, S1
Receiver Disable Time from
tRLZ
60
150
ns
Low
Closed
Fig.3 and 10, CRL=100pF, S2
Receiver Disable Time from
tRHZ
60
150
ns
High
Closed
Time to Shutdown
tSHDN
500
1000
ns
Transmitter Enable from
tDZL(SHDN) Fig.4 and 8, CDL=15pF, S1 Closed
2500
ns
Shutdown to Output Low
Transmitter Enable from
tDZH(SHDN) Fig.4 and 8, CDL=15pF, S2 Closed
2500
ns
Shutdown to Output High
Receiver Enable from
Fig.3 and 10, CRL=100pF, S1
tRZL(SHDN)
3500
ns
Shutdown to Output Low
Closed
Receiver Enable from
Fig.3 and 10, CRL=100pF, S2
tRZH(SHDN)
3500
ns
Shutdown to Output High
Closed
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
Preliminary
CMOS IC
FUNCTION TABLE
Table 1 TRANSMITTING
REB
X
X
0
1
INPUTS
DE
1
1
0
0
OUTPUTS
DI
0
1
X
X
A
0
1
High-Z
B
1
0
High-Z
Shutdown
Table 2 RECEIVING
INPUTS
DE
X
X
X
1
0
REB
A-B
0
≥-0.05V
0
≤-0.2V
0
Open/Shorted
1
X
1
X = Don’t care
Shutdown mode, driver and receiver outputs high impedance
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OUTPUTS
RO
1
0
1
High-Z
Shutdown
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Preliminary
CMOS IC
TEST CIRCUIT

A
1K
B
Rx
VCC
VCC
DE
S1
S1
CRL
1K
CDL
VDC
Tx
500
A
REB
S2
S2
Fig. 3 Receiver Enable/Disable Timing Test Circuit
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B
Fig. 4 Transmitter Enable/Disable Timing Test Circuit
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Preliminary
CMOS IC
TEST CIRCUIT (Cont.)

VOH
RO
1.5V
1.5V
REB
3V
0V
Output
VOL
1.5V
1.5V
tRZL
tRLZ
VCC
RO
tRPHL
tRPLH
A
Input
B -1V
Fig. 9 Receiver Propagation Delays
RO
VOL
VOH
0
1.5V
Output Normally Low
VOL+0.5V
Output Normally High
1.5V
tRZH
VOH-0.5V
tRHZ
Fig. 10 Receiver Enable and Disable Times
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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