UNISONIC TECHNOLOGIES CO., LTD UTRS3085 Preliminary CMOS IC FAIL-SAFE, 500KBPS, RS-485 / RS-422 TRANSCEIVERS WITH ±15KV ESD-PROTECTED DESCRIPTION The UTC UTRS3085 high-speed transceivers for RS-485/RS-422 communication contain one driver and one receiver. The device features fail-safe circuitry, which guarantees a logic-high receiver output when the receiver inputs are open or shorted. This means that the receiver output will be logic high if all transmitters on a terminated bus are disabled (high impedance). The UTC UTRS3085 offer higher driver output slew-rate limits, allowing transmission up to 500kbps. The transceiver typically draws 375µA of supply current when unloaded or when fully loaded with the drivers disabled. A device has a 1/8-unit-load receiver input impedance that allows up to 256 transceivers on the bus. FEATURES * True fail-safe receiver while maintaining EIA/TIA-485 compatibility. * Enhanced slew-rate limiting facilitates Error-Free data transmission. * 5.0V single power supply. * 1µA low-current shutdown mode. * Allow up to 256 transceivers on the Bus. * HBM ±15kV ESD-protected. * Driver short circuit current limit. * Thermal shutdown for overload protection. ORDERING INFORMATION Ordering Number UTRS3085G-S08-R Package SOP-8 Packing Tape Reel MARKING www.unisonic.com.tw Copyright © 2015 Unisonic Technologies Co., Ltd 1 of 8 QW-R113-015.a UTRS3085 CMOS IC PIN CONFIGURATION RO 1 8 VCC RE 2 7 B DE 3 6 A DI 4 5 GND PIN DESCRIPTION PIN NO. 1 PIN NAME RO 2 RE 3 DE 4 DI 5 6 7 8 GND A B VCC Preliminary DESCRIPTION Receiver output. Receiver output enable. Drive RE low to enable RO; RO is high impedance when RE is high. Drive RE high and DE low to enter low-power shutdown mode. Driver output enable. Drive DE high to enable driver outputs. These outputs are high impedance when DE is low. Drive RE high and DE low to enter low-power shutdown mode. Driver input. With DE high, a low on DI forces non-inverting output low and inverting output high. Similarly, a high on DI forces non-inverting output high and inverting output low. Ground Non-inverting receiver input and non-inverting driver output Inverting receiver input and inverting driver output Positive supply, 4.75V≤VCC≤5.25V BLOCK DIAGRAM RO 1 R 8 VCC RE 2 7 B DE 3 6 A DI 4 D UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 5 GND 2 of 8 QW-R113-015.a UTRS3085 Preliminary CMOS IC ABSOLUTE MAXIMUM RATING PARAMETER SYMBOL VCC Supply Voltage Control Input Voltage ( RE , DE) RATINGS +7.0 UNIT V -0.3~(VCC+0.3) V -0.3~(VCC+0.3) V Special Input Voltage (H/ F , SRL, TXP, RXP). Driver Input Voltage DI -0.3~(VCC+0.3) V Driver Output Voltage (A, B, Y, Z) ±13 V Receiver Input Voltage (A, B) ±13 V Receiver Input Voltage, Full Duplex (A, B) ±25 V Receiver Output Voltage (RO) -0.3~(VCC+0.3) V Continuous Power Dissipation Derate 5.88mW/°C above +70°C 471 mW Operating Temperature Ranges TOPR -40~+85 °C Storage Temperature Range TSTG -65~+150 °C Lead Temperature (Soldering, 10sec) TL +300 °C Note: Absolute maximum ratings are only stress ratings and it is not implied for functional device operation. Absolute maximum ratings are the values beyond which the device will be damaged permanently. DC ELECTRICAL CHARACTERISTICS (VCC=+5.0V ±5%, TA=TMIN to TMAX, unless otherwise noted. Typical values are at VCC=+5.0V and TA=+25°C) (Note 1) PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT DRIVER Differential Driver Output VOD1 Fig.1 5.0 V (No Load) Fig.1, R=50Ω (RS-422) 1.8 V Differential Driver Output VOD2 Fig.1, R=27Ω (RS-485) 1.2 V Change in Magnitude of Differential Output Voltage ∆VOD Fig.1, R=50Ω or R=27Ω 0.2 V (Note 2) Driver Common-Mode Output VOC Fig.1, R=50Ω or R=27Ω 3 V Voltage Change In Magnitude of Common-Mode Voltage ∆VOC Fig.1, R=50Ω or R=27Ω 0.2 V (Note 2) Input High Voltage VIH1 DE, DI, RE , H/ F , TXP, RXP Input Low Voltage VIL1 DI Input Hysteresis VHYS DE, DI, RE , H/ F , TXP, RXP SRL=VCC or Unconnected SRL Input Current IIN1 DE, DI, RE IIN2 H/ F , TXP, RXP, Internal Pull-down SRL SRL (Note 3) SRL SRL=VCC SRL=GND (Note 3) DE=GND, VIN=12V VCC=GND or 5.25V VIN=-7V DE=GND, VIN=12V VCC=GND or 5.25V VIN=-7V -7V≤VOUT≤VCC 0V≤VOUT≤12V 0V≤VOUT≤VCC Input High Voltage Input Middle Voltage Input Low Voltage VIH2 VIM2 VIL2 SRL Input Current IIN3 Input Current (A and B) Full Duplex IIN4 Output Leakage (Y and Z) Full Duplex IO Driver Short-Circuit Output Current (Note 4) VOD1 UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 2.0 V 0.8 100 10 VCC-0.8 0.4VCC mV ±2 µA 40 µA 0.6VCC 0.8 75 -75 125 -75 125 -100 -250 250 ±25 V V V V µA µA µA µA µA µA mA mA mA 3 of 8 QW-R113-015.a UTRS3085 Preliminary CMOS IC DC ELECTRICAL CHARACTERISTICS (Cont.) PARAMETER SYMBOL TEST CONDITIONS RECEIVER Receiver Differential Threshold VTH -7V≤VCM≤+12V Voltage Receiver Input Hysteresis ∆VTH Receiver Output High Voltage VOH IO=-4mA, VID=-50mV Receiver Output Low Voltage VOL IO=4mA, VID=-200mV Three-State Output Current at IOZR 0.4V≤VO≤2.4V Receiver Receiver Input Resistance RIN -7V≤VCM≤+12V Receiver Output Short-Circuit IOSR 0V≤VRO≤VCC Current SUPPLY CURRENT No Load, DE=VCC Supply Current ICC RE =DI=GND or VCC, SRL=VCC No Load, RE =DI=GND or VCC, SRL=GND MIN TYP MAX UNIT -300 mV 25 0.4 mV V V ±1 µA VCC-1.5 96 kΩ ±7 ±95 mA 430 900 µA DE=GND 375 600 µA DE=VCC 475 1000 µA DE=GND 420 800 µA Supply Current in Shutdown ISHDN DE=GND, VRE =VCC 1 10 µA Mode Notes: 1. All currents into the device are positive; all currents out of the device are negative. All voltages are referred to device ground unless otherwise noted. 2. ∆VOD and ∆VOC are the changes in VOD and VOC, respectively, when the DI input changes state. 3. The SRL pin is internally biased to VCC/ 2 by a 100kΩ/100kΩ resistor divider. It is guaranteed to be VCC/ 2 if left unconnected. 4. Maximum current level applies to peak current just prior to foldback-current limiting; minimum current level applies during current limiting. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 4 of 8 QW-R113-015.a UTRS3085 Preliminary CMOS IC SWITCHING CHARACTERISTICS (VCC=+5.0V ±5%, TA=TMIN to TMAX, unless otherwise noted. Typical values are at VCC=+5.0V and TA=+25°C) PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX tDPLH 100 Fig.3 and 5, RDIFF=54Ω, CL1=CL2=100pF Driver Input to Output tDPHL 100 Driver Output Skew tDSKEW Fig.3 and 5, RDIFF=54Ω, CL1=CL2=100pF -3 ±100 | tDPLH - tDPHL | Driver Rise or Fall Time tDR, tDF Fig.3 and 5, RDIFF=54Ω, CL1=CL2=100pF 200 Maximum Data Rate fMAX 500 Driver Enable to Output High tDZH Fig.4 and 6, CL=100pF, S2 Closed 2500 Driver Enable to Output Low tDZL Fig.4 and 6, CL=100pF, S1 Closed 2500 Driver Disable Time from Low tDLZ Fig.4 and 6, CL=15pF, S1 Closed 100 Driver Disable Time from High tDHZ Fig.4 and 6, CL=15pF, S2 Closed 100 tRPLH, Fig.7 and 9, |VID|≥2.0V; Rise and Fall Time Receiver Input to Output 200 tRPHL of VID≤15ns |tRPLH - tRPHL| Differential Fig.7 and 9, |VID|≥2.0V; Rise and Fall Time 50 tRSKD Receiver Skew of VID≤15ns Receiver Enable to Output Low tRZL Fig.2 and 8, CL=100pF, S1 Closed 100 Receiver Enable to Output High tRZH Fig.2 and 8, CL=100pF, S2 Closed 60 Receiver Disable Time from Low tRLZ Fig.2 and 8, CL=100pF, S1 Closed 300 Receiver Disable Time from Fig.2 and 8, CL=100pF, S2 Closed 200 tRHZ High Time to Shutdown tSHDN Note 1 200 Driver Enable from Shutdown to 4500 tDZH(SHDN) Fig.4 and 6, CL=15pF, S2 Closed Output High Driver Enable from Shutdown to tDZL(SHDN) Fig.4 and 6, CL=15pF, S1 Closed 4500 Output Low Receiver Enable from Shutdown 3500 tRZH(SHDN) Fig.2 and 8, CL=100pF, S2 Closed to Output High Receiver Enable from Shutdown tRZL(SHDN) Fig.2 and 8, CL=100pF, S1 Closed 3500 to Output Low UNIT ns ns ns ns kbps ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns Note: The device is put into shutdown by bringing RE high and DE low. If the enable inputs are in this state for less than 50ns, the device is guaranteed not to enter shutdown. If the enable inputs are in this state for at least 600ns, the device is guaranteed to have entered shutdown. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 5 of 8 QW-R113-015.a UTRS3085 Preliminary CMOS IC FUNCTION TABLE TRANSMITTING INPUTS RE X X 0 1 OUTPUTS DE DI B/Z A/Y 1 1 0 0 1 0 X X 0 1 High-Z 1 0 High-Z Shutdown RECEIVING INPUTS DE OUTPUT A-B RE 0 X ≥-0.05V 0 X ≤-0.2V 0 X Open/Shorted 1 1 X 1 0 X X = Don’t care Shutdown mode, driver and receiver outputs high impedance UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw RO 1 0 1 High-Z Shutdown 6 of 8 QW-R113-015.a UTRS3085 Preliminary CMOS IC TEST CIRCUIT Y TEST POINT RECEIVER OUTPUT R CRL VOD + 15pF VOC R 1K VCC S1 1K S2 Z Fig. 2 Receiver Enable/Disable Timing Test Load Fig. 1 Driver DC Test Circuit 3V DE DI Y CL1 VID OUTPUT UNDER TEST VCC S1 CL RDIFF + 500Ω Z CL2 S2 Fig. 3 Driver Timing Test Circuit VOH RO Fig. 4 Driver Enable/Disable Timing Test Load 1.5V 1.5V RE 1.5V 1.5V tZL(SHDN), tZL tLZ VCC tPHL A B Fig. 7 Receiver Propagation Delays UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw RO 1.5V OUTPUT NORMALLY LOW RO 1.5V tPLH Input -1V 0V Output VOL 1V 3V VOL+0.5V OUTPUT NORMALLY HIGH 0V tZH(SHDN), tZH VOH-0.5V tHZ Fig. 8 Receiver Enable and Disable Times 7 of 8 QW-R113-015.a UTRS3085 Preliminary TEST CIRCUIT (Cont.) TYPICAL APPLICATION CIRCUIT CMOS IC UTC assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all UTC products described or contained herein. UTC products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 8 of 8 QW-R113-015.a