5817 IN A (LSB) OUTPUT ENABLE A 41 40 IN B GND 43 42 IN D (MSB) IN C 44 LOGIC SUPPLY 2 1 3 V DD OUTPUT ENABLE B GND 4 OUT B0 CHIP ENABLE 6 5 ADDRESSABLE 28-LINE DECODER/DRIVER OUTPUT DRIVER BANK A OUTA0 38 OUTA1 37 OUTA2 36 OUTA3 35 OUTA4 34 OUTA5 33 OUTA6 32 OUTA7 31 OUTA8 30 OUTA9 29 GND 28 27 39 NC OUT A10 25 26 OUTA11 17 OUTA12 IC 4-TO-14 LINE DECODER 16 24 GND A13 15 OUT OUTB9 23 14 OUTB13 13 OUTB8 22 OUTB7 OUT B12 12 21 11 OUTB6 20 OUTB5 t y c l u n d O o r P nce d e e r u e f n i e t R n o r c o s F i D n w o h S OUTB11 10 OUTB10 OUTB4 OUTPUT DRIVER BANK B 9 19 OUTB3 18 8 IC 7 OUTB2 IC OUTB1 Intended for use in ink-jet printer applications, the A5817SEP addressable 28-line decoder/driver combines low-power CMOS inputs and logic with 28 high-current, high-voltage bipolar outputs. A 4-to-14 line decoder determines the selected output driver (n) in each 14-driver bank. Two independent output enable inputs (active low) then provide the final decoding to activate 1- or 2-of-28 outputs (OUTAn and/or OUTBn). Special internal circuitry is programmed at the time of manufacture to adjust the output pulse timing and thereby the energy the device delivers to the ink-jet print head. Dwg. PP-050 The CMOS inputs cause minimal loading and are compatible with standard CMOS, PMOS, and NMOS logic. Use with TTL or DTL circuits may require appropriate pull-up resistors to ensure an input logic high. The internal CMOS logic operates from a 5 V supply. A CHIP ENABLE function is provided to lock out the drivers during system power up. The 28 bipolar power outputs are open-collector 30 V Darlington drivers capable of sinking 500 mA at ambient temperatures up to 85°C. The A5817SEP is furnished in a 44-lead plastic chip carrier (quad pack) for minimum-area, surface-mount applications. FEATURES ■ Controlled Characteristics for Ink-Jet Printers ■ Addressable Data Entry ABSOLUTE MAXIMUM RATINGS at TA = 25°C Output Voltage, VCE ............................. 30 V Logic Supply Voltage, VDD .................. 7.0 V Input Voltage Range, VIN ....................... -0.3 V to VDD + 0.3 V Output Current, IC ........................... 600 mA Package Power Dissipation, PD ..... 2.70 W* Operating Temperature Range, TA ................................. -20°C to +85°C Storage Temperature Range, TS .............................. -55°C to +150°C ■ 30 V Minimum V(BR)CEX ■ CMOS, PMOS, NMOS Compatible Inputs ■ Low-Power CMOS Logic *Derate at rate of 22 mW/°C above TA = 25°C. Caution: CMOS devices have input static protection but are susceptible to damage when exposed to extremely high static electrical charges. Always order by complete part number: A5817SEP . Data Sheet 26186.20 5817 ADDRESSABLE 28-LINE DECODER/DRIVER 5817 ADDRESSABLE 28-LINE DECODER/DRIVER OUTPUT ENABLE B OUT B12 OUT B11 B2 OUT OUT B1 B0 OUT OUTB13 TURN-ON DELAY IN D (MSB) IN C IN B OUT A13 OUT A12 OUT OUTA11 A2 4-TO-14 LINE DECODER OUT A1 OUT A0 TURN-ON DELAY IN A (LSB) CHIP ENABLE LOGIC SUPPLY OUTPUT ENABLE A FUNCTIONAL BLOCK DIAGRAM Dwg. FP-032 TYPICAL INPUT CIRCUIT TYPICAL OUTPUT DRIVER VDD OUTN IN Dwg. EP-021-7 Dwg. EP-010-1 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 W Copyright © 1993, Allegro MicroSystems, Inc. 5817 ADDRESSABLE 28-LINE DECODER/DRIVER ELECTRICAL CHARACTERISTICS at TA = +25°C, VDD = 5.0 V. Limits Characteristic Symbol Test Conditions Min Typ Max Units — <1.0 100 µA IOUT = 450 mA 0.85 1.15 1.45 V IOUT = 400 mA 0.8 1.1 1.4 V RL = 56 Ω 30 — — V Output Drivers Output Leakage Current Output Saturation Voltage Output Breakdown Voltage Unclamped Inductive Load Current Turn-On Time Fall Time Turn-Off Time Rise Time ICEX VCE(SAT) V(BR)CEX — VCE = 30 V VCC = 30 V, L = 3 µH, RL = 56 Ω, IL = 500 mA, Test Fig. See Note — tPHL VCC = 21 V, RL = 39 Ω 125 225 475 ns tf VCC = 21 V, RL = 39 Ω — 20 — ns tPLH VCC = 21 V, RL = 39 Ω 175 250 400 ns tr VCC = 21 V, RL = 39 Ω — 50 — ns VIN(1) 3.5 — — V VIN(0) — — 0.8 V Control Logic Logic Input Voltage Logic Input Current Input Resistance Supply Current IIN(1) VIN = 5.0 V — <1.0 100 µA IIN(0) VIN = 0 V — <-1.0 -100 µA 50 — — kΩ RIN IDD(ON) Two Outputs ON — 6.0 10.0 mA IDD(OFF) All Drivers OFF, All Inputs = 0 V, OEA = OEB = VDD — — 600 µA Note: Device will turn off and meet all specifications after test. 5817 ADDRESSABLE 28-LINE DECODER/DRIVER OUTN L R V CC IL Dwg. EP-044 UNCLAMPED INDUCTIVE LOAD CURRENT TEST FIGURE A B INA-D t ENABLE OUTPUT ENABLE (A and/or B) t PHL t OUT 90% OUTPUT VOLTAGE N t PLH 90% 50% 50% 10% 10% tf tr Dwg. WP-017 TIMING CONDITIONS (Logic Levels are VDD and Ground) A. Minimum Data Active Time Before Output Enable (Data Set-Up Time) ............ 150 ns B. Minimum Data Hold Time After Output Enable (Data Hold Time) ..................... 250 ns 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 5817 ADDRESSABLE 28-LINE DECODER/DRIVER APPLICATIONS INFORMATION This device is intended specifically for, although certainly not limited to, driving ink-jet print heads. In this application, a certain minimum energy (a function of load voltage and output pulse duration) is required for proper operation, while excessive energy will degrade the life of the print head. The output pulse duration (tOUT) is equal to tENABLE + tPLH – tPHL, where tPHL is adjusted during manufacture to compensate for variations in the output saturation voltage (VCE(SAT)). For the A5817SEP, the relationship between tOUT and tENABLE at TA = 25°C is: tOUT = tENABLE ([VCE(SAT)(actual) – VCE(SAT)(typical)] x 330 ns) + 25 ns + 110 ns. For most applications, this will result in a drivercontribution-to-energy-error of less than ±4%. A logic low on the CHIP ENABLE input will prevent the drivers from turning ON, regardless of the state of other inputs or the logic supply voltage. The CHIP ENABLE input has a slow response time and should not be used as a high-speed control line. For proper operation, all ground terminals should be connected to a common ground on the printed wiring board. The IC (Internal Connection) terminals are used to program the turn-on time of the device and MUST be left electrically unconnected (floating) for proper operation. DECODER TRUTH TABLE IND (MSB) INC 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 INB 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 INA (LSB) N 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 ALL OFF ALL OFF Depending on the four address inputs, the 4-to-14 line decoder selects one driver from each of the 14 output A and B banks of sink drivers according to the Decoder Truth Table. The state of the selected outputs is determined by the OUTPUT ENABLE inputs as shown in the Enable Truth Table. ENABLE TRUTH TABLE CHIP ENABLE OUTPUT ENABLEA OUTPUT ENABLEB 0 X X ALL OFF 1 1 1 ALL OFF 1 0 1 OUTAN ON 1 1 0 OUTBN ON 1 0 0 OUTAN ON, OUTBN ON X = Irrelevant OUTPUTS (OFF unless otherwise specified. For the value of N see the Decoder Truth Table) 5817 ADDRESSABLE 28-LINE DECODER/DRIVER Dimensions in Inches (for reference only) 18 28 29 17 0.032 0.026 0.319 0.291 0.695 0.685 0.021 0.013 0.656 0.650 0.319 0.291 0.050 INDEX AREA BSC 39 7 40 0.020 44 1 2 6 0.656 0.650 MIN 0.695 0.685 0.180 0.165 Dwg. MA-005-44A in Dimensions in Millimeters (controlling dimensions) 28 18 29 17 0.812 0.661 8.10 7.39 17.65 17.40 0.533 0.331 16.662 16.510 8.10 7.39 INDEX AREA 1.27 BSC 39 7 40 44 1 2 6 16.662 16.510 0.51 MIN 4.57 4.20 17.65 17.40 Dwg. MA-005-44A mm NOTES: 1. Exact body and lead configuration at vendor’s option within limits shown. 2. Lead spacing tolerance is non-cumulative. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the design of its products. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringements of patents or other rights of third parties which may result from its use. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000