Surge Components, Inc. 1.FEATURE 100 Watts Peak Power per Line(tp=8/20us) SOT-563 package Protects four bidirectional lines and five Unidirectional lines Monolithic structure Working woltage: 5V Low clamping voltage ESD protection > 40KV Low leakage current RoHS compliant Transient protection for data lines to IEC 61000-4-2(ESD) ± 15KV (air), ± 8KV (contact); IEC 61000-4-4 (EFT) 40A (5/50ns) 2. APPLICATION Communication system & Cellular phones Printers Notebooks and hand hold computers PDAs Video Equipment 3. ELECTRICAL CHARACTERISTICS PER LINE@25℃ ℃(UNLESS OTHERWISE SPECIFIED) NOTE 1 Parameter Reverse stand-off voltage Reverse Breakdown voltage Reverse Leakage Current Clamping Voltage Clamping voltage Junction Capacitance Symbol VRWM VBR IR VC VC CJ Conditions It=1mA VRWM=5V T=25℃ IPP=1A TP=8/20uS IPP=10A TP=8/20uS VR=0V f=1MHz Min. Typ. Max. Units 5 V V uA V V pF 6 5 8.8 12.0 40 Note 1: Pin 1,3,4,5 or 6 to Pin 2 2 95 East Jefryn Blvd Deer Park, NY 11729 (631)595-1818 Surge Components, Inc. 4. ABSOLUTE MAXIMUM RATING @25℃ ℃ NOTE 1 Rating Symbol Value Units Peak Pulse Power(tp=8/20µs) PPP 100 W Forward voltage@10mA VF 1.5 V Operating Temperature Tj -55 to +150 ℃ TSTG -55 to +150 ℃ Storage Temperature Note 1: Pin 1,3,4,5 or 6 to Pin 2 5.TYPICAL CHARACTERISTICS 3 95 East Jefryn Blvd Deer Park, NY 11729 (631)595-1818 Surge Components, Inc. 6. PRODUCT DIMENSION AND PAD SIZE. DIM A Mounting Pad TYPICAL DIM 1 2 3 MILIMETER 0.30 1.02 0.51 INCHES 0.012 0.040 0.020 4 5 1.40 0.51 0.055 0.020 PACKAGE DIMENSION MILIMETER INCHES MA MIN MIN MAX X 1.50 1.70 0.059 0.067 B 1.1 1.3 0.043 0.051 C D 0.50 0.17 0.60 0.27 0.020 0.007 0.024 0.011 G 0.50 BSC - 0.020 BSC - J K S 0.06 0.10 1.50 0.16 0.30 1.70 0.003 0.004 0.059 0.006 0.012 0.067 NOTES: 1. Controlling Dimension Inches 2. Pin 3 is the cathode (Unidirectional only). 3. Dimensions are exclusive of mold lash and metal burrs 4 95 East Jefryn Blvd Deer Park, NY 11729 (631)595-1818 Surge Components, Inc. 7. PACKING INFORMATION Reel Dia 178mm(7”) Tape Width 8mm AO BO KO D E F W PO P2 P Imax 1.78±0.05 1.78±0.05 0.69±0.05 1.50±0.10 1.75±0.10 3.50±0.10 8.00±0.30 4.00±0.10 2.00±0.005 4.00±0.005 0.25 8. APPLICATION NOTE The SES5VT563-5 is TVS arrays designed to protect I/O or data lines from the damaging effects of ESD or EFT. This product provides both unidirectional and bidirectional protection, with a surage capability of 100 watts Ppp line for an 8/20µs wave shape and ESD protection > 25kv. Common-mode unidirectional configuration(Figure 1) The SES5VT563-5 provides up to 4 lines of protection in a common-mode unidirectional configuration as depicted in Figure 1. Circuit connectivity is as follows: ■ Line 1 is connected to Pin1. ■ Line 2 is connected to Pin3. ■ Line 3 is connected to Pin4. ■ Line 4 is connected to Pin5. ■ Pin2 is connected to ground. Common-mode unidirectional configuration(Figure 2) The SES5VT563-5 provides up to 3 lines of protection in a common-mode bidirectional configuration as depicted in Figure 2. 5 95 East Jefryn Blvd Deer Park, NY 11729 (631)595-1818 Surge Components, Inc. Circuit connectivity is as follows: ■ Line 1 is connected to Pin1. ■ Line 2 is connected to Pin3. ■ Line 3 is connected to Pin4. ■ Pin5 is connected to ground. ■ Pin2 is not connected. Differential-mode bidirectional configuration (Figure 3) The SES5VT553-5 provides up to 5 lines of protection in a Differential-mode bidirectional configuration as depicted in Figure 3. Circuit connectivity is as follows: ■ Line 1 is connected to Pin1. ■ Line 2 is connected to Pin3. ■ Line 3 is connected to Pin4. ■ Line 4 is connected to Pin6. ■ Line 5 is connected to Pin5. ■ Pin2 is not connected. Circuit board layout and protection device placement: Circuit board layout is critical for suppression of ESD transients. The following guidelines are recommended: 1. Place the protection devices as close to the input terminal or connector as possible. 2. The path length between the protection device and protected line should be minimized. 3. Keep parallel signal pats to a minimum. 4. Avoid running protection conductors in parallel with unprotected conductor. 5. Minimize all printed-circuit board conductive loops including power and ground loops. 6. minimize the length of the transient return path to ground. 7. Avoid using shared transient return paths to common ground point. 8. Ground planes should be used whenever possible. For multilayer printed-circuit boards, use ground vias. 6 95 East Jefryn Blvd Deer Park, NY 11729 (631)595-1818