IDT IDT5T9070

IDT5T9070
2.5V SINGLE DATA RATE 1:10 CLOCK BUFFER TERABUFFER JR.
INDUSTRIAL TEMPERATURE RANGE
2.5V SINGLE DATA RATE
1:10 CLOCK BUFFER
TERABUFFER™ JR.
DESCRIPTION:
FEATURES:
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IDT5T9070
The IDT5T9070 2.5V single data rate (SDR) clock buffer is a single-ended
input to ten single-ended outputs buffer built on advanced metal CMOS
technology. The SDR clock buffer fanout from a single input to ten single-ended
outputs reduces the loading on the preceding driver and provides an efficient
clock distribution network.
The IDT5T9070 has two output banks that can be asynchronously enabled/
disabled. Multiple power and grounds reduce noise.
Optimized for 2.5V LVTTL
Guaranteed Low Skew < 25ps (max)
Very low duty cycle distortion < 300ps (max)
High speed propagation delay < 2ns. (max)
Up to 200MHz operation
Very low CMOS power levels
Hot insertable and over-voltage tolerant inputs
1:10 fanout buffer
2.5V VDD
Available in TSSOP package
APPLICATIONS:
• Clock and signal distribution
FUNCTIONAL BLOCK DIAGRAM
GL
G1
A
G2
OU TPUT
CON TROL
Q1
OU TPUT
CON TROL
Q2
OU TPUT
CON TROL
Q3
OU TPUT
CON TROL
Q4
OU TPUT
CON TROL
Q5
OU TPUT
CON TROL
Q6
OU TPUT
CON TROL
Q7
OU TPUT
CON TROL
Q8
OU TPUT
CON TROL
Q9
OU TPUT
CON TROL
Q 10
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
OCTOBER 2002
1
© 2002 Integrated Device Technology, Inc.
DSC-5960/18
IDT5T9070
2.5V SINGLE DATA RATE 1:10 CLOCK BUFFER TERABUFFER JR.
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
GL
1
48
Description
Max
Unit
–0.5 to +3.6
V
Input Voltage
–0.5 to +3.6
V
Output Voltage
–0.5 to VDD +0.5
V
VDD
Power Supply Voltage
GND
VI
VO
TSTG
Storage Temperature
–65 to +165
°C
TJ
Junction Temperature
150
°C
V DD
2
47
V DD
V DD
3
46
V DD
GND
4
45
GND
GND
5
44
GND
G1
6
43
GND
V DD
7
42
V DD
Q2
8
41
Q3
Q1
9
40
Q4
GND
10
39
GND
V DD
11
38
V DD
GND
12
37
Q5
A
13
36
Q6
V DD
14
35
V DD
GND
15
34
GND
Q 10
16
33
Q7
Q9
17
32
Q8
V DD
18
31
V DD
G2
19
30
V DD
GND
20
29
GND
GND
21
28
GND
V DD
22
27
V DD
V DD
23
26
GND
NC
24
25
NC
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
CAPACITANCE(1) (TA = +25°C, F = 1.0MHz)
Symbol
CIN
Parameter
Min
Typ.
Max.
Unit
Input Capacitance
—
6
—
pF
NOTE:
1. This parameter is measured at characterization but not tested.
TSSOP
TOP VIEW
RECOMMENDED OPERATING RANGE
Symbol
TA
VDD
Description
Ambient Operating Temperature
Internal Power Supply Voltage
Min.
–40
2.3
2
Typ.
+25
2.5
Max.
+85
2.7
Unit
°C
V
IDT5T9070
2.5V SINGLE DATA RATE 1:10 CLOCK BUFFER TERABUFFER JR.
INDUSTRIAL TEMPERATURE RANGE
PIN DESCRIPTION
Symbol
A
G1
I/O
I
I
Type
LVTTL
LVTTL
G2
I
LVTTL
GL
Qn
VDD
I
O
LVTTL
LVTTL
PWR
Description
Clock input
Gate for outputs Q1 through Q5. When G1 is LOW, these outputs are enabled. When G1 is HIGH, these outputs are asynchronously disabled to the level designated by GL(1).
Gate for outputs Q6 through Q10. When G2 is LOW, these outputs are enabled. When G2 is HIGH, these outputs are asynchronously disabled to the level designated by GL(1).
Specifies output disable level. If HIGH, the outputs disable HIGH. If LOW, the outputs disable LOW.
Clock outputs
Power supply for the device core, inputs, and outputs
PWR
Power supply return for power
GND
NOTE:
1. Because the gate controls are asynchronous, runt pulses are possible. It is the user's responsibility to either time the gate control signals to minimize the possibility of runt
pulses or be able to tolerate them in down stream circuitry.
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE (1)
Symbol
IIH
IIL
VIK
VIN
VIH
VIL
VOH
VOL
Parameter
Input HIGH Current
Input LOW Current
Clamp Diode Voltage
DC Input Voltage
DC Input HIGH(2)
DC Input LOW(3)
Output HIGH Voltage
Output LOW Voltage
Test Conditions
VDD = 2.7V
VI = VDD/GND
VDD = 2.7V
VI = GND/VDD
VDD = 2.3V, IIN = -18mA
IOH = -12mA
IOH = -100µA
IOL = 12mA
IOL = 100µA
NOTES:
1. See RECOMMENDED OPERATING RANGE table.
2. Voltage required to maintain a logic HIGH.
3. Voltage required to maintain a logic LOW.
4. Typical values are at VDD = 2.5V, +25°C ambient.
3
Min.
—
—
—
- 0.3
1.7
—
VDD - 0.4
VDD - 0.1
—
—
Typ.(4)
—
—
- 0.7
Max
±5
±5
- 1.2
+3.6
—
0.7
—
—
0.4
0.1
Unit
µA
V
V
V
V
V
V
V
V
IDT5T9070
2.5V SINGLE DATA RATE 1:10 CLOCK BUFFER TERABUFFER JR.
INDUSTRIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
Symbol
IDDQ
IDDD
ITOT
Parameter
Quiescent VDD Power Supply Current
Dynamic VDD Power Supply
Current per Output
Total Power VDD Supply Current
Test Conditions(1)
VDD = Max., Reference Clock = LOW
Outputs enabled, All outputs unloaded
VDD = Max., VDD = Max., CL = 0pF
Typ.
1.5
Max
2
Unit
mA
150
200
µA/MHz
VDD = 2.5V., FREFERENCE CLOCK = 100MHz, CL = 15pF
VDD = 2.5V., FREFERENCE CLOCK = 200MHz, CL = 15pF
70
100
90
150
mA
NOTE:
1. The termination resistors are excluded from these measurements.
INPUT AC TEST CONDITIONS
Symbol
Parameter
Value
Units
VIH
Input HIGH Voltage
VDD
V
VIL
Input LOW Voltage
0
V
VTH
Input Timing Measurement Reference Level(1)
tR, tF
Input Signal Edge Rate(2)
VDD/2
V
2
V/ns
NOTES:
1. A nominal 1.25V timing measurement reference level is specified to allow constant, repeatable results in an automatic test equipment (ATE) environment.
2. The input signal edge rate of 2V/ns or greater is to be maintained in the 10% to 90% range of the input waveform.
AC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE(4)
Symbol
Skew Parameters
Parameter
Min.
Typ.
Max
Unit
tSK(O)
Same Device Output Pin-to-Pin Skew(1)
—
—
25
ps
tSK(P)
Pulse Skew
—
—
300
ps
Part-to-Part Skew(3)
—
—
300
ps
Propagation Delay A to Qn
—
—
2
ns
Output Rise Time (20% to 80%)
350
—
850
ps
350
—
—
—
850
200
ps
MHz
tSK(PP)
Propagation Delay
tPLH
(2)
tPHL
tR
tF
Output Fall Time (20% to 80%)
Frequency Range
fO
Output Gate Enable/Disable Delay
tPGE
Output Gate Enable to Qn
—
—
3.5
ns
tPGD
Output Gate Enable to Qn Driven to GL Designated Level
—
—
3
ns
NOTES:
1. Skew measured between all outputs under identical input and output transitions and load conditions on any one device.
2. Skew measured is the difference between propagation delay times tPHL and tPLH of any output under identical input and output transitions and load conditions on any one device.
3. Skew measured is the magnitude of the difference in propagation times between any outputs of two devices, given identical transitions and load conditions at identical VDD levels
and temperature.
4. Guaranteed by design.
4
IDT5T9070
2.5V SINGLE DATA RATE 1:10 CLOCK BUFFER TERABUFFER JR.
INDUSTRIAL TEMPERATURE RANGE
AC TIMING WAVEFORMS
1/fo
tW
tW
V IH
V TH
A
V IL
tPHL
tPLH
V OH
V TH
Qn
V OL
t SK(O)
tSK(O)
V OH
V TH
Qm
V OL
Propagation and Skew Waveforms
NOTE: Pulse Skew is calculated using the following expression:
tSK(P) = | tPHL - tPLH |
where tPHL and tPLH are measured on the controlled edges of any one output from rising and falling edges of a single pulse. Please note that the tPHL and tPLH shown are not
valid measurements for this calculation because they are not taken from the same pulse.
V IH
V TH
A
V IL
V IH
V TH
GL
V IL
t PLH
V IH
V TH
Gx
V IL
tPG E
t PGD
V OH
Qn
V TH
V OL
Gate Disable/Enable Runt Pulse Generation
NOTE:
As shown, it is possible to generate runt pulses on gate disable and enable of the outputs. It is the user's responsibility to time their Gx signals to avoid this problem.
5
IDT5T9070
2.5V SINGLE DATA RATE 1:10 CLOCK BUFFER TERABUFFER JR.
INDUSTRIAL TEMPERATURE RANGE
TEST CIRCUIT AND CONDITIONS
V DD
VDD
V DD
R1
Pulse
Generator
V IN
R1
3 inch, ~50 Ω
Transmission Line
D.U.T.
A
Qn
R2
CL
Test Circuit for Input/Output
INPUT/OUTPUT TEST CONDITIONS
Symbol
VDD = 2.5V ± 0.2V
Unit
VTH
VDD / 2
V
R1
100
Ω
R2
100
Ω
CL
15
pF
6
R2
IDT5T9070
2.5V SINGLE DATA RATE 1:10 CLOCK BUFFER TERABUFFER JR.
INDUSTRIAL TEMPERATURE RANGE
ORDERING INFORMATION
IDT
XXXXX
XX
X
Device Type
Package
Process
I
-40°C to +85°C (Industrial)
PA
Thin Shrink Small Outline Package
5T9070
2.5V Single Data Rate 1:10 Clock Buffer
Terabuffer Jr.
CORPORATE HEADQUARTERS
2975 Stender Way
Santa Clara, CA 95054
for SALES:
800-345-7015 or 408-727-6116
fax: 408-492-8674
www.idt.com
7
for Tech Support:
[email protected]
(408) 654-6459