Freescale Semiconductor Data Sheet: Technical Data Document Number: MMA8491Q Rev 2.0, 11/2012 Xtrinsic MMA8491Q 3-Axis Multifunction Digital Accelerometer MMA8491Q The MMA8491Q is a low voltage, 3-axis low-g accelerometer housed in a 3 mm x 3 mm QFN package. The device can accommodate two accelerometer configurations, acting as either a 45° tilt sensor or a digital output accelerometer with I2C bus. Bottom View • As a 45° Tilt Sensor, the MMA8491Q device offers extreme ease of implementation by using a single line output per axis. • As a digital output accelerometer, the 14-bit ±8g accelerometer data can be read from the device with a 1 mg/LSB sensitivity. The extreme low power capabilities of the MMA8491Q will reduce the low data rate current consumption to less than 400 nA per Hz. 12-Lead Industrial QFN 3 mm x 3 mm x 1.05 mm 0.65 mm Pitch Features • Extreme low power, 400 nA per Hz • Ultra-fast data output time, ~700 μs • 1.95V to 3.6V VDD supply range • 3 mm x 3 mm, 0.65 mm pitch with visual solder joint inspection • ±8g full-scale range • 14-bit digital output, 1 mg/LSB sensitivity • Output Data Rate (ODR), implementation based from < 1 Hz to 800 Hz • I2C digital interface • 3-axis, 45° tilt outputs Pin Connections Typical Applications • Smart grid: tamper detect • Anti-theft • White goods tilt • Remote controls NC NC 12 11 Byp 1 10 Xout VDD 2 9 Yout SDA 3 8 Zout EN 4 7 Gnd 5 Related Documentation 6 SCL Gnd The MMA8491Q device features and operations are described in a variety of reference manuals, user guides, and application notes. To find the mostcurrent versions of these documents: 1. 2. Go to the Freescale homepage at: http://www.freescale.com/ In the Keyword search box at the top of the page, enter the device number MMA8491Q. In the Refine Your Result pane on the left, click on the Documentation link. ORDERING INFORMATION Part Number Temperature Range Package Shipping MMA8491QT -40 to +85°C QFN 12 Tray MMA8491QR1 -40 to +85°C QFN 12 1000 pc / Tape & Reel © 2012 Freescale Semiconductor, Inc. All rights reserved. Contents 1 2 3 4 5 6 7 8 9 Block Diagram and Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 Block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.2 Definition of acceleration directions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.3 Tilt detection outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.4 Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.5 Recommended application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Mechanical and Electrical Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 Mechanical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.4 I2C interface characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.1 ACTIVE mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.2 STANDBY mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.3 Next sample acquisition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.4 Power-up timing sequences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.5 45° tilt detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.6 Tilt angle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Serial Interface (I2C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.1 I2C operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.2 Single byte read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.3 Multiple byte read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Register Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.1 Register address map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.2 Register bit map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.3 Data registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5.4 Accelerometer output conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Mounting Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 6.1 Overview of soldering considerations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 6.2 Halogen content . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 6.3 PCB mounting recommendations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Tape and Reel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 7.1 Tape dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 7.2 Label and device orientation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Package Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 MMA8491Q 2 Sensors Freescale Semiconductor, Inc. 1 Block Diagram and Pin Descriptions 1.1 Block diagram Byp Voltage Regulator VDD Internal OSC Clock GEN Xout Yout Zout EN X-axis Transducer Gnd Y-axis Transducer C-to-V Converter ADC Embedded Functions I2C SDA SCL Z-axis Transducer Figure 1. MMA8491Q block diagram 1.2 Definition of acceleration directions Z Pin 1 (Top View) X Y Figure 2. Acceleration direction definitions MMA8491Q Sensors Freescale Semiconductor, Inc. 3 1.3 Tilt detection outputs The MMA8491Q has 3 tilt detection outputs: Xout, Yout, Zout. Figure 3 shows the output results at the 6 different orientation positions. Top View Side View PU Pin 1 Xout = 1 @ -1g Yout = 0 @ 0g Zout = 0 @ 0g PD 263 8491 ALYW 263 8491 ALYW Xout = 0 @ 0g Yout = 1 @ -1g Zout = 0 @ 0g Xout = 0 @ 0g Yout = 1 @ 1g Zout = 0 @ 0g Xout = 0 @ 0g Yout = 0 @ 0g Zout = 1 @ -1g LR 263 8491 ALYW 263 8491 ALYW LL BACK Earth Gravity FRONT Xout = 0 @ 0g Yout = 0 @ 0g Zout = 1 @ 1g Xout = 1 @ 1g Yout = 0 @ 0g Zout = 0 @ 0g PU = Portrait Up LR = Landscape Right PD = Portrait Down LL = Landscape Left Figure 3. X, Y, Z output based on MMA8491Q orientation MMA8491Q 4 Sensors Freescale Semiconductor, Inc. 1.4 Pin descriptions MMA8491Q is hosted in a 12-pin 3 mm x 3 mm QFN package. Ten pins are used for functions; two pins are unconnected. Refer to Table 1 for complete pin descriptions and functions. NC NC 12 11 Byp 1 10 Xout VDD 2 9 Yout SDA 3 8 Zout EN 4 7 Gnd 5 6 SCL Gnd Figure 4. Pin connections (top view) Table 1. Pin descriptions Pin # Pin Name 1 Byp 2 VDD Function Description Pin Status Internal regulator output capacitor connection The internal regulator voltage of 1.8V is present on this pin. Connect to external 0.1 μF bypass capacitor. Output Power Supply Device power is supplied through the VDD line. Power supply decoupling capacitors should be placed as near as possible to pin 1 of the device. Input I2C Data I2C Slave Data Line • 7-bit I2C device address is 0x55. • The SDA and SCL I2C connections are open drain, and therefore usually require a pullup resistor Input/Output 3 SDA 4 EN Enable Pin The Enable pin fully turns on the accelerometer system when it is pulled up to logic high. The accelerometer system is turned off when the Enable pin is logic low. Input 5 SCL I2C Clock I2C Slave Clock Line Input 6 Gnd Ground 7 Gnd Ground 8 Zout Push-pull Z-Axis Tilt Detection Output 9 Yout Push-pull Y-Axis Tilt Detection Output 10 Xout Push-pull X-Axis Tilt Detection Output 11 NC No internal connection 12 NC No internal connection Ground Ground • Output is high when acceleration is > 0.688g (axis is |φ| > 45°). • Output is low when acceleration is ≤ 0.688g (axis is |φ| ≤ 45°). These pins are push-pull. Output Output Output MMA8491Q Sensors Freescale Semiconductor, Inc. 5 0.1 μF 12 11 NC Recommended application diagram NC 1.5 Xout 10 Xout VDD Yout 9 Yout 3 SDA Zout 8 Zout 4 EN 1 Byp 2 VDD 4.7 kΩ SDA 0V Pulsed EN Signal Gnd - VDD Gnd 4.7 μF SCL VDD 5 6 Gnd 7 VDD EN 4.7 kΩ Connect SDA/SCL to Gnd when I2C bus SCL is not used. Figure 5. VDD connects to power supply and EN is pulsed To ensure the accelerometer is fully functional, connect the MMA8491Q as suggested in Figure 5. • A capacitor must be connected to the Bypass pin (pin 1) to assist the internal voltage regulator. It is recommended to use a 0.1 μF capacitor. The capacitor should be placed as near as possible to the Bypass pin. • The device power is supplied through the VDD line. The power supply decoupling capacitor should be placed as close as possible to the VDD pin. — Use a 1.0 or 4.7 μF capacitor when the VDD and EN are not tied together. — When VDD and EN are tied together, then use a 0.1 μF capacitor. The 0.1 μF capacitor value has been chosen to minimize the average current consumption while still maintaining an acceptable level of power supply highfrequency filtering. • Both ground pins (pins 6 and 7) must be connected to ground. • When the I2C communication line is used, use a pullup resistor to connect to line SDA and SCL. The SCL line can be driven by a push-pull driver, in which case, no pull-up resistor is necessary. If SDA and SCL pins are not used, then they should be tied to ground. MMA8491Q 6 Sensors Freescale Semiconductor, Inc. 2 Mechanical and Electrical Specifications 2.1 Absolute maximum ratings Table 2. Maximum ratings Rating Symbol Value Unit Maximum acceleration (all axes, 100 μs) gmax 10,000 g Analog supply voltage VDD -0.3 to +3.6 V Drop test Ddrop 1.8 m TAGOC -40 to +85 °C Tstg -40 to +125 °C Symbol Value Unit Human body model HBM ±2000 V Machine model MM ±200 V CDM ±500 V ±100 mA Operation temperature range Storage temperature range Table 3. ESD and LATCHUP protection characteristics Rating Charge device model Latchup current at TA = 85°C MMA8491Q Sensors Freescale Semiconductor, Inc. 7 2.2 Mechanical characteristics Mechanical characteristics are at VDD = 2.8V, TA = +25°C, unless otherwise noted (8) (10). Table 4. Mechanical characteristics Parameter Symbol Full-scale measurement range (2) FS Sensitivity (1) So Calibrated sensitivity error (1) Conditions Min Typ Max ±8 973 1024 Unit g 1075 counts/g CSE All axes, all ranges -5 5 % CXSEN Die rotation included -4.2 4.2 % Sensitivity temperature variation (2) TCS -40°C to +85°C -0.014 0.014 %/°C Zero-g level temperature variation (2) TCO -40°C to +85°C -0.98 0.98 mg/°C Zero-g level offset accuracy (1) (3) TyOff -100 100 mg TyOffPBM -120 120 mg 18 mg-rms 1 %FS Cross-axis sensitivity (2) Zero-g level after board mount (2) (4) Noise (2) Nonlinearity (2) 11.5 (9) RMS NL Threshold / g-value (5) TDL 25°C Internal threshold of output level change (from 0g reference) , g values are calculated from trip -40°C to +85°C angles Threshold / Tilt angle (2) (4) (5) TDL 25°C Internal threshold of output level -40°C to +85°C change (from 0g reference) Temperature range (2) TAGOC 0.583 0.688 0.780 0.577 0.688 0.784 35.6 43.5 51.3 35.2 43.5 51.7 -40 25 85 g degrees °C 1. Parameters tested 100% at final test at room temperature. 2. Verified by characterization; not tested in production. 3. Before board mount. 4. Post-board mount offset specifications are based on a 4-layer PCB, relative to 25°C. 5. All angles are based on the trip angle from static 0g to 1g; the g-values are calculated from the trip angle. 6. Evaluation data: not tested in production. 7. Guaranteed by design. 8. Typical number is the target number, unless otherwise specified. 9. Typical number is mean data. 10.All numbers are based on VDD cap = 4.7 μF. MMA8491Q 8 Sensors Freescale Semiconductor, Inc. 2.3 Electrical characteristics Electrical characteristics are at VDD = 2.8V, TA = +25°C, unless otherwise noted. (8) (13) Table 5. Electrical characteristics Parameter Symbol (2) VDD Supply voltage Supply current in one-shot mode Supply current in shutdown mode Conditions Min Typ Max Unit 1.95 2.8 3.6 V Idd VDD = 2.8V, EN is pulsed to VDD for 1 ms 400 (6) (9) (10) Isd VDD = 2.8V, EN = 0 1.8 (6) (9) 68 (2) (12) nA 100 470 nF 980 (2) (11) (12) nA/Hz Bypass capacitor at Byp pin (6) Cbyp High level output voltage (2) Xout, Yout, Zout Voh Io = 500 µA Low level output voltage (2) Xout, Yout, Zout Vol Io = 500 µA High level input voltage (2) EN Vih VDD = 2.8V Low level input voltage (2) EN Vil VDD = 2.8V 0.15 * VDD V Low level output voltage (7) SDA Vols Io = 3 mA 0.4 V High level input voltage (7) SDA, SCL Vih VDD = 2.8V Low level input voltage (7) SDA, SCL Vil VDD = 2.8V 0.3* VDD V Isource Voltage high level Vout = 0.85 x VDD, VDD = 2.8V 7.3 mA Isink Voltage low level Vout = 0.15 x VDD, VDD = 2.8V 8.9 mA Ton / Tactive Measured from the time EN = 1.95V to valid outputs 900 (2) (11) (12) µs Trst VDD = 2.8V, the time between falling edge of EN and next rising edge of EN Output source current (2) Xout, Yout, Zout Output sink current (2) Xout, Yout, Zout Turn-on time (14) Reset Time (7) Temperature range (2) TAGOC 70 0.85 * VDD V 0.15 * VDD 0.85 * VDD V 0.7 * VDD V 720 (6) (9) (10) 1000 -40 V µs 25 85 °C 1. Parameters tested 100% at final test at room temperature. 2. Verified by characterization; not tested in production. 3. Before board mount. 4. Post-board mount offset specifications are based on a 4-layer PCB, relative to 25°C. 5. All angles are based on the trip angle from static 0g to 1g; the g-values are calculated from the trip angle. 6. Evaluation data: not tested in production. 7. Guaranteed by design. 8. Typical number is the target number unless otherwise specified. 9. Typical number is mean data. 10.Data is based on typical bypass cap = 100 nF. 11.Data is based on max bypass cap = 470 nF. 12.Over temperature -40°C to 85°C. 13.All numbers are based on VDD cap = 4.7 μF. 14.For application connection, see Figure 5 on page 6. MMA8491Q Sensors Freescale Semiconductor, Inc. 9 2.4 I2C interface characteristics Table 6. I2C slave timing values(1) Parameter Symbol I2C Fast Mode Min Max 400 Unit SCL clock frequency fSCL 0 Bus-free time between STOP and START condition tBUF 1.3 μs (Repeated) START hold time tHD;STA 0.6 μs Repeated START setup time tSU;STA 0.6 μs STOP condition setup time tSU;STO 0.6 kHz μs μs SDA data hold time tHD;DAT 0.05 SDA setup time tSU;DAT 100 ns SCL clock low time tLOW 1.3 μs SCL clock high time tHIGH 0.6 SDA and SCL rise time tr SDA and SCL fall time SDA valid time tf (4) SDA valid acknowledge time 20 + 0.1 300 ns 20 + 0.1 Cb(3) 300 ns tVD;ACK Pulse width of spikes on SDA and SCL that must be suppressed by internal input filter tSP Capacitive load for each bus line Cb μs Cb(3) tVD;DAT (5) 0.9 (2) 0 0.9 (2) μs 0.9 (2) μs 50 ns 400 pF 1.All values referred to VIH(min) (0.3VDD) and VIL(max) (0.7VDD) levels. 2.This device does not stretch the LOW period (tLOW) of the SCL signal. 3.Cb = total capacitance of one bus line in pF. 4.tVD;DAT = time for data signal from SCL LOW to SDA output (HIGH or LOW, depending on which one is worse). 5.tVD;ACK = time for Acknowledgement signal from SCL LOW to SDA output (HIGH or LOW, depending on which one is worse). VIL = 0.3VDD VIH = 0.7VDD Figure 6. I2C slave timing diagram MMA8491Q 10 Sensors Freescale Semiconductor, Inc. 3 Modes of Operation EN = Low OFF* Mode VDD = On SHUTDOWN Mode VDD = Off EN = Don’t Care One sample is acquired EN = High VDD = On EN = Low ACTIVE Mode STANDBY Mode VDD = On EN = High VDD = On EN = High *OFF mode can be entered from any state by removing the power. Figure 7. MMA8491Q operating modes Table 7. Operating modes Mode Conditions OFF VDD = OFF EN = Don’t Care SHUTDOWN 3.1 Function Description Digital Output State Device is powered off. Hi-Z VDD = ON EN = Low All blocks are shut down. Hi-Z ACTIVE VDD = ON EN = High All blocks are enabled. Device enters Standby mode automatically after data conversion. STANDBY VDD = ON EN = High Only digital output subsystem is enabled. Data is valid and available only in this stage. Deasserted, Xout = 0, Yout= 0, Zout = 0 Active, I2C outputs become valid ACTIVE mode The accelerometer subsystem is turned on at the rising edge of the EN pin, and acquires one sample for each of the three axes. Note that EN should not be asserted before VDD reaches 1.95V. Samples are acquired, converted, and compensated for zero-g offset and gain errors, and then compared to an internal threshold value of 0.688g and stored. • If any of the X, Y, Z axes sample’s absolute value > this threshold, then the corresponding outputs on these axes drive logic highs. • If any of the X, Y, Z axes sample’s absolute value ≤ this threshold, then the corresponding outputs on these axes drive logic lows. Read register 0x00 in this stage to determine whether the sample data is ready to be read. 3.2 STANDBY mode The device enter STANDBY mode automatically after the previously described function (powers into SHUTDOWN mode, ACTIVE mode) is accomplished. The digital output system outputs valid data, which can also be read via the I2C communication bus. This is the appropriate phase to read the measured data, either from the 3 push-pull logic outputs or through the I2C transaction. All other subsystems are turned off. These outputs are held until the MMA8491Q operation mode changes. For lower power consumption, deassert the EN pin as soon as data is read (to enter SHUTDOWN mode). 3.3 Next sample acquisition The MMA8491Q needs to be brought back to the ACTIVE mode again by pulling EN pin up to a Logic 1. Another option is to power down the device and start from OFF mode as illustrated in Figure 7. For applications where sampling intervals are greater than 30 seconds, the host can shut off the tilt sensor power after acquisition of tilt sensor output data to conserve energy and prolong battery life. MMA8491Q Sensors Freescale Semiconductor, Inc. 11 3.4 Power-up timing sequences The power-up timing sequence for MMA84591Q is shown in Figure 8, where VDD is powered and the EN pin is activated to acquire a single sample. Additional samples can be acquired by repeating the EN pulse. OFF ACTIVE SHUTDOWN STANDBY SHUTDOWN VDD EN Hi-Z Data Available Data tON Figure 8. MMA8491Q timing sequence tON is the time between EN to the end of ACTIVE stage, after which the newly acquired sample data is available. 3.5 45° tilt detection The output value changes according to the absolute value of the acceleration of the MMA8491Q compared to the threshold: • When the acceleration’s absolute value > the threshold 0.688g, the output = ‘1’. • When the acceleration’s absolute value ≤ the threshold, the output = ‘0’. ⎧ 1, when Output = ⎨ ⎩ 0, when ( g-value > 0.688g ) ( g-value ≤ 0.688g ) For example, • When the MMA8491Q is set on a table, it senses 1g acceleration on Z-axis and senses 0g on X and Y axes. • When the MMA8491Q is flipped upside down on the table, it senses -1g acceleration on Z-axis and senses 0g on X and Y axes. In both cases Xout = 0, Yout = 0, and Zout = 1. MMA8491Q 12 Sensors Freescale Semiconductor, Inc. 3.6 Tilt angle Tilt angles can be calculated from the g-value threshold using the equation below. The tilt threshold is 0.688g, which corresponds to 43.5°. Figure 9 illustrates the tilt angle threshold. g-value Tilt Angle = asin ⎛⎝ -------------------⎞⎠ 1g • When 0g acceleration is present on an axis, the tilt angle = 0°; when 1g acceleration is present on an axis, the tilt angle = 90°. • When the tilt angle > the tilt threshold, the output for the axis is HIGH; when the tilt angle ≤ the tilt threshold, the output for the axis is LOW. Tilt Angle φ = 55° Output = 1 Ø Horizontal Reference Projected g-value = Threshold (g-value) = 0.688g Threshold = 0.688g 1g Ø Ø Horizontal Reference Horizontal Reference 0.688g 0.688g 1g Tilt Angle φ = 30° Output = 0 1g Tilt Angle φ = 70° Output = 1 Figure 9. MMA8491Q output is based on tilt angle and sensor g-value MMA8491Q Sensors Freescale Semiconductor, Inc. 13 Serial Interface (I2C) 4 Acceleration data may be accessed through an I2C interface thus making the device particularly suitable for direct interfacing with a microcontroller. The MMA8491Q features three interrupt signals which indicate the tilt-sensing results on X, Y, Z axis respectively. The raw accelerometer data are readable via I2C at the same time when interrupt signal is available. The registers embedded inside the MMA8491Q are accessible through the I2C serial interface (Table 8). To enable the I2C interface, the EN pin must be HIGH. If either EN or VDD are absent, the MMA8491Q I2C interface reads invalid data. The I2C interface may be used for communications along with other I2C devices. Removing power from the VDD pin of the MMA8491Q does not affect the I2C bus. Table 8. Serial interface pins Pin Description 2 SCL I C Serial Clock SDA I2C Serial Data There are two signals associated with the I2C bus; the Serial Clock Line (SCL) and the Serial Data Line (SDA). The latter is a bidirectional line used for sending and receiving the data to/from the interface. External pullup resistors connected to VDD are expected for SDA and SCL. When the bus is free both the lines are HIGH. The I2C interface is compliant with Fast mode (400 kHz, Table 6). I2C operation 4.1 The transaction on the bus is started through a start condition (START) signal. A START condition is defined as a HIGH-to-LOW transition on the data line while the SCL line is held HIGH. After START has been transmitted by the Master, the bus is considered busy. The next byte of data transmitted after START contains the slave address in the first 7 bits, and the 8th bit tells whether the Master is receiving data from the slave or transmitting data to the slave. When an address is sent, each device in the system compares the first 7 bits after a start condition with its address. If they match, then the device considers itself addressed by the Master. The 9th clock pulse, following the slave address byte (and each subsequent byte), is the acknowledge (ACK). The transmitter must release the SDA line during the ACK period. The receiver must then pull the data line LOW so that it remains stable low during the high period of the acknowledge clock period. A LOW-to-HIGH transition on SDA while SCL is HIGH is defined as a stop condition (STOP). A data transfer is always terminated by a STOP. A Master may also issue a repeated START during a data transfer. The MMA8491Q expects repeated STARTs to be used to randomly read from specific registers. The MMA8491Q accelerometer standard 7-bit slave address is 01010101(0x55). Table 9. I2C device address sequence 4.2 Command [7:1] Device Address [7:1] Device Address [0] R/W [7:0] 8-bit Final Value Read 01010101 0x55 1 0xAB Write 01010101 0x55 0 0xAA Single byte read The transmission of an 8-bit command begins on the falling edge of SCL. After the 8 clock cycles are used to send the command, note that the data returned is sent with the MSB first after the data is received. Figure 10 shows the timing diagram for the accelerometer 8-bit I2C read operation. 1. 2. 3. 4. 5. The Master (or MCU) transmits a start condition (ST) to the MMA8491Q, slave address (0x55), with the R/W bit set to “0” for a write, and the MMA8491Q sends an acknowledgement. Then the Master (or MCU) transmits the address of the register to read and the MMA8491Q sends an acknowledgement. The Master (or MCU) transmits a repeated start condition (SR) and then addresses the MMA8491Q (0x1D) with the R/ W bit set to “1” for a read from the previously selected register. The Slave then acknowledges and transmits the data from the requested register. The Master does not acknowledge (NAK) the transmitted data, but transmits a stop condition to end the data transfer. MMA8491Q 14 Sensors Freescale Semiconductor, Inc. Legend ST: Start Condition SP: Stop Condition NAK: No Acknowledge SR: Repeated Start Condition AK: Acknowledge R: Read = 1 Master ST Device Address[7:1] Register Address[7:0] W AK Slave SR W: Write = 0 Device Address[7:1] AK NAK R AK SP Data[7:0] Figure 10. Single byte read 4.3 Multiple byte read When performing a multibyte read or “burst read”, the MMA8491Q automatically increments the received register address commands after a read command is received. Therefore, after following the steps of a single byte read, multiple bytes of data can be read from sequential registers after each MMA8491Q acknowledgment (AK) is received, until a no acknowledge (NAK) occurs from the Master, followed by a stop condition (SP) signaling an end of transmission. Master ST Device Address[7:1] Register Address[7:0] W AK Slave Device Address[7:1] SR AK R AK AK Data[7:0] continued . . . AK Master Slave Data[7:0] AK Data[7:0] NAK SP Data[7:0] Figure 11. Multiple byte read MMA8491Q Sensors Freescale Semiconductor, Inc. 15 5 Register Descriptions 5.1 Register address map Table 10. Register address map(1)(2) Type Register Address Auto-Increment Address(3) Default STATUS R 0x00 0x01 0x00 OUT_X_MSB R 0x01 0x02 Output [7:0] are 8 MSBs of the 14-bit sample OUT_X_LSB R 0x02 0x03 Output [7:2] are the 6 LSB of 14-bit sample OUT_Y_MSB R 0x03 0x04 Output [7:0] are 8 MSBs of the 14-bit sample OUT_Y_LSB R 0x04 0x05 Output [7:2] are the 6 LSB of 14-bit sample OUT_Z_MSB R 0x05 0x06 Output [7:0] are 8 MSBs of the 14-bit sample OUT_Z_LSB R 0x06 0x00 Output [7:2] are the 6 LSB of 14-bit sample Name Comment Read time status 1. Register contents are preserved when EN pin is set high after sampling. 2. Register contents are reset when EN pin is set low. 3. Auto-increment is the I2C feature that the I2C read address is automatically updated after each read. Auto-increment addresses which are not a simple increment are highlighted in bold. The auto-increment addressing is only enabled when device registers are read using I2C burst read mode. Therefore the internal storage of the auto-increment address is cleared whenever a stop-bit is detected. 5.2 Register bit map Table 11. Register bit map Address Offset Name 0x00 STATUS R 0x01 OUT_X_MSB R 0x02 OUT_X_LSB R 0x03 OUT_Y_MSB R 0x04 OUT_Y_LSB R 0x05 OUT_Z_MSB R 0x06 OUT_Z_LSB R 7 6 5 4 0 0 0 0 3 2 1 0 ZYXDR ZDR YDR XDR 0 0 0 0 0 0 XD[13:6] XD[5:0] YD[13:6] YD[5:0] ZD[13:6] ZD[5:0] MMA8491Q 16 Sensors Freescale Semiconductor, Inc. 5.3 Data registers 5.3.1 0x00 Status register Register 0x00 reflects the real-time status information of the X, Y, and Z sample data. The data read bits (ZYXDR, ZDR, YDR, XDR) are set when samples are taken and ready to be read. Table 12. STATUS register Field Description ZYXDR X, Y, Z-axis new Data Ready (and available) • ZYXDR signals that a new sample for all channels is available. • ZYXDR is cleared when the high-bytes of the acceleration data (OUT_X_MSB, OUT_Y_MSB, OUT_Z_MSB) of all channels are read. 0: No new set of data ready (default value) 1: A new set of data is ready ZDR Z-axis new Data Ready (and available) • ZDR is set whenever a new acceleration sample related to the Z-axis is generated. • ZDR is cleared anytime OUT_Z_MSB register is read. 0: No new Z-axis data is ready (default value) 1: A new Z-axis data is ready YDR Y-axis new Data Ready (and available) • YDR is set whenever a new acceleration sample related to the Y-axis is generated. • YDR is cleared anytime OUT_Y_MSB register is read. 0: No new Y-axis data ready (default value) 1: A new Y-axis data is ready XDR X-axis new Data Ready (and available) • XDR is set whenever a new acceleration sample related to the X-axis is generated. • XDR is cleared anytime OUT_X_MSB register is read. 0: No new X-axis data ready (default value) 1: A new X-axis data is ready MMA8491Q Sensors Freescale Semiconductor, Inc. 17 5.3.2 Accelerometer data registers (0x01–0x06) These registers contain the X-axis, Y-axis, and Z-axis14-bit output sample data (expressed as 2's complement numbers). • OUT_X_MSB, OUT_X_LSB, OUT_Y_MSB, OUT_Y_LSB, OUT_Z_MSB, and OUT_Z_LSB are stored in the autoincrementing address range of 0x01 – 0x06. • The LSB registers can only be read immediately following the read access of the corresponding MSB register. A random read access to the LSB registers is not possible. • Reading the MSB register and then the LSB register in sequence ensures that both bytes (LSB and MSB) belong to the same data sample, even if a new data sample arrives between reading the MSB and the LSB byte. • The accelerometer data registers should be read only after the status register has confirmed that new data on all axes is available. Table 13. OUT_X_MSB: X_MSB register (0x01, Read-only) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Bit 1 Bit 0 0 0 Bit 1 Bit 0 Bit 1 Bit 0 0 0 Bit 1 Bit 0 Bit 1 Bit 0 0 0 XD[13:7] Table 14. OUT_X_LSB: X_LSB register (0x02, Read-only) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 XD[5:0] Table 15. OUT_Y_MSB: Y_MSB register (0x03, Read-only) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 YD[13:6] Table 16. OUT_Y_LSB: Y_LSB register (0x04, Read-only) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 YD[5:0] Table 17. OUT_Z_MSB: Z_MSB register (0x05, Read-only) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 ZD[13:6] Table 18. OUT_Z_LSB: Z_LSB register (0x06, Read-only) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 ZD[5:0] 5.4 Accelerometer output conversion Table 19. Accelerometer output data 14-bit Data Range ±8g (1 mg/count) 01 1111 1111 1111 +8.000g 01 1111 1111 1110 +7.998g … ... 00 0000 0000 0000 0.000g 11 1111 1111 1111 -0.001g ... ... 10 0000 0000 0001 -7.998g 10 0000 0000 0000 -8.000g MMA8491Q 18 Sensors Freescale Semiconductor, Inc. 6 Mounting Guidelines Surface mount printed circuit board (PCB) layout is a critical portion of the total design. The footprint for the surface mount packages must be the correct size to ensure proper solder connection interface between the PCB and the package. With the correct footprint, the packages will self-align when subjected to a solder reflow process. The purpose is to minimize the stress on the package after board mounting. The MMA8491Q accelerometers use the QFN package. This section describes suggested methods of soldering and mounting these devices to the PCB for consumer applications. 6.1 Overview of soldering considerations The information provided here is based on experiments executed on QFN devices. They do not represent exact conditions present at a customer site. Hence, information herein should be used as guidance only and process and design optimizations are recommended to develop an application specific solution. It should be noted that with the proper PCB footprint and solder stencil designs, the package will self-align during the solder reflow process. 6.2 Halogen content This package is designed to be Halogen Free, exceeding most industry and customer standards. Halogen Free means that no homogeneous material within the assembly package shall contain chlorine (Cl) in excess of 700 ppm or 0.07% weight/weight or bromine (Br) in excess of 900 ppm or 0.09% weight/weight. 6.3 PCB mounting recommendations 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. Do not solder down Exposed Pad (EP) under the package to minimize board mounting stress impact to product performance. PCB landing pad is 0.675 mm x 0.325 mm as shown in Figure 12. Solder mask opening = PCB land pad edge + 0.2 mm larger all around. Stencil opening size is 0.625 mm x 0.3 mm. Stencil thickness is 100 or 125 μm. The solder mask should not cover any of the PCB landing pads, as shown in Figure 12. No additional via nor metal pattern underneath package on the top of the PCB layer. Do not place any components or vias within 2 mm of the package land area. This may cause additional package stress if it is too close to the package land area. Signal traces connected to pads should be as symmetric as possible. Put dummy traces on NC pads, to have same length of exposed trace for all pads. Use a standard pick and place process and equipment. Do not use a hand soldering process. Customers are advised to be cautious about the proximity of screw down holes to the sensor, and the location of any press fit to the assembled PCB when in an enclosure. It is important that the assembled PCB remain flat after assembly to keep electronic operation of the device optimal. The PCB should be rated for the multiple lead-free reflow condition with max 260°C temperature. Freescale sensors are compliant with Restrictions on Hazardous Substances (RoHS), having halide free molding compound (green) and lead-free terminations. These terminations are compatible with tin-lead (Sn-Pb) as well as tinsilver-copper (Sn-Ag-Cu) solder paste soldering processes. Reflow profiles applicable to those processes can be used successfully for soldering the devices. MMA8491Q Sensors Freescale Semiconductor, Inc. 19 ' & Ϯ ϭ Ϯ ϭ ^ŽůĚĞƌŵĂƐŬŽƉĞŶŝŶŐ WůĂŶĚŝŶŐƉĂĚ Symbol Description WĂĐŬĂŐĞŽƵƚůŝŶĞ Value (mm) A Pitch 0.650 B Landing Pad Width 0.325 C Landing Pad Length 0.675 D1 Solder Mask Pattern Width 1.175 D2 Solder Mask Pattern Length 0.875 E1 Solder Mask Pattern Width 0.875 E2 Solder Mask Pattern Length 2.475 F I/O Pads Extended Length 3.8 G I/O Pads Extended Length 3.8 Figure 12. PCB footprint guidelines MMA8491Q 20 Sensors Freescale Semiconductor, Inc. 7 Tape and Reel 7.1 Tape dimensions Measurements are in millimeters. Figure 13. Mechanical dimensions 7.2 Label and device orientation MMA8491Q is oriented on the tape as illustrated in Figure 14. The front side dot marked on the device indicates pin 1. MMA8491Q pin 1 Direction to unreel Bar Code Label Side of Reel Figure 14. Tape and reel orientation MMA8491Q Sensors Freescale Semiconductor, Inc. 21 8 Package Dimensions Figure 15. Case 2169-02, Issue X1, 12-Lead QFN—page 1 MMA8491Q 22 Sensors Freescale Semiconductor, Inc. Figure 16. Case 2169-02, Issue X1, 12-Lead QFN—page 2 MMA8491Q Sensors Freescale Semiconductor, Inc. 23 Figure 17. Case 2169-02, Issue X1, 12-Lead QFN—page 3 MMA8491Q 24 Sensors Freescale Semiconductor, Inc. 9 Revision History Table 20. Revision history Revision number Revision date 1 10/2012 • Initial release 2 11/2012 • Characterization data verified to be complete and final Description of changes MMA8491Q 25 Sensors Freescale Semiconductor, Inc. How to Reach Us: Information in this document is provided solely to enable system and software Home Page: freescale.com implementers to use Freescale products. There are no express or implied copyright Web Support: freescale.com/support information in this document. licenses granted hereunder to design or fabricate any integrated circuits based on the Freescale reserves the right to make changes without further notice to any products herein. Freescale makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters that may be provided in Freescale data sheets and/or specifications can and do vary in different applications, and actual performance may vary over time. All operating parameters, including “typicals,” must be validated for each customer application by customer’s technical experts. Freescale does not convey any license under its patent rights nor the rights of others. Freescale sells products pursuant to standard terms and conditions of sale, which can be found at the following address: freescale.com/SalesTermsandConditions. Freescale, the Freescale logo, AltiVec, C-5, CodeTest, CodeWarrior, ColdFire, C-Ware, Energy Efficient Solutions logo, Kinetis, mobileGT, PowerQUICC, Processor Expert, QorIQ, Qorivva, StarCore, Symphony, and VortiQa are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. Airfast, BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, MagniV, MXC, Platform in a Package, QorIQ Qonverge, QUICC Engine, Ready Play, SafeAssure, SMARTMOS, TurboLink, Vybrid, and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2012 Freescale Semiconductor, Inc. Document Number: MMA8491Q Rev 2.0 11/2012