DESIGN FEATURES Phase-Shift Full-Bridge Controller Enables Efficient, Isolated Power Conversion for High Power Applications by John Bazinet Introduction The distributed power supply systems of large data processing and communications equipment use isolated, high power converters to generate intermediate bus distribution voltages and lower voltages for CPU, mass storage and I/O circuitry. Power supply isolation is necessary for regulatory agency requirements, shielding of sensitive circuitry and ground loop elimination. Unfortunately, adding isolation increases VCC VREF CT SYNC SBUS 15 11 20 1 9 5V UVLO SHUNT REG 10.25V “ON” 6V “0FF” REF AND LDO OSC 1.2V ERROR AMPLIFIER FB 6 8 PDLY – 1.2V + 50k COMP 4 PHASE MODULATOR 18 OUTA – Q + T + PASSIVE DELAY 17 OUTB QB 0.4V RAMP 2 reduced cooling requirements, shrinking volume, weight and cost. Phase-shifted full-bridge power converters have gained attention because of their ability to harness the usually undesirable elements of the power transformer and MOSFETs to significantly reduce switching losses and noise. The 20-pin G or N packaged LTC1922-1 (Figure 1) is a full featured controller for the phase-shifted complexity and reduces efficiency due to a variety of factors, including magnetic core and copper loss of the power transformer. These problems increase as the power level and input voltage increase. In addition, parasitic leakage inductance can generate high voltage transients across the power MOSFETs reducing efficiency even further and generating undesirable EMI. Any efficiency improvement to these power supplies results in 14.9k – BLANK QB VREF Q 13 OUTE R SYNC RECTIFIER DRIVE LOGIC S 12µA SS 7 + 600mV FAULT LOGIC R – SHUTDOWN CURRENT LIMIT RLEB 5 12 OUTF 16 OUTC QB S ACTIVE DELAY 14 OUTD CS 3 BLANK + SLOPE COMPENSATION CT/R 10 ADLY 19 400mV – GND PULSE-BY-PULSE CURRENT LIMIT Figure 1. LTC1922 block diagram Linear Technology Magazine • November 2000 11 DESIGN FEATURES + VDS ACTIVE DELAY PASSIVE DELAY GATE DRIVE (VG) I COSS + CTRAN OUTA OUTB NO ZVS ZVS OUTC VDS PLOSS = VDS × ID OUTD ID RAMP COMP CURRENT DOUBLER OUTE VG OUTF ZVS DELAY TIME NOTE: SHADED AREAS CORRESPOND TO POWER DELIVERY PULSES Figure 2. Instantaneous switching loss from capacitive discharge full-bridge converter. Offering a wide range (0%–99.5%) phase modulator, the LTC1922-1 also combines programmable (10kHz to 1MHz) fixed frequency, current mode control with novel circuitry to invoke zero voltage switching (ZVS) over all operating conditions, optimizing efficiency. Built-in current-doubler synchronous rectification control improves efficiency further and reduces output voltage ripple. Low start-up and operating quiescent currents ease the burden on external bias circuitry, while the accurate 5V low dropout regulator provides up to 15mA to power auxiliary circuits. In addition, the LTC1922-1 provides simple programmability for current limit, leading edge blanking, soft-start and shortcircuit protection, reducing circuit complexity and design time. What is a Phase-Shifted Full Bridge? Rather than hard switching the power MOSFETs like a conventional full bridge or forward converter, the phaseshifted full-bridge converter clamps and recycles the energy stored in the power transformer’s leakage induc12 Figure 3. LTC1922 timing diagram tance to softly turn on each of the four power MOSFETs in the full bridge. ZVS (zero voltage switching) occurs when the external power MOSFETs are turned on and off when their respective drain to source voltages are at or near zero volts, effectively eliminating the instantaneous turn on-power loss of the MOSFETs caused by COSS (drain-to-source capacitance) and parasitic capacitance discharge (see Figure 2). This improves efficiency, reduces switching related EMI and eliminates the need for primaryside snubbers. level is increased, a corresponding increase of switch conduction overlap (A–D or B–C) or phase shift occurs. The maximum overlap per switch pair is 50%. Since both pairs of switches conduct during a transformer cycle, the maximum attainable duty cycle is 100%. Once a switch turns off, the inherent momentum of the transformer’s magnetizing and leakage inductances under phase-shift control help to commutate the respective bridge leg voltages toward a zero voltage condition. Phase-Shift Control Adaptive DirectSense™ Technology Referring to Figure 3, alternate diagonal switches in the full bridge (A-D or B-C) conduct simultaneously in order to deliver energy to the load (secondary). Each switch-drive signal has a 50% duty cycle less a small ZVS turnon delay. Outputs A and B are 180 degrees out of phase and change state every time the oscillator clocks the internal PWM flip flop. Similarly, outputs C and D are 180 degrees out of phase and change state every time RAMP exceeds the PWM control level defined by COMP. As the PWM control The LTC1922-1 implements ZVS with closed loop DirectSense technology. Optimal ZVS delay time is a complex nonlinear function of load current, MOSFET COSS, transformer interwinding capacitance, leakage and magnetizing inductance and output inductance. In addition, each bridge leg exhibits unique behavior necessitating different delays. An optimal delay time prevents hard switching and/or increased body diode conduction, maximizes the duty cycle range and minimizes EMI. Referring to Linear Technology Magazine • November 2000 DESIGN FEATURES VIN 1 MA R2 NOTE: INDUCTOR(S) DUTY CYCLE IS LIMITED TO 50% WITH CURRENT DOUBLER PHASE SHIFT CONTROL. MC ADLY SBUS R5 R6 NORMALIZED OUTPUT RIPPLE CURRENT ATTENUATION PDLY MB R1 MD R3 1k R4 1k RCS 0 Figure 4. Direct sensing of full bridge Figure 4, the LTC1922 senses each leg of the full bridge with a voltage divider on PDLY and ADLY and senses the input supply with a voltage divider on SBUS. Internal high speed latching comparators, state and PWM logic and fail-safe circuits command the respective high-side MOSFETs (MA, MC) to turn on when the rising voltages on PDLY and ADLY cross the threshold level determined by the voltage on SBUS. In addition, every rising edge on ADLY and PDLY initiates an accurate current out of ADLY and PDLY, respectively. This current, along with the external resistor divider, produces a lower threshold level for use when the bridge legs commutate towards ground, providing ZVS to the lower MOSFETs (MB, MD). After the falling edge transition occurs, the current is reset. By sensing the bridge and input supply directly, the LTC1922-1 can intelligently adapt to any change in load current, temperature, component tolerances, driver circuitry delay offset 0 or input voltage. The benefits include simple design, high efficiency, increased duty cycle capability, lower EMI and consistent performance without tweaking. Synchronous Rectification Synchronous rectification can provide significant efficiency improvements, especially at lower output voltages and when the synchronous switch timing is optimal. The LTC1922-1 includes the internal timing and logic required to produce drive signals for secondary-side synchronous rectifiers, as shown in Figure 3. These switching intervals have been internally programmed to prevent premature turn on and delayed turn off of the external synchronous rectifiers, maximizing the benefit over silicon or Schottky rectifiers and eliminating external glue logic and discrete timing circuitry. The synchronous rectifier MOSFETs and transformer secondary 0.25 DUTY CYCLE 0.5 Figure 5. Output inductor ripple vs duty cycle power stage are configured as an interleaved current doubler. The current doubler employs two inductors that share the output current equally and, more importantly, are driven 180 degrees out of phase. These properties reduce output capacitor ripple current significantly depending on duty ratio (see Figure 5), reducing voltage ripple and improving output capacitor reliability while producing twice the output current per inductor volume of comparable single inductor power stages. 48V to 3.3V/40A Isolated Converter The circuit of Figure 6 features the LTC1922-1, regulating 3.3V at up to 40A from an isolated 36V to 72V input voltage. Only surface mount components are used in this design. Peak efficiency is just over 90%, drop- “A” LEG 50V/DIV 100 “B” LEG 50V/DIV EFFICIENCY (%) 90 VIN = 48V PRIMARY CURRENT 5A/DIV 0A VIN = 36V 80 70 INDUCTOR CURRENTS 5A/DIV 60 0 10 20 30 40 LOAD CURRENT (A) 1µs/DIV Figure 7. 48V to 3.3V conversion efficiency Linear Technology Magazine • November 2000 Figure 8. 48V input to 3.3V/20A output waveforms 13 DESIGN FEATURES +VIN L1 4.7µH VIN = C5 36V TO 1.5µF 72V 100V C2 1.5µF 100V C10 1.5µF 100V –VIN NOTE: UNLESS OTHERWISE NOTED ALL CAPS 25V ALL RESISTORS 1206, 5% ALL DIODES: BAS21 C6 1.5µF 100V T1: E22/6/16 W1 = 4 LAYERS (2 TURNS/LAYER) 20OZ COPPER W2 = 4 LAYERS (1 TURN/LAYER 2 PARALLEL, 2 SERIES) 2OZ COPPER W3 = 1 LAYER (7 TURNS/LAYER) 2OZ COPPER 10V R3 470Ω Q1 D1 D2 8 C3 2.2µF 1 7 R6 470Ω IN1 R7 2.2k Q3 R4 10Ω Q4 W1 8T L4 2.2µH P VHIGH Q5 C14 0.1µF Q6 Q10 10V 22µF 25V + 10V C16 1nF R19 4.7k C22 R28 0.1µF 3.3Ω 1/8W C19 1nF R27 4.7k R18 470Ω 1/8W D11 BAT54 R22 1k 1/8W D13 BAT54 D14 1N4699 12V R29 510Ω C27 0.1µF C28 68µF 20V + 10 18 ADLY DRVA C23 100pF 8 1 R14 510Ω 2 DRVC 17 14 VREF CT 11 RLEB 20 C29 1µF R35 3.3k C30 180pF 5 R34 20k R15 2k 1/8W Q15 FZT600 C20 1µF D12 MMSZ4240BT1 10V C21 4.7µF 3 12 OUTF 13 OUTE 4 COMP GND 19 SS R30 470Ω 1 ISO1 7 4 3 6 C25 0.1µF 6 C31 0.068µF 5 8 (408) (203) (408) (770) (408) (408) (207) (847) (619) (847) (800) 573-4150 268-6261 986-0424 436-1300 573-4150 573-4150 282-5111 639-6400 874-8100 639-6400 554-5565 (605) 665-9301 (847) 639-6400 (631) 543-7100 (408) 720-1440 FROM +VOUT FB 7 C17 0.22µF 50V – VOUT TAIYO YUDEN EMK316BJ225M (X5R, 16V, 1206) VITRAMON VJ1825Y155MXB(X7R, 1825) KEMET T510X477M006AS (TANT, 7343H) MURATA GHM3035C7R222K-GC (X7R, 2220) TAIYO YUDEN UMK316BJ105ML (X7R,1206) TAIYO YUDEN EMK325BJ475MN (X5R, 1210) AVX TPSE686M020R0125 (TANT T343H) COILCRAFT DO3316P-472 PULSE P1697 PQ20/20 1.25mΩ/20A COILCRAFT DO1608C-105 SILICONIX SUD50N03 SILICONIX SUD30N10-25 DALE WSL COILCRAFT TTWB1010 ZETEX FMMT619 ZETEX FMMT718 QT OPTOELECTRONICS M0C207 RAMP DRVB DRVD CS U3 LTC1922-1 VIN SYNC 16 PDLY – VOUT C15 2.2nF 250V AC "Y" VLOW U2 8 LTC1693-1 6 VCC2 VCC1 3 5 IN2 OUT2 1 7 IN1 OUT1 2 4 GND2 GND1 C1, C3: C2, C5, C6, C10: C4, C7, C9, C11: C15: C20, C29: C21: C28: L1: L2, L3: L5: Q7 TO Q10: Q1, Q3, Q11, Q12: R9: T2 T0 T5: ALL NPNs: ALL PNPS: ISO 1: C34 0.1µF R26 1k 1% 9 SBUS 15 C33 0.1µF Q7 D16 P R25 1k 1% R24 10k D15 1N4683 3V R16 13.3k 1% C11 470µF 6V R11 10Ω 1/8W W3 7T C18 R21 0.1µF 3.3Ω 1/8W R13 13.3k 1% R17 13.3k 1% + VHIGH L5 1mH A Q8 C9 470µF 6V R9 0.06Ω 1W T5 R20 309k + Q14 T4 R12 13.3k 1% Q9 C4 + 470µF 6V C7 + 470µF 6V L3 2.4µH Q12 R10 470Ω Q13 T3 R23 30k C8, 1nF 100V R2 10k 1/8W W2 2T 10V 10V Q11 T2 +VOUT VLOW T1 R8 470Ω D4 BAT54 C12 0.1µF L2 2.4µH Q2 A OUT1 U1 LTC1693-1 5 3 OUT2 IN2 4 2 GND1 GND2 R5 2.2k D3 BAT54 VCC2 VCC1 R1 10Ω C1 2.2µF 6 2 R36 100k U4 LT1431 3 COLL V+ 2 6 GNDF COMP 4 5 GNDS RTOP 8 7 REF RMID C24 0.01µF 1 R31 7.5k R33 3.01k 1% R32 10k C26 0.02µF R37 9.31k 1% FROM – VOUT Figure 6. LTC1922 all–surface mount 3.3V/40A converter ping to 85% at a 40 amp load (Figure 7). The high efficiency eliminates the need for forced air cooling, faceplates or bulky heat sinks. A single LTC16931 and tiny signal transformers are used to provide gate drive to the two high-side bridge MOSFETs. A second LTC1693-1 provides the drive to the secondary synchronous rectifiers. The LT1431 and a standard optical coupler provide voltage regulation information across the isolation boundary. 14 Primary side scope waveforms (Figure 8) exhibit the very clean transitions typical with the phase-shifted full bridge. Since the LTC1922-1 is a current mode controller, it is easily adaptable to standard load-sharing techniques used in redundant power system applications. Additional features of this converter include undervoltage lockout, soft start, leading edge blanking, current limit and short-circuit protection. Conclusion The phase-shifted full-bridge converter is an ideal candidate for high power isolated power conversion, as evidenced by its high efficiency and low noise performance. The LTC1922-1 is a next generation control solution for this type of converter offering optimal zero voltage switching and integrated synchronous rectification control among several other features tailored to high power applications. Linear Technology Magazine • November 2000