AM30N10-78D Analog Power N-Channel 100-V (D-S) MOSFET These miniature surface mount MOSFETs utilize a high cell density trench process to provide low rDS(on) and to ensure minimal power loss and heat dissipation. Typical applications are DC-DC converters and power management in portable and battery-powered products such as computers, printers, PCMCIA cards, cellular and cordless telephones. • • • • PRODUCT SUMMARY VDS (V) rDS(on) m(Ω) 78 @ VGS = 10V 100 98 @ VGS = 4.5V ID (A) 21 19 Low rDS(on) provides higher efficiency and extends battery life Low thermal impedance copper leadframe DPAK saves board space Fast switching speed High performance trench technology o ABSOLUTE MAXIMUM RATINGS (TA = 25 C UNLESS OTHERWISE NOTED) Parameter Symbol Limit Units VDS Drain-Source Voltage 100 V ±20 Gate-Source Voltage VGS a o TC=25 C ID Continuous Drain Current Pulsed Drain Current b Continuous Source Current (Diode Conduction) a a IDM 36 IS 30 o TC=25 C P D Power Dissipation THERMAL RESISTANCE RATINGS Parameter Symbol a A A W 50 o TJ, Tstg -55 to 175 Operating Junction and Storage Temperature Range Maximum Junction-to-Ambient Maximum Junction-to-Case 21 RθJA RθJC Maximum C Units 50 o 3.0 o C/W C/W Notes a. Surface Mounted on 1” x 1” FR4 Board. b. Pulse width limited by maximum junction temperature 1 PRELIMINARY Publication Order Number: DS-AM30N10-78_A AM30N10-78D Analog Power SPECIFICATIONS (T A = 25oC UNLESS OTHERWISE NOTED) Parameter Symbol Test Conditions VGS(th) IGSS VDS = VGS, ID = 250 uA Limits Unit Min Typ Max Static Gate-Threshold Voltage Gate-Body Leakage Zero Gate Voltage Drain Current IDSS On-State Drain CurrentA ID(on) Drain-Source On-ResistanceA Forward TranconductanceA Diode Forward Voltage 1 VDS = 0 V, VGS = 20 V ±100 VDS = 80 V, VGS = 0 V 1 25 VDS = 80 V, VGS = 0 V, TJ = 55o C VDS = 5 V, VGS = 10 V VGS = 10 V, ID = 1 A VGS = 4.5 V, ID = 1 A rDS(on) gfs VSD 34 uA A 78 98 VDS = 40 V, ID = 1 A IS = 1 A, VGS = 0 V V nA 4.4 1.1 mΩ S V Dynamicb Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall-Time Qg Qgs Qgd td(on) tr td(off) tf VDS = 25 V, VGS = 10 V, ID = 1 A VDD = 100 V, RL = 25 Ω , ID = 1 A, VGEN = 10 V 9 3 3 4 2 20 5 Notes a. Pulse test: PW <= 300us duty cycle <= 2%. b. Guaranteed by design, not subject to production testing. Analog Power (APL) reserves the right to make changes without further notice to any products herein. APL makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does APL assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in APL data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. APL does not convey any license under its patent rights nor the rights of others. APL products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the APL product could create a situation where personal injury or death may occur. Should Buyer purchase or use APL products for any such unintended or unauthorized application, Buyer shall indemnify and hold APL and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that APL was negligent regarding the design or manufacture of the part. APL is an Equal Opportunity/Affirmative Action Employer. 2 PRELIMINARY Publication Order Number: DS-AM30N10-78_A nC nS AM30N10-78D Analog Power Package Information Note: 1. All Dimension Are In mm. 2. Package Body Sizes Exclude Mold Flash, Protrusion Or Gate Burrs. Mold Flash, Protrusion Or Gate Burrs Shall Not Exceed 0.10 mm Per Side. 3. Package Body Sizes Determined At The Outermost Extremes Of The Plastic Body Exclusive Of Mold Flash, Gate Burrs And Interlead Flash, But Including Any Mismatch Between The Top And Bottom Of The Plastic Body. 3 PRELIMINARY Publication Order Number: DS-AM30N10-78_A