Hardware Description XC824 Drive Card

XC 8 0 0 Fa m i l y
AP 0 8 1 1 1
Ha rd w ar e D e s c ri pt i on X C 8 24 D ri v e C a rd
Ap p l i c a ti o n No te
V 1 . 0, 2 01 0- 09
M i c ro c o n t ro l l e rs
Edition 2010-09
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2010 Infineon Technologies AG
All Rights Reserved.
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AP08111
Hardware Description XC824 Drive Card
XC824
Revision History: V1.0 2010-09
Previous Version(s):
Page
Subjects (major changes since last revision)
–
First release.
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Application Note
3
V1.0, 2010-09
AP08111
Hardware Description XC824 Drive Card
Table of Contents
Table of Contents
1
1.1
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Key Features of XC824 for Motor Control Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
Hardware Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
MCU (Microcontroller) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
User Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Digitally Isolated Debug Interface (SPD and UART) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Inverter Board Connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Hall Sensor Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
PCB Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Schematics of XC824 Drive Card . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Application Note
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V1.0, 2010-09
AP08111
Hardware Description XC824 Drive Card
Overview
1
Overview
The XC824 DriveCard is designed to be used in motor control systems. It provides all the signals necessary to
drive a power Inverter, including feedback signals. The XC824 is a low pin count product of the XC800 Family from
Infineon Technologies.
Inverter Board Connector
HALL
XC
µC
824
RST
SPD EN
LED
5kV Isolation
OC DS
UA R T
S PD
Figure 1
XC824 DriveCard
This DriveCard, featuring the cost-effective 8-bit microcontroller XC824 with 16-bit motor control performance,
provides the following interfaces:
•
•
•
•
HALL
– The HALL interface can be used to directly connect HALL motor sensors
Digital isolated SPD
– Single pin programming and debugging interface
Digital isolated UART
– Used for example for real-time monitoring and parameter setup
User interface
– An LED can be used as the user interface in standalone operation
Attention: The reset button is mounted to the power inverter’s ground potential. Metal parts may carry
high voltages.
The inverter board connector provides the following signals:
•
•
•
•
•
Six PWM channels for 3-phase motor control (CAPCOM6E)
Shut down signal for PWM channels (CTRAP)
Enable signal for power inverter
Four ADC channels for fast analog signals such as DC-link current and phase voltages, as well as slow signals
such as temperatures
The power supply (5 V) for the DriveCard
Application Note
5
V1.0, 2010-09
AP08111
Hardware Description XC824 Drive Card
Overview
1.1
•
•
•
•
Key Features of XC824 for Motor Control Applications
High Performance 16-bit coprocessor (MDU)
– A Multiply and Device Unit for scaling and normalization
PWM unit for advanced motor control (CapCom6E)
– 16-bit resolution for high precision space vector PWM generation
– Dead time control for minimum hardware effort (direct control of MOSFET/IGBT)
– CTRAP provides hardware overload protection
A fast 10-bit A/D Converter
– Hardware synchronization to PWM units reduces CPU load
– Four ADC channels with a sample time of less than 200 ns
– Four result registers to maximize sampling performance
– Enables phase current reconstruction at single shunt current measurement
Watchdog timer based on separate 75 kHz
Figure 2
XC824 Block DiagramV1.0
Application Note
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V1.0, 2010-09
AP08111
Hardware Description XC824 Drive Card
Hardware Description
2
Hardware Description
2.1
Power Supply
The XC824 DriveCard is supplied by two power supply domains. The main supply (VCC) is fed from the Inverter
board connector (Section 2.5) and is connected to the MCU and all associated blocks. A second supply domain
(VCCIO) exists for the digital isolation. This can be provided via the debug connector. Please refer to Section 2.4
for details.
Two LEDs indicate the presence of these supply voltages.
2.2
MCU (Microcontroller)
The microcontroller unit XC824 is directly connected to the dedicated interfaces. A software download can be
performed via SPD or UART. Note that in the case of the SPD download, the jumper SPD_EN (Single Pin Debug
Enable) has to be closed, and for UART operation it has to be removed.
Figure 3
XC824 connections
The drive card is shipped with boot mode index (BMI) programmed to “User Mode Diagnostic” providing SPD
programming access. Please refer to application note AP08108 for details on programming the BMI value.
A reset button is available to trigger a power-on reset. This is realized by a p-channel MOSFET transistor switching
the power supply of the microcontroller, because there is no reset pin available at XC824.
Figure 4
Reset Circuitry
Application Note
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V1.0, 2010-09
AP08111
Hardware Description XC824 Drive Card
Hardware Description
2.3
User Interface
A user interface is available by making use of an LED at port 0.5 which is overlaid with the TXD signal from UART.
A test pad is also connected to this port in order to measure fast signals at an oscilloscope.
Figure 5
User interface: LED with test pad
2.4
Digitally Isolated Debug Interface (SPD and UART)
The XC824 DriveCard is equipped with a digital isolation for SPD and UART interfaces. The 5 kV digital isolation
securely disconnects any debug and UART devices from the high voltage levels. As there is a separate power
domain for the PC part of the XC824 DriveCard, a 5 V power supply must be provided separately at VCCIO and
GNDIO. An LED indicates the availability of this supply domain.
The SPD and UART interfaces can not be used in parallel. When UART full duplex communication is desired, the
jumper SPD_EN must be removed. A simplex (transmit) in parallel to SPD can always be utilized.
Figure 6
The digital isolation is based on unidirectional signals. As a result, three signals must be provided for SPD: in, out
and direction. There is a USB Stick available at Infineon Technologies (DriveMonitor v2) that provides these SPD
signals as well as CAN, UART and the 5 V power supply in one device. Please refer to application note AP90006
for details.
Application Note
8
V1.0, 2010-09
AP08111
Hardware Description XC824 Drive Card
Hardware Description
The boot configuration for XC824 does not depend on pin status during reset. Instead, a Boot Mode Index (BMI)
configuration determines the entry to various boot modes such as User Mode, Boot-Loader (BSL) Mode and Onchip Debug (OCDS) Mode. After reset, the BMI value is taken and the respective boot mode entry is executed.
Please refer to application note AP08108 for details.
Either the UART BSL or SPD protocol can be used for BMI programming. Because both protocols share the same
pin (port P0.6), UART BSL must be selected when changing from UART BSL to SPD. Changing back to UART
BSL is only possible by using SPD protocol. The Infineon drive monitor USB stick V2 supports both protocols.
2.5
Inverter Board Connection
The standard 32-pin connector (DIN 41612, B/2) provides all signals needed for control of a 3-phase power
inverter.
The lowside (_L) and highside (_H) switches of the three power stages U, V and W are to be connected to the
signals U_L, U_H, V_L, V_H, W_L and W_H. They are connected to the MCU’s CAPCOM6E peripheral, a flexible
and powerful PWM unit that is very well suited for motor control.
A low signal at the CTRAP pin of the CAPCOM6E immediately switches all power stages in passive state and acts
as an emergency shut-down for the inverter. All CAPCOM6E signals of timer T12 are available at pin header JP4.
An enable signal for the power stages can be provided via signal ENABLE and is connected to the MCU’s GPIO
port 4.0.
The ADC signals are connected to the inverter board connector. Using the XC824 DriveCard in motor control
applications, it is recommended to use the channels as follows:
•
•
channel 3 is used for DC link current measurement
channels 0 to 2 can be used for output voltage (e.g. BEMF detection) or phase current measurement.
Figure 7
Inverter Board Connector
Note: A 5 V power supply is expected at pins A1-B1 of the inverter board connector in order to supply the MCU
and peripheral components.
Application Note
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V1.0, 2010-09
AP08111
Hardware Description XC824 Drive Card
Hardware Description
2.6
Hall Sensor Interface
The MCU provides a HALL sensor interface which can be accessed via JP3. Next to the HALL signals that are
pulled up to VCC = 5 V, the VCC and GND signals are also available.
Figure 8
HALL Sensor Interface
2.7
PCB Layout
Figure 9
Top Layer
Figure 10
Bottom Layer
Application Note
10
V1.0, 2010-09
AP08111
Hardware Description XC824 Drive Card
Hardware Description
ADJ_2
b a
DIN 41612-B/2
1
IC1
1
16
ADJ_3
ADJ_1
Figure 11
Placement of the Component
2.8
Schematics of XC824 Drive Card
XC824 8-bit Microcontroller in PG-DSO-20 Package
IC2
PCRXD
4
PCTXD
5
C3
1
100n
7
VDD1
VDD2
VOA
VIA
VIB
VOB
GND1A
GND2A
GND1B
GND2B
12
GNDIO
P0.1/T0/CC61/T13HR/MTSR/MRST/CCPOS1/TSIN1/LINE1
R2
12
14
P0.6/RXD/SPD
C4
9
100n
SPD_EN 2
C1
100n
1k5
GNDIO
Isolation
DAP1_O
3
4
5
1
DAP1_I
6
VCCIO
7
C8
2
100n
8
GNDIO
VSSP
GND
GND
P0.6/SPD/EXINT0/RXD/TXD/T2EX/SDA/MTSR/MRST/COLA/COL2/TSIN6/LINE6
VDD1
VIA
VDD2
VOA
VIB
VOB
VIC
VOC
VOD
VID
VE1
VE2
GND1A
GND1B
GND2A
GND2B
ADUM2401BWRZ
16
14
13
12
11
P1.0/SPD/EXINT0/RXD/TXD/T2EX/COUT60/COL0
RESET
R13
1
5
3
R14
1k
VCC
VCCA VCCB
DIR
GND
A
B
C9
6
2
4
P1.2/EXINT4/COUT61/COUT63/COL2
P2.1/AN1/EXINT1/CCPOS1/RXD/MTSR/T0
P1.3/CC61/EXF2/COL3
5
P2.2
SN74LVC1T45DCK
P2.0/AN0/EXINT0/CCPOS0/T12HR/T13HR/T2EX/T2
6
P2.1
100n
SPD
P1.1/TXD/CC60/COL1
7
P2.0
VDDP
VCC
IC4
1k
P2.2/AN2/EXINT2X/CCPOS2/T12HR/T13HR/SCK/T1
P1.4/EXINT5/COUT62/COUT63/COL4
4
P2.3
P2.3/AN3/EXINT3/CCPOS0/CTRAP#/T2
P1.5/CC62/COLA/COL5
10
C7
15
15
HALL0
16
HALL1
17
HALL2
18
CTRAP
19
ENABLE
20
P0.5/TXD
1
P0.6/RXD/SPD
8
U_H
9
U_L
10
V_H
11
V_L
2
W_H
3
W_L
GND
P2
GNDIO
220n
13
R1
DAP1_DIR
P0.5/EXINT0/RXD/TXD/MTSR/MRST/COUT62/EXF2/COL1/TSIN5/LINE5
VCC
1
RESETI
P0.4/T2EX/SCL/SCK/EXINT1/CTRAP#/EXF2/COLA/COL3/COL0/TSIN4/LINE4
C2
1
JP2
ADUM2201AWRZ
P0.3/CC60/SDA/CTRAP#/TSIN3/LINE3
VDDC
10k
16
VCCIO
1
LED1
LSQ976-Z
VCCIO
GNDIO
R4
P0.2/T1/CC62/SCL/CCPOS2/TSIN2/LINE2
IC3
VCCIO
P0.0/T2/T13HR/T12HR/MTSR/MRST/CCPOS0/COUT61/TSIN0/LINE0
P0.5/TXD
GNDIO
Power Supply LED
VCCIO
VCCIO
VDDP
14
13
CCU6
10k
R3
3
RESETI
USR0
SPD_SEL
PCTXD
1k
DAP0
USR1
TMS
VDDP
TDO
GND1
NC1
GND2
TDI
RESET
TRST BRKOUT
TCLK
GND3
BRKIN
NC3
NC2
NC4
100n
9
GND
GND
GND
Hall Sensor Interface
Power Board Connector
R10
VCC
VCC
JP1
1
10k
10k
10k
R6
R7
GND
R5
P0.5/TXD
1k5
LYQ976-Z
LED3
100n
LED at P0.5
JP3
1
3
5
HALL0
HALL1
HALL2
2
4
6
GND
HALL
MAB32B2
X1-A1
X1-A2
X1-A3
X1-A4
X1-A5
X1-A6
X1-A7
X1-A8
X1-A9
X1-A10
X1-A11
X1-A12
X1-A13
X1-A14
X1-A15
X1-A16
MAB32B2
X1-B1
X1-B2
X1-B3
X1-B4
P2.0
X1-B5
P2.1
X1-B6
P2.2
X1-B7
P2.3
X1-B8
U_L
X1-B9
U_H
X1-B10
V_L
X1-B11
V_H
X1-B12
W_L
X1-B13
W_H
X1-B14
CTRAP
X1-B15
X1-B16
ENABLE
CCU6 JP4
1
2
3
4
5
6
7
8
9
10
GND
GND
Power Supply LED
VCC
VCC
OCDS - JTAG
DAP1_DIR
DAP1_I
PCRXD
DAP1_O
VCCIO
VCC
IC1
BSS223PW XC824M
Q1
VDDG
VCC
VCCIO
C5
Debug and UART Interface
Reset Circuitry
VCC
1k5
S
S1
10k
R11
RESET
VDDG
3
1
T1
BCR148W
C6
2
R9
P
P1
R12
Reset
VCC
22k
LED2
LSQ976-Z
VCC
SW1
Drive Card XC824
22n
2010/03
GND
GND
ADJ_1
ADJ_2
GND
GND
ADJ_3
Application Note
11
V1.0, 2010-09
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