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Analog Power
AM3455P
P-Channel 30V (D-S) MOSFET
These miniature surface mount MOSFETs
utilize High Cell Density process. Low rDS(on)
assures minimal power loss and conserves
energy, making this device ideal for use in
power management circuitry. Typical
applications are power switch, power
management in portable and battery-powered
products such as computers, printers, PCMCIA
cards, cellular and cordless telephones.
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PRODUCT SUMMARY
VDS (V)
rDS(on) (Ω)
0.112 @ VGS = 10 V
-30
0.172 @ VGS = 4.5V
Low rDS(on) Provides Higher Efficiency and
Extends Battery Life
Low Gate Charge
Fast Switch
Miniature TSOP-6 Surface Mount Package
Saves Board Space
ID (A)
3.4
2.7
1
6
2
5
3
4
o
ABSOLUTE MAXIMUM RATINGS (TA = 25 C UNLESS OTHERWISE NOTED)
Symbol Maximum Units
Parameter
-30
Drain-Source Voltage
VDS
V
VGS
±20
Gate-Source Voltage
o
TA=25 C
a
Continuous Drain Current
o
TA=70 C
b
Pulsed Drain Current
a
Continuous Source Current (Diode Conduction)
ID
TA=25 C
a
o
±20
IS
1.7
TA=70 C
Operating Junction and Storage Temperature Range
THERMAL RESISTANCE RATINGS
Parameter
a
Maximum Junction-to-Ambient
PD
A
2.6
IDM
o
Power Dissipation
3.4
A
2.0
W
1.3
o
TJ, Tstg -55 to 150
C
Symbol Maximum Units
t <= 5 sec
Steady-State
RTHJA
62.5
110
o
C/W
Notes
a.
Surface Mounted on 1” x 1” FR4 Board.
b.
Pulse width limited by maximum junction temperature
1
April, 2004 - Rev. A
PRELIMINARY
Publication Order Number:
DS-AM3455_B
Analog Power
AM3455P
o
SPECIFICATIONS (TA = 25 C UNLESS OTHERWISE NOTED)
Parameter
Limits
Unit
Min Typ Max
Symbol
Test Conditions
VGS(th)
VDS = VGS, ID = 250 uA
IGSS
VDS = 0 V, VGS = ±20 V
±100
nA
VDS = -24 V, VGS = 0 V
1
50
uA
Static
Gate-Threshold Voltage
Gate-Body Leakage
Zero Gate Voltage Drain Current
On-State Drain Current
A
ID(on)
Drain-Source On-Resistance
Forward Tranconductance
Diode Forward Voltage
IDSS
A
A
rDS(on)
1.0
V
VDS = -24 V, VGS = 0 V, T J = 55oC
VDS = 5 V, VGS = 10 V
VGS = 10 V, ID = 3.4 A
VGS = 4.5 V, ID = 2.7 A
g fs
VDS = 4.5 V, ID = 3.4 A
VSD
IS = 0.75 A, VGS = 0 V
10
A
112
172
6
mΩ
S
1.2
V
Dynamicb
Total Gate Charge
Qg
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
Turn-On Delay Time
t d(on)
Rise Time
Turn-Off Delay Time
Fall-Time
tr
td(off)
4.5
VDS = 30 V, VGS = 5 V, ID = 3.4 A
1.4
nC
2.4
9
VDD = 30 V, RL = 30 Ω, ID = 1 A,
VGEN = 10 V
tf
12
25
ns
14
Notes
a.
Pulse test: PW <= 300us duty cycle <= 2%.
b.
Guaranteed by design, not subject to production testing.
Analog Power (APL) reserves the right to make changes without further notice to any products herein. APL makes no warranty, representation
or guarantee regarding the suitability of its products for any particular purpose, nor does APL assume any liability arising out of the application or
use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental
damages. “Typical” parameters which may be provided in APL data sheets and/or specifications can and do vary in different applications and
actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by
customer’s technical experts. APL does not convey any license under its patent rights nor the rights of others. APL products are not designed,
intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or
sustain life, or for any other application in which the failure of the APL product could create a situation where personal injury or death may occur.
Should Buyer purchase or use APL products for any such unintended or unauthorized application, Buyer shall indemnify and hold APL and its
officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney
fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that APL was negligent regarding the design or manufacture of the part. APL is an Equal Opportunity/Affirmative Action Employer.
2
April, 2004 - Rev. A
PRELIMINARY
Publication Order Number:
DS-AM3455_B