Data Sheet

BUK9C07-65BIT
N-channel TrenchPLUS logic level FET
Rev. 03 — 15 July 2010
Product data sheet
1. Product profile
1.1 General description
N-channel enhancement mode field-effect power transistor in SOT427. Device is
manufactured using NXP High-Performance TrenchPLUS technology, featuring very low
on-state resistance, integrated current sensing transistor and over temperature protection
diodes.
1.2 Features and benefits
 AEC-Q101 compliant
 Low conduction losses due to low
on-state resistance
1.3 Applications
 Lamp switching
 Power distribution
 Motor drive systems
 Solenoid drivers
1.4 Quick reference data
Table 1.
Symbol
Quick reference data
Parameter
Conditions
Min
Typ
Max Unit
6
7
Static characteristics
RDSon
drain-source
on-state
resistance
VGS = 5 V; ID = 25 A;
Tj = 25 °C; see Figure 12;
see Figure 13
-
ID/Isense
ratio of drain
current to sense
current
Tj = 25 °C; VGS = 5 V;
see Figure 14
1086 1206 1327 A/A
1
8
5
V(BR)DSS
drain-source
breakdown
voltage
ID = 250 µA; VGS = 0 V;
Tj = 25 °C
65
-
-
mΩ
V
BUK9C07-65BIT
NXP Semiconductors
N-channel TrenchPLUS logic level FET
2. Pinning information
Table 2.
Pinning information
Pin
Symbol Description
1
G
gate
2
IS
current sense
3
A
anode
4
D
drain
5
K
cathode
6
KS
Kelvin source
7
S
source
mb
D
mb
Simplified outline
Graphic symbol
mb
D
A
G
IS
4
KS
S
C
003aad829
123 567
SOT427 (D2PAK)
3. Ordering information
Table 3.
Ordering information
Type number
BUK9C07-65BIT
BUK9C07-65BIT
Product data sheet
Package
Name
Description
D2PAK
plastic single-ended surface-mounted package (D2PAK); 7 leads SOT427
(one lead cropped)
All information provided in this document is subject to legal disclaimers.
Rev. 03 — 15 July 2010
Version
© NXP B.V. 2010. All rights reserved.
2 of 16
BUK9C07-65BIT
NXP Semiconductors
N-channel TrenchPLUS logic level FET
4. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
VDS
drain-source voltage
25 °C ≤ Tj ≤ 150 °C
-
65
V
VDGR
drain-gate voltage
RGS = 20 kΩ; 25 °C ≤ Tj ≤ 150 °C
-
65
V
VGS
gate-source voltage
ID
drain current
-15
15
V
VGS = 5 V; Tmb = 25 °C; see Figure 1
[1]
-
75
A
VGS = 5 V; Tmb = 100 °C; see Figure 1
[1]
-
75
A
IDM
peak drain current
Tmb = 25 °C; single pulse; tp ≤ 10 µs;
see Figure 4
-
550
A
Ptot
total power dissipation
Tmb = 25 °C; see Figure 2
-
245
W
Tstg
storage temperature
-55
150
°C
Tj
junction temperature
-55
150
°C
Visol(FET-TSD)
FET to temperature sense
diode isolation voltage
-
100
V
-
75
A
-
550
A
-
0.605
J
HBM; C = 100 pF; R = 1.5 kΩ; all pins
-
0.15
kV
HBM; C = 100 pF; R = 1.5 kΩ; pin 4 to
pin 7
-
4
kV
Source-drain diode
IS
source current
Tmb = 25 °C
ISM
peak source current
single pulse; tp ≤ 10 µs; Tmb = 25 °C
[1]
Avalanche ruggedness
EDS(AL)S
non-repetitive drain-source
avalanche energy
ID = 75 A; Vsup = 65 V; VGS = 5 V;
Tj(init) = 25 °C; unclamped; see Figure 3
[2][3]
Electrostatic discharge
VESD
electrostatic discharge voltage
[1]
Current is limited by package.
[2]
Single-pulse avalanche rating limited by maximum junction temperature of 150 °C.
[3]
Refer to application note AN10273 for further information.
BUK9C07-65BIT
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 03 — 15 July 2010
© NXP B.V. 2010. All rights reserved.
3 of 16
BUK9C07-65BIT
NXP Semiconductors
N-channel TrenchPLUS logic level FET
001aal548
160
003aab388
120
ID
(A)
Pder
(%)
120
80
80
(1)
40
40
0
0
0
50
100
150
0
200
50
Tmb (°C)
Fig 1.
Continuous drain current as a function of
solder point temperature.
Fig 2.
100
150
200
Tsp (°C)
Normalized total power dissipation as a
function of solder point temperature
001aal677
102
IAL
(A)
(1)
10
(2)
(3)
1
10−1
10−3
10−2
10−1
1
10
tAL (ms)
Fig 3.
Single-Pulse and repetitive avalanche rating; avalanche current as a function of avalanche time.
BUK9C07-65BIT
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 03 — 15 July 2010
© NXP B.V. 2010. All rights reserved.
4 of 16
BUK9C07-65BIT
NXP Semiconductors
N-channel TrenchPLUS logic level FET
001aal753
103
Limit RDSon = VDS / ID
ID
(A)
tp = 10 μs
102
100 μs
10
DC
1 ms
1
10 ms
100 ms
10−1
10−2
1
102
10
VDS (V)
Fig 4.
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
BUK9C07-65BIT
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 03 — 15 July 2010
© NXP B.V. 2010. All rights reserved.
5 of 16
BUK9C07-65BIT
NXP Semiconductors
N-channel TrenchPLUS logic level FET
5. Thermal characteristics
Table 5.
Thermal characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Rth(j-mb)
thermal resistance from junction to
mounting base
see Figure 5
-
-
0.51
K/W
001aal546
1
Zth (j-mb)
δ = 0.5
(K/W)
0.2
10−1
0.1
0.05
10−2
δ=
P
tp
T
single shot
t
tp
T
10−3
10−6
10−5
10−4
10−3
10−2
10−1
1
tp (s)
Fig 5.
Transient thermal impedance from junction to mounting base as a function of pulse duration.
BUK9C07-65BIT
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 03 — 15 July 2010
© NXP B.V. 2010. All rights reserved.
6 of 16
BUK9C07-65BIT
NXP Semiconductors
N-channel TrenchPLUS logic level FET
6. Characteristics
Table 6.
Symbol
Characteristics
Parameter
Conditions
Min
Typ
Max
Unit
ID = 250 µA; VGS = 0 V; Tj = 25 °C
65
-
-
V
ID = 250 µA; VGS = 0 V; Tj = -55 °C
59
-
-
V
1
1.5
2
V
ID = 1 mA; VDS = VGS; Tj = 150 °C;
see Figure 10; see Figure 11
0.5
-
-
V
ID = 1 mA; VDS = VGS; Tj = -55 °C;
see Figure 10; see Figure 11
-
-
2.3
V
Static characteristics
V(BR)DSS
drain-source breakdown
voltage
VGSth
gate-source threshold voltage ID = 1 mA; VDS = VGS; Tj = 25 °C;
see Figure 10; see Figure 11
IDSS
drain leakage current
VDS = 52 V; VGS = 0 V; Tj = 25 °C
-
0.02
3
µA
VDS = 52 V; VGS = 0 V; Tj = 150 °C
-
-
125
µA
IGSS
gate leakage current
VDS = 0 V; VGS = 15 V; Tj = 25 °C
-
2
300
nA
RDSon
drain-source on-state
resistance
VGS = 4.5 V; ID = 25 A; Tj = 25 °C;
see Figure 12; see Figure 13
-
-
7.6
mΩ
VGS = 5 V; ID = 25 A; Tj = 25 °C;
see Figure 12; see Figure 13
-
6
7
mΩ
VGS = 5 V; ID = 25 A; Tj = 150 °C;
see Figure 12; see Figure 13
-
-
13.5
mΩ
VGS = 10 V; ID = 25 A; Tj = 25 °C;
see Figure 12; see Figure 13
-
-
6.5
mΩ
ID/Isense
ratio of drain current to sense
current
VGS = 5 V; Tj = 25 °C; see Figure 14
10861 12068 13275 A/A
SF(TSD)
temperature sense diode
temperature coefficient
IF = 250 µA; 25 °C ≤ Tj ≤ 150 °C;
see Figure 15
-5.4
-5.7
-6
mV/K
VF(TSD)
temperature sense diode
forward voltage
IF = 250 µA; Tj = 25 °C;
see Figure 15
2.855
2.9
2.945
V
ID = 25 A; VDS = 52 V; VGS = 5 V;
see Figure 16
-
102.8
-
nC
-
16.4
-
nC
-
36.4
-
nC
Dynamic characteristics
QG(tot)
total gate charge
QGS
gate-source charge
QGD
gate-drain charge
Ciss
input capacitance
Coss
output capacitance
Crss
reverse transfer capacitance
td(on)
turn-on delay time
VGS = 0 V; VDS = 25 V; f = 1 MHz;
Tj = 25 °C; see Figure 17
VDS = 30 V; RL = 1.2 Ω; VGS = 5 V;
RG(ext) = 10 Ω
-
7127
-
pF
-
900
-
pF
-
354
-
pF
-
59
-
ns
tr
rise time
-
180
-
ns
td(off)
turn-off delay time
-
328
-
ns
tf
fall time
-
173
-
ns
LD
internal drain inductance
from pin to center of die
-
0.9
-
nH
LS
internal source inductance
from source lead to source bonding
pad
-
2
-
nH
BUK9C07-65BIT
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 03 — 15 July 2010
© NXP B.V. 2010. All rights reserved.
7 of 16
BUK9C07-65BIT
NXP Semiconductors
N-channel TrenchPLUS logic level FET
Table 6.
Characteristics …continued
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
-
0.85
1.2
V
Source-drain diode
VSD
source-drain voltage
IS = 25 A; VGS = 0 V; Tj = 25 °C;
see Figure 18
trr
reverse recovery time
Qr
recovered charge
IS = 10 A; dIS/dt = -100 A/µs;
VGS = -10 V; VDS = 30 V
003a a d781
30
-
60.1
-
ns
-
0.161
-
nC
003a a d782
500
gfs
(S )
RDS on
(m Ω )
25
400
20
300
15
200
10
100
5
0
0
1
Fig 6.
ID
(A)
2
3
4
VGS (V)
0
5
Drain-source on-state resistance as a function
of gate-source voltage
Fig 7.
003aae488
100
ID
(A)
20
40
60
80
I D (A)
Forward transconductance as a function of
drain current; typical values
003aae491
300
10.0
80
240
60
180
40
120
5.0
4.5
4.0
3.5
3.0
Tj = 150 C
VGS (V) =2.5 V
25 C
60
20
0
0
0
Fig 8.
1
2
3
VGS (V)
Transfer characteristics; drain current as a
function of gate-source voltage
BUK9C07-65BIT
Product data sheet
0
4
Fig 9.
2
4
6
8
VDS (V)
10
Output characteristics: drain current as a
function of drain-source voltage; typical values.
All information provided in this document is subject to legal disclaimers.
Rev. 03 — 15 July 2010
© NXP B.V. 2010. All rights reserved.
8 of 16
BUK9C07-65BIT
NXP Semiconductors
N-channel TrenchPLUS logic level FET
001aal621
10−1
001aal622
2.5
ID
(A)
VGS(th)
(V)
10−2
2.0
min
10−3
typ
max
1.5
10−4
1.0
10−5
0.5
10−6
0
1
2
0
−60
3
VGS (V)
Fig 10. Sub-threshold drain current as a function of
gate-source voltage.
2.5
3.0
typ
min
0
60
120
001aal547
2.4
3.5
180
Tj (°C)
Fig 11. Gate-source threshold voltage as a function of
junction temperature.
003aae492
50
RDSon
(mΩ)
max
a
2.0
40
1.6
30
4.0
1.2
20
0.8
4.5
10
5
0.4
VGS (V) = 10 V
0
0
60
120
180
240
ID (A)
300
Fig 12. Drain-source on-state resistance as a function
of drain current
BUK9C07-65BIT
Product data sheet
0
−60
0
60
120
180
Tj (°C)
Fig 13. Normalized Drain-Source on-state resistance
factor as a function of junction temperature.
All information provided in this document is subject to legal disclaimers.
Rev. 03 — 15 July 2010
© NXP B.V. 2010. All rights reserved.
9 of 16
BUK9C07-65BIT
NXP Semiconductors
N-channel TrenchPLUS logic level FET
003a a d786
18000
I D/I s ens e
VF(TSD)
(V)
12000
3
6000
2
0
003a a d787
4
1
2
4
6
8
VGS (V)
10
Fig 14. Ratio of drain current to sense current as a
function of gate-source voltage
003aad788
5
VGS
(V)
0
50
100
Tj ( C)
150
Fig 15. Temperature sense diode forward voltage as a
function of junction temperature
003a a d789
1E+5
C
(pF)
4
104
VDS = 14 V
Cis s
VDS = 52 V
3
Cos s
103
2
Crs s
102
1
0
0
30
60
90
QG (nC)
120
Fig 16. Gate-source voltage as a function of turn-on
gate charge
BUK9C07-65BIT
Product data sheet
10
10-1
1
10
VDS (V)
102
Fig 17. Input, output and reverse transfer capacitances
as a function of drain-source voltage
All information provided in this document is subject to legal disclaimers.
Rev. 03 — 15 July 2010
© NXP B.V. 2010. All rights reserved.
10 of 16
BUK9C07-65BIT
NXP Semiconductors
N-channel TrenchPLUS logic level FET
003a a d790
100
IS
(A)
80
60
40
Tj = 175 C
25 C
20
0
0
0.5
1
VS D (V)
1.5
Fig 18. Source (diode forward) current as a function of source-drain (diode forward) voltage
BUK9C07-65BIT
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 03 — 15 July 2010
© NXP B.V. 2010. All rights reserved.
11 of 16
BUK9C07-65BIT
NXP Semiconductors
N-channel TrenchPLUS logic level FET
7. Package outline
Plastic single-ended surface-mounted package (D2PAK); 7 leads (one lead cropped)
SOT427
A
A1
E
D1
mounting
base
D
HD
4
1
Lp
7
b
e
e
e
e
e
c
e
Q
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
mm
A
A1
b
c
D
max.
D1
E
e
Lp
HD
Q
4.50
4.10
1.40
1.27
0.85
0.60
0.64
0.46
11
1.60
1.20
10.30
9.70
1.27
2.90
2.10
15.80
14.80
2.60
2.20
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
05-03-09
06-03-16
SOT427
Fig 19. Package outline SOT427 (D2PAK)
BUK9C07-65BIT
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 03 — 15 July 2010
© NXP B.V. 2010. All rights reserved.
12 of 16
BUK9C07-65BIT
NXP Semiconductors
N-channel TrenchPLUS logic level FET
8. Revision history
Table 7.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
BUK9C07-65BIT v.3
20100715
Product data sheet
-
BUK9C07-65BIT v.2
-
-
Modifications:
BUK9C07-65BIT v.2
BUK9C07-65BIT
Product data sheet
•
Various changes to content.
20100617
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 03 — 15 July 2010
© NXP B.V. 2010. All rights reserved.
13 of 16
BUK9C07-65BIT
NXP Semiconductors
N-channel TrenchPLUS logic level FET
9. Legal information
9.1
Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term 'short data sheet' is explained in section "Definitions".
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product
status information is available on the Internet at URL http://www.nxp.com.
9.2
Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
9.3
Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
BUK9C07-65BIT
Product data sheet
Suitability for use in automotive applications — This NXP
Semiconductors product has been qualified for use in automotive
applications. The product is not designed, authorized or warranted to be
suitable for use in medical, military, aircraft, space or life support equipment,
nor in applications where failure or malfunction of an NXP Semiconductors
product can reasonably be expected to result in personal injury, death or
severe property or environmental damage. NXP Semiconductors accepts no
liability for inclusion and/or use of NXP Semiconductors products in such
equipment or applications and therefore such inclusion and/or use is at the
customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on a weakness or default in the
customer application/use or the application/use of customer’s third party
customer(s) (hereinafter both referred to as “Application”). It is customer’s
sole responsibility to check whether the NXP Semiconductors product is
suitable and fit for the Application planned. Customer has to do all necessary
testing for the Application in order to avoid a default of the Application and the
product. NXP Semiconductors does not accept any liability in this respect.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Limiting values — Stress above one or more limiting values (as defined in the
Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
All information provided in this document is subject to legal disclaimers.
Rev. 03 — 15 July 2010
© NXP B.V. 2010. All rights reserved.
14 of 16
BUK9C07-65BIT
NXP Semiconductors
N-channel TrenchPLUS logic level FET
Export control — This document as well as the item(s) described herein may
be subject to export control regulations. Export might require a prior
authorization from national authorities.
9.4
Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV,
FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE,
ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse,
QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET,
TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V.
HD Radio and HD Radio logo — are trademarks of iBiquity Digital
Corporation.
10. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
BUK9C07-65BIT
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 03 — 15 July 2010
© NXP B.V. 2010. All rights reserved.
15 of 16
BUK9C07-65BIT
NXP Semiconductors
N-channel TrenchPLUS logic level FET
11. Contents
1
1.1
1.2
1.3
1.4
2
3
4
5
6
7
8
9
9.1
9.2
9.3
9.4
10
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1
General description . . . . . . . . . . . . . . . . . . . . . .1
Features and benefits . . . . . . . . . . . . . . . . . . . . .1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Quick reference data . . . . . . . . . . . . . . . . . . . . .1
Pinning information . . . . . . . . . . . . . . . . . . . . . . .2
Ordering information . . . . . . . . . . . . . . . . . . . . . .2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3
Thermal characteristics . . . . . . . . . . . . . . . . . . .6
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Package outline . . . . . . . . . . . . . . . . . . . . . . . . .12
Revision history . . . . . . . . . . . . . . . . . . . . . . . . .13
Legal information. . . . . . . . . . . . . . . . . . . . . . . .14
Data sheet status . . . . . . . . . . . . . . . . . . . . . . .14
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .15
Contact information. . . . . . . . . . . . . . . . . . . . . .15
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2010.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 15 July 2010
Document identifier: BUK9C07-65BIT