March 2010 TLE4941C in PG-SSO-2-4 Differential Two-Wire Hall Effect Sensor-IC for Wheel Speed Applications Final Data Sheet Revision 3.0 ATV SC AE Edition March 2010 Published by Infineon Technologies AG 81726 München, Germany © 2010 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. TLE4941C Revision History: March 2010, Revision 3.0 Previous Version: September 2007, Data Sheet, V2.2 Page Subjects (major changes since last revision) all Changes due to PCN 2009-069-A 5 New Ordering Code inserted We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: [email protected] Final Data Sheet 3 Revision 3.0, March 2010 TLE4941C in PG-SSO-2-4 Table of Contents Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1 1.1 1.2 Product Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 2.1 2.2 2.3 2.3.1 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Configuration and Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 3.1 3.2 3.3 3.4 3.5 Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Typical Diagrams (measured performance) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Electro Magnetic Compatibility (EMC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4 4.1 4.2 Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Package Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Packing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Final Data Sheet 4 6 6 6 7 8 Revision 3.0, March 2010 Differential Two-Wire Hall Effect Sensor IC 1 Product Description 1.1 Overview TLE4941C in PG-SSO-2-4 The Hall Effect sensor IC TLE4941C is designed to provide information about rotational speed to modern vehicle dynamics control systems and ABS. The output has been designed as a two wire current interface. The sensor operates without external components and combines a fast powerup time with a low cut-off frequency. Excellent accuracy and sensitivity is specified for harsh automotive requirements as a wide temperature range, high ESD and EMC robustness. State-of-the art BiCMOS technology is used for monolithic integration of the active sensor areas and the signal conditioning circuitry. PG SSO 2 2 Finally, the optimized piezo compensation and the integrated dynamic offset compensation enable easy manufacturing and elimination of magnet offsets. The TLE4941C is additionally provided with an overmolded 1.8 nF capacitor for improved EMI performance. 1.2 • • • • • • • • • • Features Two-wire current interface Dynamic self-calibration principle Single chip solution No external components needed High sensitivity South and north pole pre-induction possible High resistance to piezo effects Large operating air-gaps Wide operating temperature range TLE4941C: 1.8 nF overmolded capacitor Product Name Product Type TLE4941C in PG-SSO-2-4 Diff. Speed Sensor Final Data Sheet 5 Ordering Code Package SP000710666 PG-SSO-2-4 Revision 3.0, March 2010 TLE4941C in PG-SSO-2-4 Functional Description 2 Functional Description 2.1 General The differential hall sensor IC detects the motion of ferromagnetic and permanent magnet structures by measuring the differential flux density of the magnetic field. To detect the motion of ferromagnetic objects the magnetic field must be provided by a back biasing permanent magnet. Either south or north pole of the magnet can be attached to the rear unmarked side of the IC package. Magnetic offsets of up to ± 20 mT and device offsets are cancelled by a self-calibration algorithm. Only a few transitions are necessary for self-calibration. After the initial calibration sequence switching occurs when the input signal is crossing the arithmetic mean of its max. and min. value (e.g. zero-crossing for sinusoidal signals). The ON and OFF state of the IC are indicated by High and Low current consumption. 2.2 Pin Configuration and Marking 2.67 B 0.3 B 2.5 A 1.44 Center of sensitive area 0.3 A 1 2 G: YY: WW: VCC Figure 1 GND green package production year production week 123456: 41C0R Æ TLE4941C AEP03200 Pin Description (view on branded side of component) Final Data Sheet 6 Revision 3.0, March 2010 TLE4941C in PG-SSO-2-4 Functional Description 2.3 Block Diagram "VCC " Power Supply Regulator Main Comp "GND" Oscillator (syst clock) PGA Hall Probes Offset DAC Speed ADC Gain Range Digital Circuit AEB03201 Figure 2 Block Diagram The circuit is supplied internally by a 3 V voltage regulator. An on-chip oscillator serves as clock generator for the digital part of the circuit. TLE4941C signal path is comprised of a pair of hall probes, spaced at 2.5 mm, a differential amplifier including a noise-limiting low-pass filter and a comparator feeding a switched current output stage. In addition an offset cancellation feedback loop is provided by a signal-tracking A/D converter, a digital signal processor (DSP) and an offset cancellation D/A converter. During the startup phase (un-calibrated mode) the output is disabled (I = ILOW). The differential input signal is digitized in the speed A/D converter and fed into the DSP. The minimum and maximum values of the input signal are extracted and their corresponding arithmetic mean value is calculated. The offset of this mean value is determined and fed into the offset cancellation DAC. After successful correction of the offset, the output switching is enabled. In running mode (calibrated mode) the offset correction algorithm of the DSP is switched into a low-jitter mode, avoiding oscillation of the offset DAC LSB. Switching occurs at zero-crossing. It is only affected by the (small) remaining offset of the comparator and by the remaining propagation delay time of the signal path, mainly determined by the noise-limiting filter. Signals below a defined threshold ΔBLimit are not detected to avoid unwanted parasitic switching. Final Data Sheet 7 Revision 3.0, March 2010 TLE4941C in PG-SSO-2-4 Functional Description 2.3.1 Output Description Under ideal conditions, the output shows a duty cycle of 50%. Under real conditions, the duty cycle is determined by the mechanical dimensions of the target wheel and its tolerances (40% to 60% might be exceeded for pitch >> 5 mm due to the zero-crossing principle). Speed Signal Sensor Internal Transferred Speed Signal AET03202 Figure 3 Speed Signal (half a period = 0.5 x 1/fspeed) I tr tf IHIGH 90% 50% ILOW 10% t1 T t AET03203 Figure 4 Definition of Rise and Fall Time, Duty = t1/T x 100% Final Data Sheet 8 Revision 3.0, March 2010 TLE4941C in PG-SSO-2-4 Specification 3 Specification 3.1 Absolute Maximum Ratings Table 1 Absolute Maximum Ratings Tj = – 40°C to 150°C, 4.5 V ≤ Vcc ≤ 16.5 V Parameter Symbol Supply voltage VCC Limit Values Unit Remarks V Tj < 80°C min. max. – 0.3 – – 16.5 Tj = 170°C – 20 Tj = 150°C – 22 t = 10 × 5 min. – 24 t = 10 × 5 min., RM ≥ 75 Ω included in VCC – 27 t = 400 ms, RM ≥ 75 Ω included in VCC Reverse polarity current Irev – 200 mA External current limitation required, t< 4 h Junction temperature Tj – 150 °C 5000 h, VCC < 16.5 V – 160 2500 h, VCC < 16.5 V (not additive) – 170 500 h, VCC < 16.5 V (not additive) – 190 4 h, VCC < 16.5 V Active lifetime tB,active 10000 – h Storage temperature TS – 40 150 °C Thermal resistance PG-SSO-2-4 RthJA – 190 K/W 1) 1) Can be significantly improved by further processing like overmolding Attention: Stresses above the max. values listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Maximum ratings are absolute ratings; exceeding only one of these values may cause irreversible damage to the integrated circuit. Table 2 ESD Protection Human Body Model (HBM) tests according to Standard EIA/JESD22-A114-B HBM (covers MIL STD 883D) Parameter ESD-Protection TLE4941C Final Data Sheet Symbol Limit Values min. max. – ± 12 VESD 9 Unit Notes kV R = 1.5 kΩ, C = 100 pF Revision 3.0, March 2010 TLE4941C in PG-SSO-2-4 Specification 3.2 Operating Range Table 3 Operating Range Parameter Symbol min. max. Supply voltage VCC 4.5 Supply voltage ripple VAC Junction temperature Tj Pre-induction Pre-induction offset between outer probes Differential Induction Limit Values Unit Remarks 20 V Directly on IC leads; includes not the voltage drop at RM – 6 Vpp VCC = 13 V 0 < f < 50 kHz – 40 150 °C – 170 B0 ΔBstat., l/r – 500 + 500 mT – 20 + 20 mT ΔB – 120 + 120 mT 500 h, VCC ≤ 16.5 V, increased jitter permissible Note: Within the operating range the functions given in the circuit description are fulfilled. Final Data Sheet 10 Revision 3.0, March 2010 TLE4941C in PG-SSO-2-4 Specification 3.3 Electrical Characteristics Table 4 Electrical Characteristics All values specified at constant amplitude and offset of input signal, over operating range, unless otherwise specified. Typical values correspond to VCC = 12 V and TA = 25°C Parameter Symbol Limit Values Unit min. typ. max. Remarks Supply current ILOW 5.9 7 8.4 mA Supply current IHIGH 11.8 14 16.8 mA Supply current ratio IHIGH / ILOW 1.9 – – Output rise/fall slew rate TLE4941C tr, tf 12 7.5 – – 26 24 mA/µs Output rise/fall slew rate TLE4941C tr, tf 8 8 – – 22 26 mA/µs Current ripple dIX/dVCC IX – – 90 µA/V only valid for 49411) mT 2) Limit threshold 1 Hz < f < 2500 Hz 2500 Hz < f < 10000 Hz ΔBLimit Initial calibration delay time td,input RM ≤ 150 Ω RM ≤ 750 Ω See Figure 4 RM = 75 Ω T < 125°C T < 170°C See Figure 4 0.35 – 0.8 – 1.5 1.7 – – 300 µs Additional to nstart3) Magnetic edges required for initial nstart calibration – 3 64) magn. edges5) 7th edge correct 6) Frequency f 17) 2500 – – 2500 10000 Hz 8) Frequency changes df/dt – – ± 100 Hz/ms Duty cycle duty 40 50 60 % 9) Jitter, Tj < 150°C Tj < 170°C 1 Hz < f < 2500 Hz SJit-close – – – – ±2 ±3 % 10) Jitter, Tj < 150°C Tj < 170°C 2500 Hz < f < 10000 Hz ΔB = 2 mT sin-wave Def. See Figure 4 1σ value VCC = 12 V ΔB ≥ 2 mT SJit-close – – – – ±3 ± 4.5 % 10) 1σ value VCC = 12 V ΔB ≥ 2 mT 10) Jitter, Tj < 150°C Tj < 170°C 1 Hz < f < 2500 Hz SJit-far – – – – ±4 ±6 % Jitter, Tj < 150°C Tj < 170°C 2500 Hz < f < 10000 Hz SJit-far – – – – ±6 ±9 % 10) Jitter at board net ripple SJit-AC – – ±2 % VCC = 13 V ± 6 Vpp 0 < f < 50 kHz ΔB = 15 mT 1σ value VCC= 12 V 2 mT ≥ ΔB > ΔBLimit 1σ value VCC = 12 V 2 mT ≥ ΔB > ΔBLimit 1) only valid for TLE4941. For TLE4941C higher values occure and depend strongly on Rm-C combination 2) Magnetic amplitude values, sine magnetic field, limits refer to the 50% critera. 50% of edges are missing Final Data Sheet 11 Revision 3.0, March 2010 TLE4941C in PG-SSO-2-4 Specification 3) Occurrence of Initial Calibration Delay Time td,input If there is no input signal (standstill), a new initial calibration is triggered each 0.7 s. This calibration has a duration td,input of max. 300 µs. No input signal change is detected during that initial calibration time. In normal operation (signal startup) the probability of td,input to come into effect is: td,input / time frame for new calibration 300 µs/700 ms = 0.05%. After IC resets (e.g. after a significant undervoltage) td,input will always come into effect. 4) Magnetic Input Signal Extremely Close to a Switching Threshold of PGA (Pragrammable Gain Amplifier) at Signal Startup After signal startup generally all PGA switching into the appropriate gain state happens within less than one signal period. This is included in the calculation for nDZ-Start. For the very rare case that the signal amplitude is extremely close to a PGA switching threshold and the full range of following speed ADC respectively, a slight change of the signal amplitude can cause one further PGA switching. It can be caused by non-perfect magnetic signal (e.g. amplitude modulation due to tolerances of pole-wheel, tooth wheel or air gap variation). This additional PGA switching can result in a further delay of the output signal (nDZ-Start) up to three magnetic edges leading to a worst case of nDZ-Start = 9. Due to the low probability of this case it is not defined as max. value in the data sheet. 5) The sensor requieres up to nstart magnetic switching edges for valid speed information after power-up or after a stand still condition. During that phase the output is disabled. 6) One magnetic edge is defined as a montonic signal change of more than 3.3 mT 7) only valid in calibrated mode. For entering calibrated mode higher frequencies are necessary. 8) High frequency behavior not subject to production test - verified by design/characterization. Frequency above 2500 Hz may have influence on jitter performance and magnetic thresholds 9) During fast offset alterations, due to the calibration algorithm, exceeding the specified duty cycle is permitted for short time periods 10) Not subject to production test verified by design/characterization Final Data Sheet 12 Revision 3.0, March 2010 TLE4941C in PG-SSO-2-4 Specification 3.4 Typical Diagrams (measured performance) Tc = Tcase, IC = approx. Tj - 5°C 18 mA AED03216 2.4 AED03215 IHIGH / ILOW IHIGH , ILOW 2.3 16 IHIGH 14 2.2 12 2.1 10 2.0 1.9 8 ILOW 6 -40 0 40 80 120 1.8 -40 ˚C 200 0 40 80 120 TC TC Figure 5 °C 200 Supply Current = f(T) (left), Supply Current Ratio Ihigh / I Low= f(T) (right) AED03217 20 mA AED03218 2.4 IHIGH , ILOW IHIGH / ILOW 2.2 16 IHIGH IHIGH / ILOW 14 2.0 12 10 1.8 8 6 ILOW 0 5 10 15 20 1.6 25 V 30 0 5 10 15 20 VCC Figure 6 25 V 30 VCC Supply Current =f(Vcc) (left), Supply Current Ratio Ihigh / I Low=f(Vcc) (right) Final Data Sheet 13 Revision 3.0, March 2010 TLE4941C in PG-SSO-2-4 Specification AED03222 22 mA/µs AED03220 26 mA/µs 24 18 Slew Rate Slew Rate 22 Fall Rise 16 14 12 10 20 18 16 8 Fall 14 Rise 6 12 4 10 2 0 0 200 400 600 8 -40 800 Ω 1000 0 40 80 ΔB Slew Rate with C = 1.8 nF = f(RM) (left), Slew Rate with C = 1.8 nF, RM = 75 Ω (right) AED03223 1.0 mT AED03224 1.0 mT BLimit 0.9 0.9 BLimit 0.8 0.8 0.7 0.7 0.6 0.6 0.5 -40 0 40 80 120 0.5 0 10 ˚C 200 BLimit 101 102 103 Hz 104 f TC Figure 8 ˚C 200 TC RM Figure 7 120 Magnetic Threshold ΔBLimit = f(T) at f = 1 kHz (left), Magnetic Threshold ΔBLimit = f(f) (right) Final Data Sheet 14 Revision 3.0, March 2010 TLE4941C in PG-SSO-2-4 Specification AED03225 0.9 % 0.8 AED03226 12 td µs 10 Jitter 0.7 0.6 8 td @ 2.5 kHz 0.5 6 0.4 4 0.3 0.2 2 0.1 0 -40 0 40 80 120 0 -40 ˚C 200 0 TC Figure 9 40 80 120 ˚C 180 TC Jitter 1σ at ΔB = 2 mT at 1 kHz (left), Delaytime td (right) 1) 1) td is the time between the zero crossing of ΔB = 2 mT sinusoidal input signal and the rising edge (50%) of the signal current. Final Data Sheet 15 Revision 3.0, March 2010 TLE4941C in PG-SSO-2-4 Specification 3.5 Electro Magnetic Compatibility (EMC) Table 5 Electro Magnetic Compatibility (values depend on RM!) Ref. ISO 7637-1; test circuit 1; ΔB = 2 mT (amplitude of sinus signal); VCC = 13.5 V, fB = 100 Hz; T = 25°C; RM ≥ 75 Ω Parameter Symbol Level/Typ Status Testpulse 1 Testpulse 2 Testpulse 3a Testpulse 3b Testpulse 4 Testpulse 5 VEMC IV / – 100 V IV / 100 V IV / – 150 V IV / 100 V IV / – 7 V IV / 86.5 V1) C2) C2) A A B3) C Note: Values are valid for all TLE4941C/42C types! Ref. ISO 7637-3; test circuit 1; ΔB = 2 mT (amplitude of sinus signal); VCC = 13.5 V, fB = 100 Hz; T = 25°C; RM ≥ 75 Ω Parameter Symbol Level/Typ Status Testpulse 1 Testpulse 2 Testpulse 3a Testpulse 3b VEMC IV / – 30 V IV / 30 V IV / – 60 V IV / 40 V A A A A Note: Values are valid for all TLE4941C/42C types! Ref. ISO 11452-3; test circuit 1; measured in TEM-cell ΔB = 2 mT; VCC = 13.5 V, fB = 100 Hz; T = 25°C Parameter Symbol Level/Typ Remarks EMC field strength ETEM-Cell IV / 250 V/m AM = 80%,f = 1 kHz Note: Only valid for C-types! 1) Applying in the board net a suppressor diode with sufficient energy absorption capability 2) According to 7637-1 the supply switched “OFF” for t = 200 ms 3) According to 7637-1 for test pulse 4 the test voltage shall be 12 V ± 0.2 V. Measured with RM = 75 Ω only. Mainly the current consumption will decrease. Status C with test circuit 1 Final Data Sheet 16 Revision 3.0, March 2010 TLE4941C in PG-SSO-2-4 Specification EMC-Generator Mainframe D1 VCC Sensor GND VEMC C1 D2 RM C2 AES03199 Components: D1: D2: C1: C2: RM: Figure 10 1N4007 or higher T 5Z27 1J 10 µF / 35 V 1 nF / 1000 V 75 Ω / 5 W EMC Test Circuit 1 Final Data Sheet 17 Revision 3.0, March 2010 TLE4941C in PG-SSO-2-4 Package Information 4 Package Information Pure tin covering (green lead plating) is used. Leadframe material is Wieland K62 (UNS: C18090) and contains CuSn1CrNiTi. Product is RoHS (restriction of hazardous substances) compliant when marked with letter G in front or after the data code marking and may contain a data matrix code on the rear side of the package (see also information note 136/03). Please refer to your Key account team or regional sales if you need further information. d=0.3±0.08mm Distance chip to front side (date code) of IC Figure 11 Distance Chip to Upper Side of IC . Final Data Sheet 18 Revision 3.0, March 2010 TLE4941C in PG-SSO-2-4 Package Information Package Outline 3.01 5.16 ±0.08 1.81±0.05 2 2 ±0.05 7˚ 0.25 ±0.05 1 -1 0.2 2x 6 ±0.5 0.2 B 1 0.5 2x 1.2 ±0.05 2 18 ±0.5 1.9 MAX. 0.1 0.2 +0.1 1.5 ±0.05 38 MAX. A 0.87 ±0.05 1.67 ±0.05 2x (14.8) (Useable Length) 23.8 ±0.5 A CODE +0.75 2.54 CODE 0.25 ±0.05 7˚ 1 x 45˚±1˚ 1.9 MAX. 1-0.1 0.1 MAX. B 12.7 ±1 9 -0.5 (8.17) 2 A 5.16 ±0.08 CODE 10.2 ±0.1 0.2 1.2 ±0.1 1) 0.65 ±0.1 (0.25) 3.38 ±0.06 3.71±0.08 5.34 ±0.05 7.07±0.1 4.1 A Adhesive Tape A-A (1.3) Tape 0.25 -0.15 4 ±0.3 6.35 ±0.4 0.39 ±0.1 12.7 ±0.3 Total tolerance at 10 pitches ±1 (2.4) Capacitor (2.7) 5.34 ±0.05 1) No solder function area Figure 12 PG-SSO-2-4 (Plastic Single Small Outline Package); Dimensions in mm 4.2 Packing You can find all of our packages, sorty of packing and others in our Infineon Internet Page “Products”: http://www.infineon.com/products . Final Data Sheet 19 Revision 3.0, March 2010 www.infineon.com Published by Infineon Technologies AG