Data Sheet, V 4.0, 2010-04 TLE4953 T LE4 95 3C Differential Two-Wire Hall Effect Sensor IC Sensors Edition 2010-04 Published by Infineon Technologies AG, 81726 München, Germany © Infineon Technologies AG 6/25/10. All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as a guarantee of characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. TLE4953 TLE4953C Revision History: 2010-04 Previous Version: V 3.0 Page V 4.0 Temperature profile adjustment TLE4953C package change Maximum value of the differential direction limit added Storage temperature info provided by application notes: Storage of products supply by Infineon Technologies We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? 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Please send your proposal (including a reference to this document) to: [email protected] TLE4952 Series Differential Two-Wire Hall Effect Sensor IC TLE4953 TLE4953C Data Sheet V4.0 Features • • • • • • • • • • • • • Two-wire PWM current interface Detection of rotation direction Dynamic self-calibration principle & high sensitivity Adaptive hysteresis Single chip solution - no external components Vibration suppression in calibrated mode South and north pole pre-induction possible High resistance to piezo effects Large operating air-gaps Wide operating temperature range From zero speed up to 12 kHz 1.8 nF overmolded capacitor For coarse transmission target wheels Type Marking Order Code Package TLE4953C 53C1R SP000710696 PG-SSO-2-4 TLE4953 53 SP000278512 PG-SSO-2-1 The differential Hall Effect sensor TLE4953 is designed to provide information about rotational speed and direction of rotation to modern transmission and ABS systems. The output has been designed as a two wire current interface based on a Pulse Width Modulation principle. The sensor operates without external components and combines a fast power-up time with a wide frequency range. Excellent accuracy and sensitivity is specified for harsh automotive requirements as a wide temperature range, high ESD robustness and high EMC resilience. State-of-the-art BiCMOS technology is used for monolithic integration of the active sensor areas and the signal conditioning. Finally, the optimized piezo compensation and the integrated dynamic offset compensation enable easy manufacturing and elimination of magnetic offsets. Adaptive hysteresis concept increases the noise immunity. The TLE4953C is additionally provided with an overmolded 1.8 nF capacitor for improved EMI performance. Data Sheet 1 V 4.0, 2010-04 TLE4953 TLE4953C Pin Configuration (top view) 2.5 2.67 Center of Sensitive Area ± 0.15 Date Code 1.44 Marking GyywwS 53C1R VCC VCC GND GND AEP03191-53 Figure 1 supply generator clock gen. system control & watchdog output protocol slope/peak detection offset calc. Hall probes: Right + - A/D PGA D/A Centr Left - + - (R+L)/2-C - LP comp D/A Figure 2 Data Sheet Tracking algor. + noise shaper Dig. Filter Direction algorithm Block Diagram 2 V 4.0, 2010-04 TLE4953 TLE4953C Functional Description The differential Hall Effect IC detects the motion of ferromagnetic or permanent magnet structures by measuring the differential flux density of the magnetic field. To detect the motion of ferromagnetic objects the magnetic field must be provided by a backbiasing permanent magnet. Either the South or North pole of the magnet can be attached to the rear, unmarked side (remark: rear side may contain data matrix code) of the IC package. Magnetic offsets of up to ± 20 mT and mechanical offsets are cancelled out through a self-calibration algorithm. Only 2 transitions are necessary for the self-calibration procedure. After the initial self-calibration sequence switching occurs when the input signal crosses the adaptive threshold on the rising magnetic edge. The ON and OFF state of the IC are indicated by High and Low current consumption. Each rising magnetic edge of the magnetic input signal triggers an output pulse. Magnetic Signal Pulse Length Output Signal AED03189 Figure 3 Output Pulses on magnetic rising edge In addition to the speed signal, the following information is provided by varying the length of the output pulses (PWM modulation): Speed signal = S The speed signal is issued at the first output pulse after start up and when the magnetic frequency is above 1kHz. Direction of rotation left = DR-L DR-L information is issued in the output pulse length when the active target wheel in front of the Hall Effect IC moves from the pin VCC to the pin GND. Direction of rotation right = DR-R DR-R information is issued in the output pulse length when the active target wheel in front of the Hall Effect IC moves from the pin GND to the pin VCC. Data Sheet 3 V 4.0, 2010-04 TLE4953 TLE4953C S N N S S N N DR-L S S N DR-R G 0415 S 53C1R AEA03193 Figure 4 Definition of Rotation Direction Circuit Description The circuit internally is supplied by a voltage regulator. A 2 MHz on-chip oscillator serves as a clock generator for the DSP and the output encoder. Speed signal circuitry TLE4953 speed signal path comprises a pair of Hall Effect probes, separated from each other by 2.5 mm, a differential amplifier including noise limiting low-pass filter, and a comparator triggering a switched current output stage. An offset cancellation feedback loop is provided through a signal-tracking A/D converter, a digital signal processor (DSP), and an offset cancellation D/A converter. Uncalibrated Mode Occasionally a short initial offset settling time td,input might delay the detection of the input signal. (The sensor is "blind"). During the startup phase (un-calibrated mode) the output is disabled (I = ILow). The magnetic input signal is tracked by the speed ADC and monitored within the digital circuit. For detection the signal needs to exceed a threshold (digital noise constant d1). When the signal slope is identified as a rising edge, a trigger pulse is issued to a comparator. A second trigger pulse is issued as soon as the next rising edge is detected. Between the start-up of the magnetic input signal and the time when its second extreme is reached, the PGA (programmable gain amplifier) will switch to its appropriate position. This value is determined by the signal amplitude and initial offset value. The digital noise constant value is changing accordingly (d1 → d2, related to the corresponding PGA Data Sheet 4 V 4.0, 2010-04 TLE4953 TLE4953C states), leading to a change in phase shift between magnetic input signal and output signal. After that consecutive output edges should have a nominal delay of about 360°. During the uncalibrated mode the offset value is calculated by the peak detection algorithm as described below. The differential input signal is digitized in the speed A/D converter and fed into the DSP part of the circuit. The minimum and maximum values of the input signal are extracted and their corresponding arithmetic mean value is calculated. The offset of this mean value is determined and fed into the offset cancellation DAC. The offset update takes place when two valid extremes are found and the direction of the update has the same orientation as the magnetic slope (valid for calibrated mode). For example an positive offset update is only possible on a rising magnetic edge. The offset update is done independant from the output switching. After successful correction of the offset, the output switching is in calibrated mode. Switching occurs at adaptive threshold-crossover. It is only affected by the propagation delay time of the signal path, which is mainly determined by the noise limiting filter. Signals which are below a predefined threshold ∆BLimit are not detected. This prevents unwanted switching. The adaptive hysteresis is linked to the PGA state. Therefore the system is able to suppress switching if vibration or noise signals are smaller than the adaptive hysteresis. The switching and direction information is fed into the DSP and the output encoder. The pulse length of the High output current is generated according to the rotational speed and the direction of rotation. Direction signal circuitry The differential signal between a third Hall probe and the mean value of the differential Hall probe pair is obtained from the direction input amplifier. This signal is digitized by the direction ADC and fed into the digital circuitry. There, the phase of the signal referring to the speed signal is analyzed and the direction information is forwarded to the output encoder. The phase is identified by calculating the size of the direction signal at two consecutive zero crossings of the speed signal. This is done by subtracting the current direction signal from the internal stored value which has been taken from the previous magnetic edge. Depending on the phase shift between the direction signal and the speed signal a positive or a negative value occur. The information if the new direction calculation takes place at a rising or a falling magnetic edge allows together with the algebraic sign of the calculated direction signal a reliable direction detection. The first pulse after power is always a speed pulse as there is no stored direction information available. Data Sheet 5 V 4.0, 2010-04 TLE4953 TLE4953C Vibration suppression algorithm: The magnetic signal amplitude and the direction information is used for detection of parasitic magnetic signals. Unwanted magnetic signals can be caused by angular or airgap vibrations for instance. If an input signal is clearly detected as a vibration signal, the output of pulses will be suppressed. A magnetic input signal is classified as parasitic vibration signal if a. the speed signal amplitude is smaller than the internal hysteresis or b. the direction signal amplitude is smaller than the internal limit or c. the direction signal consists of alternating left/right information The quality of vibration suppression (according a & b) depends on the hysteresis limits and on the magnitude of the magnetic signal. The bigger the hysteresis the better the suppression of parasitc signals. For parasitic signals where items above (a. to c.) are not clearly applicable or at other more rare cases (e.g. IC startup) vibration suppression is not guaranteed. The performance of the direction detection and vibration suppression algorithm depends on the used magnetic circuit and as well on the used target wheel and need to be evaluated. Please ask for application support if you have questions on the vibration suppresion algorithm. Package information: Pure tin covering (green lead plating) is used. Lead frame material is Wieland K62 (UNS: C18090) and contains CuSn1CrNiTi. Product is RoHS (Restriction of Hazardous Substances) compliant and marked with letter G in front of the data code marking and may contain a data matrix code on the rear side of the package (see also information note 136/03). Please refer to your key account team or regional sales if you need further information. Data Sheet 6 V 4.0, 2010-04 TLE4953 TLE4953C Absolute Maximum Ratings Tj = -40 to 150 °C, 4.0V ≤ VCC ≤ 16.5 V Parameter Supply voltage Symbol VCC Limit Values min. max. – 0.3 – – 16.5 – 20 – 22 – 24 Unit Remarks V Tj ≤ 80 °C Tj = 170 °C Tj = 150 °C t = 10 × 5 min t = 10 × 5 min, RM ≥ 75 Ω included in VCC – 27 t = 400 ms, RM ≥ 75 Ω included in VCC Reverse polarity current Irev – 200 mA External current limitation required, t ≤4 h1) Junction temperature Tj – 150 °C 5000 h, VCC ≤16.5 V – 160 2500 h, VCC ≤ 16.5 V (not additive) – 170 500 h, VCC ≤ 16.5 V (not additive) – 190 4 × 1 h, VCC ≤ 16.5 V – 10000 h -40°C to 125°C – 190 K/W 3) Active lifetime2) Thermal resistance PG-SSO-2-4, PG-SSO-2-1 tB,active RthJA 1) This allows together with an external serial resistor (75 or 100 Ohm) reverse polarity voltage for a short duration. This resistor is usually present in the ECU of the application circuit. 2) Life time shall be considered as anticipation and will not extend the agreed warranty period 3) Can be improved significantly by further processing like overmolding Note: Stress in excess of those listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Data Sheet 7 V 4.0, 2010-04 TLE4953 TLE4953C ESD Protection Characterized according to Human Body Model (HBM) tests in compliance with Standard EIA/JESD22-A114-B HBM (covers MIL STD 883D) ) Parameter Symbol Limit Values min. ESD-Protection TLE4953C TLE4953 VESD Unit Notes kV R = 1.5 kΩ, C = 100 pF max. - ± 12 ± 12 Operating Range Parameter Symbol Limit Values min. max. Unit Remarks Supply voltage VCC 4.5 20 V Directly on IC leads excludes the RM voltage drop Supply voltage VCC 4.0 4.5 V Directly on IC leads excludes the RM voltage drop 1) Supply voltage ripple VAC – 6 Vpp VCC = 13 V 0 ≤ f ≤ 50 kHz Junction temperature Tj – 40 150 °C Pre-induction Pre-induction offset between outer probes Pre-induction offset between mean of outer probes and center probe Differential Induction 500h VCC ≤ 16.5 V 2) or 170 B0 – 500 ∆Bstat., l/r – 20 + 500 mT + 20 mT L-R ∆Bstat., – 20 + 20 mT (L+R)/2-C – 120 + 120 mT m/o ∆B 1) Reduced performance possible for jitter/phase accuracy and power supply rejection ratio (EMC). Current levels will typically decrease but will be within specification limits. This voltage range is not recommended for continuos operation and should cover the function during short voltage drops which may occur at cranking of engine / test pulse 4. 2) increased jitter and reduced phase accuracy permissible between 150 and 170°C junction temperature. Note: Within the operating range the functions given in the circuit description are fulfilled. Data Sheet 8 V 4.0, 2010-04 TLE4953 TLE4953C AC/DC Characteristics All values specified at constant amplitude and offset of input signal, over operating range, unless otherwise specified. Typical values correspond to VCC=12V and TA=25°C Parameter Symbol Limit Values Unit Remarks min. typ. max. ILow IHigh IHigh/ILow tr, tf 5.9 7 8.4 mA 11.8 14 16.8 mA 1.9 – – 12 – 26 mA/µs RM = 75 Ω Tj ≤ 170 °C See Figure 5 Output rise/fall slew rate TLE4953C tr, tf 8 – 26 mA/µs RM = 75 Ω Tj ≤ 170 °C See Figure 5 Current ripple dIX/dVCC IX – – 90 µA/V Only valid for TLE4953 Limit threshold speed 0Hz ≤ f ≤ 2500 Hz 2500 Hz ≤ f ≤ 12000 Hz ∆BLimit mT 1) mT Calculated at two consecutive threshold crossings2) Additional to nstart Supply current Supply current Supply current ratio Output rise/fall slew rate TLE4953 0.35 0.8 Limit differential direction ∆BDir signal 0Hz ≤ f ≤ 1100 Hz Initial calibration delay time td,input Magnetic edges required nstart for first output pulse (no previous vibration detected) Number of pulses in uncalibrated mode Frequency Data Sheet 0.35 0.73 – 300 345 µs – – 2 magn. pulse occurs only edges on rising magnetic edge 2 pulses 3rd pulse calibrated pulses 3rd pulse correct nDZ-Startup Number of emitted pulses nDR-Start with invalid direction information3) f 1.5 1.75 – – 24) 0 – 12000 Hz 9 4) V 4.0, 2010-04 TLE4953 TLE4953C AC/DC Characteristics (cont’d) All values specified at constant amplitude and offset of input signal, over operating range, unless otherwise specified. Typical values correspond to VCC=12V and TA=25°C Parameter Symbol Limit Values min. typ. Unit Remarks Systematical phase error of "uncal" pulse; nth vs. n+1th pulse (does not include jitter) max. Systematic phase error of output edges during start-up and uncalibrated mode – 88 + 88 ° Phase shift during ∆Φswitch transition from uncalibrated to calibrated mode – 90 + 90 ° Phase shift change during PGA switching in calibrated mode 0 80 ° Magnetic differential field ∆ Bˆ Limit, change required for early startup startup with 1st rising edge Due to adaptive hysteresis. Depending on signal shape. peak to peak value ∆ Bˆ Limit, early startup 3.5 mT Jitter, Tj ≤ 150 °C Tj ≤170 °C f ≤ 2500 Hz SJit-far – – – – ±2 ±3 % Jitter, Tj ≤ 150 °C Tj ≤170 °C 2500 Hz < f ≤12000 Hz SJit-far – – – – ±3 ± 4.5 % 5) Jitter at board net ripple SJit-AC – – ±2 % 5) 5) 1 σ value VCC = 12 V ∆B ≥ 2 mT 1 σ value VCC = 12 V ∆B ≥ 2 mT VCC = 13 V ± 6 Vpp 0 ≤f ≤50 kHz ∆B = 15 mT 1) magnetic amplitude values, sine magnetic field, Limits refer to the 50% criteria. 50% of pulses are missing.Only valid at lowest PGA stage/highest amplification because of adaptive hysteresis. 2) Magnetic peak to peak value. Limits refer to the 99% criteria, just 1 pulse missing out of 100. 3) The first 2 pulses may contain only direction information if the direction signal is above ∆BDir.The first pulse after starting will be the speed pulse. 4) High frequency behaviour not subject to production test - verified by design/characterization. Data Sheet 10 V 4.0, 2010-04 TLE4953 TLE4953C 5) not subject to production test- verified by design/characterization, magnetic values are amplitude values I tr tf IHigh 90% 50% ILow 10% t1 t AET03194 Figure 5 Definition of Rise and Fall Time Timing Characteristics Parameter Pre-low length Speed signal Length of DR-L pulse Length of DR-R pulse Output of DR-L/R pulse, maximum frequency From low - high frequency From high - low frequency Symbol tpre-low tS tDR-L tDR-R fDR, max Limit Values Unit min. typ. max. 24 30 36 µs 24 30 36 µs 50 60 70 µs 102 120 138 µs Hz 935 850 1100 1000 1265 1150 Remarks Internal hysteresis of direction signal1) 1) Not possible overlap, 10% difference verified by design/characterization. Frequencies not subject to production test verified by design/characterization PWM Current Interface Between each magnetic transition and the rising edge of the corresponding output pulse the output current is Low for tpre-low in order to allow reliable internal conveyance. Following the signal pulse (current is High) is output. Data Sheet 11 V 4.0, 2010-04 TLE4953 TLE4953C If the magnetic direction field exceeds ∆BDir, the output pulse lengths are 60 µs or 120 µs respectively, depending on the direction of rotation. If the magnitude of the magnetic direction field is below ∆Bdir, the output pulses are suppressed when the frequency is below fDR,max (see section vibration suppression). For magnitudes of the magnetic differential field below ∆BLimit the signal is lost. Speed pulse occur only at the first pulse after start up or above fDR, max. If no magnetic differential signal change is detected the IC will remain in calibrated mode. No internal reset are generated - therefore a zero speed operation is possible. Internal Sensor Speed Signal tpre-low = 30 µs tS = 30 µs Transferred Signal: S Xn Xn+1 tDR-L= 2 x tS Xn+2 Transferred Signal: DR-L tDR-R= 4 x tS Transferred Signal: DR-R AET03196 Figure 6 Data Sheet Definition of PWM Current Interface 12 V 4.0, 2010-04 TLE4953 TLE4953C Electro Magnetic Compatibility (values depend on RM!) Characterization of Electro Magnetic Compatibility are carried out on sample base of one qualification lot. Not all specification parameters have been monitored during EMC exposure. Only key parameters as e.g. switching current have been monitored Parameter Symbol Level/Typ Status Ref. ISO 7637-1; test circuit 1; ∆B = 2 mT (amplitude of sinus signal); VCC = 13.5 V, fB = 100 Hz; T = 25 °C; RM ≥ 75 Ω Testpulse 1 Testpulse 2 Testpulse 3a Testpulse 3b Testpulse 4 Testpulse 5 VEMC IV / – 100 V IV / 100 V IV / – 150 V IV / 100 V IV / – 7 V IV / 86.53) V C1) C1) A A B2) C 1) According to 7637-1 the supply switched "OFF" for t = 200 ms. 2) According to 7637-1 for test pulse 4 the test voltage shall be 12 V ± 0.2 V. Measured with RM =75Ω only. Mainly the current consumption will decrease. Status C with test circuit 1. 3) Applying in the board net a suppressor diode with sufficient energy absorption capability. Ref. ISO 7637-3; test circuit 1; ∆B = 2 mT (amplitude of sinus signal); VCC = 13.5 V, fB = 100 Hz; T = 25 °C; RM ≥ 75 Ω Testpulse 1 Testpulse 2 Testpulse 3a Testpulse 3b VEMC IV / – 30 V IV / 30 V IV / – 60 V IV / 40 V A A A A Ref. ISO 11452-3; test circuit 1; measured in TEM-cell ∆B = 2 mT; VCC = 13.5 V, fB = 100 Hz; T= 25 °C EMC field strength (TLE4953) ETEM-Cell IV / 200 V/m AM = 80%, f = 1 kHz EMC field strength (TLE4953C) ETEM-Cell IV / 250 V/m AM = 80%, f = 1 kHz Data Sheet 13 V 4.0, 2010-04 TLE4953 TLE4953C EMC-Generator Mainframe D1 VCC Sensor GND VEMC C1 D2 RM C2 AES03199 Components: D1: D2: C1: C2: RM: Figure 7 1N4007 T 5Z27 1J 10 µF/35 V 1 nF/1000 V 75 Ω/5 W Test Circuit 1 d Branded Side Hall-Probe d : Distance chip to branded side of IC P-SSO-2-1/2 : 0.3 ±0.08 mm AEA02961 Figure 8 Data Sheet Package Outlines 14 V 4.0, 2010-04 TLE4953 TLE4953C PG-SSO-2-1 (Plastic Single Small Outline Package) 5.34 ±0.05 2 A 0.2 7˚ CODE 0.87 ±0.05 2 9 -0.5 2.54 1 -1 1 6 ±0.5 2x 0.2 +0.1 18 ±0.5 2x 0.5 38 MAX. 0.1 1.67 ±0.05 23.8 ±0.5 1.9 MAX. 0.25 ±0.05 +0.75 (14.8) (Useable Length) CODE 1 MAX.1) (0.25) 3.38 ±0.06 3.71 ±0.08 CODE 1 x 45˚±1˚ 1.2 ±0.1 1.9 MAX. 1 -0.1 7˚ 12.7 ±1 0.1 MAX. 5.16 ±0.08 A Adhesive Tape Tape 4 ±0.3 6.35 ±0.4 12.7 ±0.3 Total tolerance at 10 pitches ±1 0.25 -0.15 0.39 ±0.1 1) No solder function area Dimensions in mm Data Sheet 15 V 4.0, 2010-04 TLE4953 TLE4953C PG-SSO-2-4 (Plastic Single Small Outline Package) 3.01 5.16 ±0.08 1.81±0.05 1 -1 0.25 ±0.05 2.2 ±0.5 7˚ 7˚ 0.2 2x 9 -0.5 0.2 B 1 0.5 2x 0.2 +0.1 1.5 ±0.05 6 ±0.5 1.9 MAX. 1.2 ±0.05 2 0.1 0.87 ±0.05 1.67 ±0.05 38 MAX. A 2x (14.8) (Useable Length) 23.8 ±0.5 A CODE +0.75 1.2 ±0.1 2.54 CODE 0.25 ±0.05 18 ±0.5 1 x 45˚±1˚ 1.9 MAX. 1-0.1 0.1 MAX. B 12.7 ±1 7.07 ±0.1 (8.17) 2 A 5.16 ±0.08 CODE 10.2 ±0.1 0.2 (2.2) 1) 0.65 ±0.1 (0.25) 3.38 ±0.06 3.71±0.08 5.34 ±0.05 A Adhesive Tape (1.3) Tape A-A 4 ±0.3 6.35 ±0.4 12.7 ±0.3 Total tolerance at 10 pitches ±1 (2.4) 0.25 -0.15 0.39 ±0.1 Capacitor (2.7) 5.34 ±0.05 Dimensions in mm 1) No solder function area You can find all of our packages, sorts of packing and others in our Infineon Internet Page “Products”: http://www.infineon.com/products. Data Sheet 16 V 4.0, 2010-04 w w w . i n f i n e o n . c o m Published by Infineon Technologies AG